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Wed, 04 Feb 2026 06:23:25 -0800 (PST) From: Biju X-Google-Original-From: Biju To: Thomas Gleixner Cc: Biju Das , linux-kernel@vger.kernel.org, Geert Uytterhoeven , Prabhakar Mahadev Lad , Biju Das , linux-renesas-soc@vger.kernel.org Subject: [PATCH 5/8] irqchip/renesas-rzg2l: Drop IRQC_IRQ_COUNT macro Date: Wed, 4 Feb 2026 14:23:13 +0000 Message-ID: <20260204142320.103184-6-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260204142320.103184-1-biju.das.jz@bp.renesas.com> References: <20260204142320.103184-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Biju Das The total number of External IRQs in RZ/G2L and RZ/G3L SoC are different. The RZ/G3L has 16 external IRQs where as RZ/G2L has only 8 external IRQ. Add irq_count variable in struct rzg2l_hw_info to handle this differences and drop the macro IRQC_IRQ_COUNT. Signed-off-by: Biju Das --- drivers/irqchip/irq-renesas-rzg2l.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/irqchip/irq-renesas-rzg2l.c b/drivers/irqchip/irq-rene= sas-rzg2l.c index e5393306f610..0de7db45d4c8 100644 --- a/drivers/irqchip/irq-renesas-rzg2l.c +++ b/drivers/irqchip/irq-renesas-rzg2l.c @@ -21,7 +21,6 @@ #include =20 #define IRQC_IRQ_START 1 -#define IRQC_IRQ_COUNT 8 #define IRQC_TINT_COUNT 32 =20 #define ISCR 0x10 @@ -68,10 +67,12 @@ struct rzg2l_irqc_reg_cache { =20 /** * struct rzg2l_hw_info - Interrupt Control Unit controller hardware info = structure. + * @irq_count: Number of IRQC interrupts * @tint_start: Start of TINT interrupts * @num_irq: Total Number of interrupts */ struct rzg2l_hw_info { + u8 irq_count; u8 tint_start; u8 num_irq; }; @@ -144,7 +145,7 @@ static void rzg2l_irqc_eoi(struct irq_data *d) unsigned int hw_irq =3D irqd_to_hwirq(d); =20 raw_spin_lock(&priv->lock); - if (hw_irq >=3D IRQC_IRQ_START && hw_irq <=3D IRQC_IRQ_COUNT) + if (hw_irq >=3D IRQC_IRQ_START && hw_irq <=3D priv->info->irq_count) rzg2l_clear_irq_int(priv, hw_irq); else if (hw_irq >=3D priv->info->tint_start && hw_irq < priv->info->num_i= rq) rzg2l_clear_tint_int(priv, hw_irq); @@ -190,7 +191,7 @@ static void rzfive_irqc_mask(struct irq_data *d) unsigned int hwirq =3D irqd_to_hwirq(d); =20 raw_spin_lock(&priv->lock); - if (hwirq >=3D IRQC_IRQ_START && hwirq <=3D IRQC_IRQ_COUNT) + if (hwirq >=3D IRQC_IRQ_START && hwirq <=3D priv->info->irq_count) rzfive_irqc_mask_irq_interrupt(priv, hwirq); else if (hwirq >=3D priv->info->tint_start && hwirq < priv->info->num_irq) rzfive_irqc_mask_tint_interrupt(priv, hwirq); @@ -204,7 +205,7 @@ static void rzfive_irqc_unmask(struct irq_data *d) unsigned int hwirq =3D irqd_to_hwirq(d); =20 raw_spin_lock(&priv->lock); - if (hwirq >=3D IRQC_IRQ_START && hwirq <=3D IRQC_IRQ_COUNT) + if (hwirq >=3D IRQC_IRQ_START && hwirq <=3D priv->info->irq_count) rzfive_irqc_unmask_irq_interrupt(priv, hwirq); else if (hwirq >=3D priv->info->tint_start && hwirq < priv->info->num_irq) rzfive_irqc_unmask_tint_interrupt(priv, hwirq); @@ -400,7 +401,7 @@ static int rzg2l_irqc_set_type(struct irq_data *d, unsi= gned int type) unsigned int hw_irq =3D irqd_to_hwirq(d); int ret =3D -EINVAL; =20 - if (hw_irq >=3D IRQC_IRQ_START && hw_irq <=3D IRQC_IRQ_COUNT) + if (hw_irq >=3D IRQC_IRQ_START && hw_irq <=3D priv->info->irq_count) ret =3D rzg2l_irq_set_type(d, type); else if (hw_irq >=3D priv->info->tint_start && hw_irq < priv->info->num_i= rq) ret =3D rzg2l_tint_set_edge(d, type); @@ -500,7 +501,7 @@ static int rzg2l_irqc_alloc(struct irq_domain *domain, = unsigned int virq, * from 16-31 bits. TINT from the pinctrl driver needs to be programmed * in IRQC registers to enable a given gpio pin as interrupt. */ - if (hwirq > IRQC_IRQ_COUNT) { + if (hwirq > priv->info->irq_count) { tint =3D TINT_EXTRACT_GPIOINT(hwirq); hwirq =3D TINT_EXTRACT_HWIRQ(hwirq); =20 @@ -607,8 +608,9 @@ static int rzg2l_irqc_common_probe(struct platform_devi= ce *pdev, struct device_n } =20 static const struct rzg2l_hw_info rzg2l_hw_params =3D { - .tint_start =3D IRQC_IRQ_START + IRQC_IRQ_COUNT, - .num_irq =3D IRQC_IRQ_START + IRQC_IRQ_COUNT + IRQC_TINT_COUNT, + .irq_count =3D 8, + .tint_start =3D IRQC_IRQ_START + 8, + .num_irq =3D IRQC_IRQ_START + 8 + IRQC_TINT_COUNT, }; =20 static int rzg2l_irqc_probe(struct platform_device *pdev, struct device_no= de *parent) --=20 2.43.0