From nobody Sat Feb 7 15:12:10 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CC11D3ECBC4; Wed, 4 Feb 2026 11:15:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770203735; cv=none; b=NXk8BWGMG53IWDFAOrBT9vepAOGAMQOkiRG+VyHx0kUQVUHRaEXJVFD6EDiYu/S3hmpDCBMzpmclUzZ7+UHIgbsjOX30qrYBlGnkNdFSmyc+NjYb+zpqnfBiHCO9ZE+Efd+akUwwjiobwdu1m0fmH0XqlbDnSlQROmbcZtJqmoc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770203735; c=relaxed/simple; bh=qFV5w6/dojBgFuMoTmraSw+wpik8MwYGAHJG2STTolk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=fD4DnhWT6+FhdXopIPadb4A5OMgt8N1tbL/5RBHpjyQBP5H6Bh0WrsXX3al4SjkZdtvuIDEzmGvMfOsWkWxlVUmyFmRGYc4/uyvpZn7AKBqrIZDuKE97kjOrvQchsTFWvPQjqPQehbReL/nbaFo9Jx1REY6AypaqYQhpetqk+4g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=KWzWOIiF; arc=none smtp.client-ip=192.198.163.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="KWzWOIiF" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1770203735; x=1801739735; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=qFV5w6/dojBgFuMoTmraSw+wpik8MwYGAHJG2STTolk=; b=KWzWOIiFoz0u7sfh+7hbGdrWjgYrEBSpYF9W+LPZe+nPg0TxLU5CfFVR F326M7OnQvuvnGwYK4FOpTCjgbGzyRFn01iH0mrlGB9vOh6zh442DC3Ml ObELLiQjuqvpygpMTpyphs/gGzmQWb5ex+zre+FG/qw5f4P8b9JFmLgWS rirkpdD9FyTHOVIh/bP0pcXOCqVFPGhJbpXDeFX9cN5lmAWzmHK2PBPjh 0enihCw2Eowez3IdesNasIY2hsRB+wklHAczlumNc3TG6JXqVeLEaBBbg luwN8+HWITuhQvDcVaG3zz424z1VvAJhu8/m12PUEWO+HCdJVllsX7RcQ A==; X-CSE-ConnectionGUID: rjNrNZ3UTn+1E62AVhds1g== X-CSE-MsgGUID: uiewfgYXTCGs+GAWPFY6FQ== X-IronPort-AV: E=McAfee;i="6800,10657,11691"; a="70406071" X-IronPort-AV: E=Sophos;i="6.21,272,1763452800"; d="scan'208";a="70406071" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Feb 2026 03:15:35 -0800 X-CSE-ConnectionGUID: WRl7Nv9dT4eYUi9DBOcG8Q== X-CSE-MsgGUID: OTM0MQiwQ+6X57JQAv4aYA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,272,1763452800"; d="scan'208";a="209739293" Received: from cpetruta-mobl1.ger.corp.intel.com (HELO ahunter6-desk) ([10.245.245.181]) by fmviesa006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Feb 2026 03:15:33 -0800 From: Adrian Hunter To: alexandre.belloni@bootlin.com Cc: Frank.Li@nxp.com, rafael@kernel.org, linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org Subject: [PATCH V2 6/6] i3c: mipi-i3c-hci-pci: Enable IBI while runtime suspended for Intel controllers Date: Wed, 4 Feb 2026 13:15:11 +0200 Message-ID: <20260204111511.78626-7-adrian.hunter@intel.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260204111511.78626-1-adrian.hunter@intel.com> References: <20260204111511.78626-1-adrian.hunter@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Intel LPSS I3C controllers can wake from runtime suspend to receive in-band interrupts (IBIs), and they also implement the MIPI I3C HCI Multi-Bus Instance capability. When multiple I3C bus instances share the same PCI wakeup, the PCI parent must coordinate runtime PM so that all instances suspend together and their mipi-i3c-hci runtime suspend callbacks are invoked in a consistent manner. Enable IBI-based wakeup by setting HCI_QUIRK_RPM_IBI_ALLOWED for the intel-lpss-i3c platform device. Also set HCI_QUIRK_RPM_PARENT_MANAGED so that the mipi-i3c-hci core driver expects runtime PM to be controlled by the PCI parent rather than by individual instances. For all Intel HCI PCI configurations, enable the corresponding control_instance_pm flag in the PCI driver. Signed-off-by: Adrian Hunter Reviewed-by: Frank Li --- Changes in V2: Retain HCI_QUIRK_RPM_ALLOWED Amend commit message accordingly drivers/i3c/master/mipi-i3c-hci/core.c | 4 +++- drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c | 3 +++ 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/i3c/master/mipi-i3c-hci/core.c b/drivers/i3c/master/mi= pi-i3c-hci/core.c index 149b3fad34b5..d19be1d276b5 100644 --- a/drivers/i3c/master/mipi-i3c-hci/core.c +++ b/drivers/i3c/master/mipi-i3c-hci/core.c @@ -1005,7 +1005,9 @@ static const struct acpi_device_id i3c_hci_acpi_match= [] =3D { MODULE_DEVICE_TABLE(acpi, i3c_hci_acpi_match); =20 static const struct platform_device_id i3c_hci_driver_ids[] =3D { - { .name =3D "intel-lpss-i3c", HCI_QUIRK_RPM_ALLOWED }, + { .name =3D "intel-lpss-i3c", HCI_QUIRK_RPM_ALLOWED | + HCI_QUIRK_RPM_IBI_ALLOWED | + HCI_QUIRK_RPM_PARENT_MANAGED }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(platform, i3c_hci_driver_ids); diff --git a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c b/drivers/i= 3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c index c562e666f29a..58c4a025a29c 100644 --- a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c +++ b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c @@ -200,6 +200,7 @@ static const struct mipi_i3c_hci_pci_info intel_mi_1_in= fo =3D { .id =3D {0, 1}, .instance_offset =3D {0, 0x400}, .instance_count =3D 2, + .control_instance_pm =3D true, }; =20 static const struct mipi_i3c_hci_pci_info intel_mi_2_info =3D { @@ -209,6 +210,7 @@ static const struct mipi_i3c_hci_pci_info intel_mi_2_in= fo =3D { .id =3D {2, 3}, .instance_offset =3D {0, 0x400}, .instance_count =3D 2, + .control_instance_pm =3D true, }; =20 static const struct mipi_i3c_hci_pci_info intel_si_2_info =3D { @@ -218,6 +220,7 @@ static const struct mipi_i3c_hci_pci_info intel_si_2_in= fo =3D { .id =3D {2}, .instance_offset =3D {0}, .instance_count =3D 1, + .control_instance_pm =3D true, }; =20 static int mipi_i3c_hci_pci_find_instance(struct mipi_i3c_hci_pci *hci, st= ruct device *dev) --=20 2.51.0