From nobody Tue Feb 10 00:58:23 2026 Received: from luna.linkmauve.fr (luna.linkmauve.fr [82.65.109.163]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A3B5A1EDA2B; Wed, 4 Feb 2026 04:05:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=82.65.109.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770177913; cv=none; b=DtcsV83wm9Fdf39UkvQAU+YBrlFzdP6BtbkKzsO6lwYtWYhBXQRtAdLHPB0qEmJdeefXF8FBeJf9YBthIqsp6/FPbNBaDlMEmEoKoXsk2lP87ZePA+JuMO01I0nZMVsAMsCqVasNkg8sn6lKiO+0DKSNT6U6FpgX+B1C8tJawJE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770177913; c=relaxed/simple; bh=slNkKm0yRV2q6+pcCcsATZKyQSaIL+u8wuuFViefyBU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ZudIe9L7ADwvxPfRvXI02LC1EL97re1KxZnMJjqokUmKDy8CHGByEjQWVEB/lvpkJaq+7VmrEqIWRX9/KJDHrKmQZuXImjnncbX3aLSjhiL3owFE3oHXcuKB4C8tGXkVmdRpGXeLXC20eBHJp+hdU1QMHi4r/vLQVbp6JsBtcrg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=linkmauve.fr; spf=pass smtp.mailfrom=linkmauve.fr; arc=none smtp.client-ip=82.65.109.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=linkmauve.fr Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linkmauve.fr Received: by luna.linkmauve.fr (Postfix, from userid 1000) id D26EAF43B4A; Wed, 04 Feb 2026 05:05:08 +0100 (CET) From: Link Mauve To: rust-for-linux@vger.kernel.org Cc: Link Mauve , Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , "Christophe Leroy (CS GROUP)" , Srinivas Kandagatla , Miguel Ojeda , Boqun Feng , Gary Guo , =?UTF-8?q?Bj=C3=B6rn=20Roy=20Baron?= , Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , Danilo Krummrich , Daniel Almeida , Ard Biesheuvel , "Martin K. Petersen" , Eric Biggers , Greg Kroah-Hartman , Lyude Paul , Asahi Lina , Viresh Kumar , Lorenzo Stoakes , Tamir Duberstein , FUJITA Tomonori , linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, officialTechflashYT@gmail.com, Ash Logan , Roberto Van Eeden , =?UTF-8?q?Jonathan=20Neusch=C3=A4fer?= Subject: [PATCH v2 2/4] rust: nvmem: Add an abstraction for nvmem providers Date: Wed, 4 Feb 2026 05:04:59 +0100 Message-ID: <20260204040505.8447-3-linkmauve@linkmauve.fr> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260204040505.8447-1-linkmauve@linkmauve.fr> References: <20260204040505.8447-1-linkmauve@linkmauve.fr> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable This is my very first Rust abstraction in the kernel, I took inspiration from various other abstractions that had already been written. I only implemented enough to rewrite a very simple driver I wrote in the past, in order to test the API and make sure it=E2=80=99s at least as ergon= omic as the C version, without any unsafe at all. Signed-off-by: Link Mauve --- rust/bindings/bindings_helper.h | 1 + rust/kernel/lib.rs | 2 + rust/kernel/nvmem.rs | 163 ++++++++++++++++++++++++++++++++ 3 files changed, 166 insertions(+) create mode 100644 rust/kernel/nvmem.rs diff --git a/rust/bindings/bindings_helper.h b/rust/bindings/bindings_helpe= r.h index a067038b4b42..522a76b2e294 100644 --- a/rust/bindings/bindings_helper.h +++ b/rust/bindings/bindings_helper.h @@ -65,6 +65,7 @@ #include #include #include +#include #include #include #include diff --git a/rust/kernel/lib.rs b/rust/kernel/lib.rs index 696f62f85eb5..97f3fc1e8e12 100644 --- a/rust/kernel/lib.rs +++ b/rust/kernel/lib.rs @@ -118,6 +118,8 @@ #[cfg(CONFIG_NET)] pub mod net; pub mod num; +#[cfg(CONFIG_NVMEM)] +pub mod nvmem; pub mod of; #[cfg(CONFIG_PM_OPP)] pub mod opp; diff --git a/rust/kernel/nvmem.rs b/rust/kernel/nvmem.rs new file mode 100644 index 000000000000..4b81fd65c9a7 --- /dev/null +++ b/rust/kernel/nvmem.rs @@ -0,0 +1,163 @@ +// SPDX-License-Identifier: GPL-2.0 + +//! nvmem framework provider. +//! +//! Copyright (C) 2026 Link Mauve + +use crate::build_error; +use crate::device::Device; +use crate::error::{from_result, VTABLE_DEFAULT_ERROR}; +use crate::prelude::*; +use core::marker::PhantomData; +use macros::vtable; + +/// The possible types for a nvmem provider. +#[derive(Default)] +#[repr(u32)] +pub enum Type { + /// The type of memory is unknown. + #[default] + Unknown =3D bindings::nvmem_type_NVMEM_TYPE_UNKNOWN, + + /// Electrically erasable programmable ROM. + Eeprom =3D bindings::nvmem_type_NVMEM_TYPE_EEPROM, + + /// One-time programmable memory. + Otp =3D bindings::nvmem_type_NVMEM_TYPE_OTP, + + /// This memory is backed by a battery. + BatteryBacked =3D bindings::nvmem_type_NVMEM_TYPE_BATTERY_BACKED, + + /// Ferroelectric RAM. + Fram =3D bindings::nvmem_type_NVMEM_TYPE_FRAM, +} + +/// nvmem configuration. +/// +/// Rust abstraction for the C `struct nvmem_config`. +#[derive(Default)] +#[repr(transparent)] +pub struct NvmemConfig { + inner: bindings::nvmem_config, + _p: PhantomData, +} + +impl NvmemConfig { + /// NvmemConfig's read callback. + /// + /// SAFETY: Called from C. Inputs must be valid pointers. + extern "C" fn reg_read( + context: *mut c_void, + offset: u32, + val: *mut c_void, + bytes: usize, + ) -> i32 { + from_result(|| { + let context =3D context.cast::(); + // SAFETY: context is a valid T::Priv as set in Device::nvmem_= register(). + let context =3D unsafe { &*context }; + let val =3D val.cast::(); + // SAFETY: val should be non-null, and allocated for bytes byt= es. + let data =3D unsafe { core::slice::from_raw_parts_mut(val, byt= es) }; + T::read(context, offset, data).map(|()| 0) + }) + } + + /// NvmemConfig's write callback. + /// + /// SAFETY: Called from C. Inputs must be valid pointers. + extern "C" fn reg_write( + context: *mut c_void, + offset: u32, + // TODO: Change val from void* to const void* in the C API! + val: *mut c_void, + bytes: usize, + ) -> i32 { + from_result(|| { + let context =3D context.cast::(); + // SAFETY: context is a valid T::Priv as set in Device::nvmem_= register(). + let context =3D unsafe { &*context }; + let val =3D val.cast::().cast_const(); + // SAFETY: val should be non-null, and allocated for bytes byt= es. + let data =3D unsafe { core::slice::from_raw_parts(val, bytes) = }; + T::write(context, offset, data).map(|()| 0) + }) + } + + /// Optional name. + pub fn with_name(mut self, name: &CStr) -> Self { + self.inner.name =3D name.as_char_ptr(); + self + } + + /// Type of the nvmem storage + pub fn with_type(mut self, type_: Type) -> Self { + self.inner.type_ =3D type_ as u32; + self + } + + /// Device is read-only. + pub fn with_read_only(mut self, read_only: bool) -> Self { + self.inner.read_only =3D read_only; + self + } + + /// Device is accessibly to root only. + pub fn with_root_only(mut self, root_only: bool) -> Self { + self.inner.root_only =3D root_only; + self + } + + /// Device size. + pub fn with_size(mut self, size: i32) -> Self { + self.inner.size =3D size; + self + } + + /// Minimum read/write access granularity. + pub fn with_word_size(mut self, word_size: i32) -> Self { + self.inner.word_size =3D word_size; + self + } + + /// Minimum read/write access stride. + pub fn with_stride(mut self, stride: i32) -> Self { + self.inner.stride =3D stride; + self + } +} + +impl Device { + /// Register a managed nvmem provider on the given device. + pub fn nvmem_register(&self, mut config: NvmemConfig, priv_: &T:= :Priv) + where + T: NvmemProvider + Default, + { + // FIXME: The last cast to mut indicates some unsoundness here. + config.inner.priv_ =3D core::ptr::from_ref(priv_).cast::()= .cast_mut(); + config.inner.dev =3D self.as_raw(); + config.inner.reg_read =3D Some(NvmemConfig::::reg_read); + config.inner.reg_write =3D Some(NvmemConfig::::reg_write); + // SAFETY: Both self and config can=E2=80=99t be null here, and sh= ould have the correct type. + unsafe { bindings::devm_nvmem_register(self.as_raw(), &config.inne= r) }; + } +} + +/// Helper trait to define the callbacks of a nvmem provider. +#[vtable] +pub trait NvmemProvider { + /// The type passed into the context for read and write functions. + type Priv; + + /// Callback to read data. + #[inline] + fn read(_context: &Self::Priv, _offset: u32, _data: &mut [u8]) -> Resu= lt { + build_error!(VTABLE_DEFAULT_ERROR) + } + + /// Callback to write data. + #[inline] + fn write(_context: &Self::Priv, _offset: u32, _data: &[u8]) -> Result { + build_error!(VTABLE_DEFAULT_ERROR) + } +} --=20 2.52.0