From nobody Sun Feb 8 18:24:03 2026 Received: from luna.linkmauve.fr (luna.linkmauve.fr [82.65.109.163]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3F9FC18DF9D; Wed, 4 Feb 2026 04:05:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=82.65.109.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770177912; cv=none; b=C3KZQ8duNQNNIWx0xNOT6hGa4zYzFR3jAzo/Abo4OsJWwhoeED68qJHcaoF7Ea+z8CvVUpda9Z38DXfFoxEzLALgQ1mpWyhSWBLOUyDq1+tQznkcHtgQICnQtMGZpZ3q0Xu/HVNJF3Q6uNX3C+Q+AvyZKESNp/6x3kDU4O6mr8g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770177912; c=relaxed/simple; bh=ID/e4DrwQ85n/9a+ACgHDCPIBAXh23ub43sRYUtSBO0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ji4c6k7MuqYE1qkZfXAZK/lBBKTtpjSNMkjpLC5OEVRDSJ5Yw01Qgnl5lGumiWv2iSZsTaGHKCn2QR2pc21brrkzvAOD+CDe9Ne+ww8pU39qBdE3Ze8+9qPT1fXwynJpRqz1S1GzJVWfUEBE5HT/YjP8h9yzzPygG2LYc1Vorcg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=linkmauve.fr; spf=pass smtp.mailfrom=linkmauve.fr; arc=none smtp.client-ip=82.65.109.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=linkmauve.fr Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linkmauve.fr Received: by luna.linkmauve.fr (Postfix, from userid 1000) id 10FA7F43B49; Wed, 04 Feb 2026 05:05:08 +0100 (CET) From: Link Mauve To: rust-for-linux@vger.kernel.org Cc: Link Mauve , Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , "Christophe Leroy (CS GROUP)" , Srinivas Kandagatla , Miguel Ojeda , Boqun Feng , Gary Guo , =?UTF-8?q?Bj=C3=B6rn=20Roy=20Baron?= , Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , Danilo Krummrich , Daniel Almeida , Ard Biesheuvel , "Martin K. Petersen" , Eric Biggers , Greg Kroah-Hartman , Lyude Paul , Asahi Lina , Viresh Kumar , Lorenzo Stoakes , Tamir Duberstein , FUJITA Tomonori , linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, officialTechflashYT@gmail.com, Ash Logan , Roberto Van Eeden , =?UTF-8?q?Jonathan=20Neusch=C3=A4fer?= Subject: [PATCH v2 1/4] rust: io: Add big-endian read and write functions Date: Wed, 4 Feb 2026 05:04:58 +0100 Message-ID: <20260204040505.8447-2-linkmauve@linkmauve.fr> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260204040505.8447-1-linkmauve@linkmauve.fr> References: <20260204040505.8447-1-linkmauve@linkmauve.fr> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Another option would be to call u32::swap_bytes() on the data being read/written, but these helpers make the Rust code as ergonomic as the C code. Signed-off-by: Link Mauve --- rust/helpers/io.c | 34 ++++++++++++++++++++++++++++++++++ rust/kernel/io.rs | 18 ++++++++++++++++++ 2 files changed, 52 insertions(+) diff --git a/rust/helpers/io.c b/rust/helpers/io.c index c475913c69e6..514ad0377327 100644 --- a/rust/helpers/io.c +++ b/rust/helpers/io.c @@ -40,6 +40,23 @@ u64 rust_helper_readq(const void __iomem *addr) } #endif =20 +u16 rust_helper_ioread16be(const void __iomem *addr) +{ + return ioread16be(addr); +} + +u32 rust_helper_ioread32be(const void __iomem *addr) +{ + return ioread32be(addr); +} + +#ifdef CONFIG_64BIT +u64 rust_helper_ioread64be(const void __iomem *addr) +{ + return ioread64be(addr); +} +#endif + void rust_helper_writeb(u8 value, void __iomem *addr) { writeb(value, addr); @@ -62,6 +79,23 @@ void rust_helper_writeq(u64 value, void __iomem *addr) } #endif =20 +void rust_helper_iowrite16be(u16 value, void __iomem *addr) +{ + iowrite16be(value, addr); +} + +void rust_helper_iowrite32be(u32 value, void __iomem *addr) +{ + iowrite32be(value, addr); +} + +#ifdef CONFIG_64BIT +void rust_helper_iowrite64be(u64 value, void __iomem *addr) +{ + iowrite64be(value, addr); +} +#endif + u8 rust_helper_readb_relaxed(const void __iomem *addr) { return readb_relaxed(addr); diff --git a/rust/kernel/io.rs b/rust/kernel/io.rs index 98e8b84e68d1..e6912e7ff036 100644 --- a/rust/kernel/io.rs +++ b/rust/kernel/io.rs @@ -256,6 +256,15 @@ fn io_addr_assert(&self, offset: usize) -> usize { readq -> u64 ); =20 + define_read!(read16be, try_read16be, ioread16be -> u16); + define_read!(read32be, try_read32be, ioread32be -> u32); + define_read!( + #[cfg(CONFIG_64BIT)] + read64be, + try_read64be, + ioread64be -> u64 + ); + define_read!(read8_relaxed, try_read8_relaxed, readb_relaxed -> u8); define_read!(read16_relaxed, try_read16_relaxed, readw_relaxed -> u16); define_read!(read32_relaxed, try_read32_relaxed, readl_relaxed -> u32); @@ -276,6 +285,15 @@ fn io_addr_assert(&self, offset: usize) -> usize { writeq <- u64 ); =20 + define_write!(write16be, try_write16be, iowrite16be <- u16); + define_write!(write32be, try_write32be, iowrite32be <- u32); + define_write!( + #[cfg(CONFIG_64BIT)] + write64be, + try_write64be, + iowrite64be <- u64 + ); + define_write!(write8_relaxed, try_write8_relaxed, writeb_relaxed <- u8= ); define_write!(write16_relaxed, try_write16_relaxed, writew_relaxed <- = u16); define_write!(write32_relaxed, try_write32_relaxed, writel_relaxed <- = u32); --=20 2.52.0 From nobody Sun Feb 8 18:24:03 2026 Received: from luna.linkmauve.fr (luna.linkmauve.fr [82.65.109.163]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A3B5A1EDA2B; Wed, 4 Feb 2026 04:05:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=82.65.109.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770177913; cv=none; b=DtcsV83wm9Fdf39UkvQAU+YBrlFzdP6BtbkKzsO6lwYtWYhBXQRtAdLHPB0qEmJdeefXF8FBeJf9YBthIqsp6/FPbNBaDlMEmEoKoXsk2lP87ZePA+JuMO01I0nZMVsAMsCqVasNkg8sn6lKiO+0DKSNT6U6FpgX+B1C8tJawJE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770177913; c=relaxed/simple; bh=slNkKm0yRV2q6+pcCcsATZKyQSaIL+u8wuuFViefyBU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ZudIe9L7ADwvxPfRvXI02LC1EL97re1KxZnMJjqokUmKDy8CHGByEjQWVEB/lvpkJaq+7VmrEqIWRX9/KJDHrKmQZuXImjnncbX3aLSjhiL3owFE3oHXcuKB4C8tGXkVmdRpGXeLXC20eBHJp+hdU1QMHi4r/vLQVbp6JsBtcrg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=linkmauve.fr; spf=pass smtp.mailfrom=linkmauve.fr; arc=none smtp.client-ip=82.65.109.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=linkmauve.fr Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linkmauve.fr Received: by luna.linkmauve.fr (Postfix, from userid 1000) id D26EAF43B4A; Wed, 04 Feb 2026 05:05:08 +0100 (CET) From: Link Mauve To: rust-for-linux@vger.kernel.org Cc: Link Mauve , Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , "Christophe Leroy (CS GROUP)" , Srinivas Kandagatla , Miguel Ojeda , Boqun Feng , Gary Guo , =?UTF-8?q?Bj=C3=B6rn=20Roy=20Baron?= , Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , Danilo Krummrich , Daniel Almeida , Ard Biesheuvel , "Martin K. Petersen" , Eric Biggers , Greg Kroah-Hartman , Lyude Paul , Asahi Lina , Viresh Kumar , Lorenzo Stoakes , Tamir Duberstein , FUJITA Tomonori , linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, officialTechflashYT@gmail.com, Ash Logan , Roberto Van Eeden , =?UTF-8?q?Jonathan=20Neusch=C3=A4fer?= Subject: [PATCH v2 2/4] rust: nvmem: Add an abstraction for nvmem providers Date: Wed, 4 Feb 2026 05:04:59 +0100 Message-ID: <20260204040505.8447-3-linkmauve@linkmauve.fr> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260204040505.8447-1-linkmauve@linkmauve.fr> References: <20260204040505.8447-1-linkmauve@linkmauve.fr> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable This is my very first Rust abstraction in the kernel, I took inspiration from various other abstractions that had already been written. I only implemented enough to rewrite a very simple driver I wrote in the past, in order to test the API and make sure it=E2=80=99s at least as ergon= omic as the C version, without any unsafe at all. Signed-off-by: Link Mauve --- rust/bindings/bindings_helper.h | 1 + rust/kernel/lib.rs | 2 + rust/kernel/nvmem.rs | 163 ++++++++++++++++++++++++++++++++ 3 files changed, 166 insertions(+) create mode 100644 rust/kernel/nvmem.rs diff --git a/rust/bindings/bindings_helper.h b/rust/bindings/bindings_helpe= r.h index a067038b4b42..522a76b2e294 100644 --- a/rust/bindings/bindings_helper.h +++ b/rust/bindings/bindings_helper.h @@ -65,6 +65,7 @@ #include #include #include +#include #include #include #include diff --git a/rust/kernel/lib.rs b/rust/kernel/lib.rs index 696f62f85eb5..97f3fc1e8e12 100644 --- a/rust/kernel/lib.rs +++ b/rust/kernel/lib.rs @@ -118,6 +118,8 @@ #[cfg(CONFIG_NET)] pub mod net; pub mod num; +#[cfg(CONFIG_NVMEM)] +pub mod nvmem; pub mod of; #[cfg(CONFIG_PM_OPP)] pub mod opp; diff --git a/rust/kernel/nvmem.rs b/rust/kernel/nvmem.rs new file mode 100644 index 000000000000..4b81fd65c9a7 --- /dev/null +++ b/rust/kernel/nvmem.rs @@ -0,0 +1,163 @@ +// SPDX-License-Identifier: GPL-2.0 + +//! nvmem framework provider. +//! +//! Copyright (C) 2026 Link Mauve + +use crate::build_error; +use crate::device::Device; +use crate::error::{from_result, VTABLE_DEFAULT_ERROR}; +use crate::prelude::*; +use core::marker::PhantomData; +use macros::vtable; + +/// The possible types for a nvmem provider. +#[derive(Default)] +#[repr(u32)] +pub enum Type { + /// The type of memory is unknown. + #[default] + Unknown =3D bindings::nvmem_type_NVMEM_TYPE_UNKNOWN, + + /// Electrically erasable programmable ROM. + Eeprom =3D bindings::nvmem_type_NVMEM_TYPE_EEPROM, + + /// One-time programmable memory. + Otp =3D bindings::nvmem_type_NVMEM_TYPE_OTP, + + /// This memory is backed by a battery. + BatteryBacked =3D bindings::nvmem_type_NVMEM_TYPE_BATTERY_BACKED, + + /// Ferroelectric RAM. + Fram =3D bindings::nvmem_type_NVMEM_TYPE_FRAM, +} + +/// nvmem configuration. +/// +/// Rust abstraction for the C `struct nvmem_config`. +#[derive(Default)] +#[repr(transparent)] +pub struct NvmemConfig { + inner: bindings::nvmem_config, + _p: PhantomData, +} + +impl NvmemConfig { + /// NvmemConfig's read callback. + /// + /// SAFETY: Called from C. Inputs must be valid pointers. + extern "C" fn reg_read( + context: *mut c_void, + offset: u32, + val: *mut c_void, + bytes: usize, + ) -> i32 { + from_result(|| { + let context =3D context.cast::(); + // SAFETY: context is a valid T::Priv as set in Device::nvmem_= register(). + let context =3D unsafe { &*context }; + let val =3D val.cast::(); + // SAFETY: val should be non-null, and allocated for bytes byt= es. + let data =3D unsafe { core::slice::from_raw_parts_mut(val, byt= es) }; + T::read(context, offset, data).map(|()| 0) + }) + } + + /// NvmemConfig's write callback. + /// + /// SAFETY: Called from C. Inputs must be valid pointers. + extern "C" fn reg_write( + context: *mut c_void, + offset: u32, + // TODO: Change val from void* to const void* in the C API! + val: *mut c_void, + bytes: usize, + ) -> i32 { + from_result(|| { + let context =3D context.cast::(); + // SAFETY: context is a valid T::Priv as set in Device::nvmem_= register(). + let context =3D unsafe { &*context }; + let val =3D val.cast::().cast_const(); + // SAFETY: val should be non-null, and allocated for bytes byt= es. + let data =3D unsafe { core::slice::from_raw_parts(val, bytes) = }; + T::write(context, offset, data).map(|()| 0) + }) + } + + /// Optional name. + pub fn with_name(mut self, name: &CStr) -> Self { + self.inner.name =3D name.as_char_ptr(); + self + } + + /// Type of the nvmem storage + pub fn with_type(mut self, type_: Type) -> Self { + self.inner.type_ =3D type_ as u32; + self + } + + /// Device is read-only. + pub fn with_read_only(mut self, read_only: bool) -> Self { + self.inner.read_only =3D read_only; + self + } + + /// Device is accessibly to root only. + pub fn with_root_only(mut self, root_only: bool) -> Self { + self.inner.root_only =3D root_only; + self + } + + /// Device size. + pub fn with_size(mut self, size: i32) -> Self { + self.inner.size =3D size; + self + } + + /// Minimum read/write access granularity. + pub fn with_word_size(mut self, word_size: i32) -> Self { + self.inner.word_size =3D word_size; + self + } + + /// Minimum read/write access stride. + pub fn with_stride(mut self, stride: i32) -> Self { + self.inner.stride =3D stride; + self + } +} + +impl Device { + /// Register a managed nvmem provider on the given device. + pub fn nvmem_register(&self, mut config: NvmemConfig, priv_: &T:= :Priv) + where + T: NvmemProvider + Default, + { + // FIXME: The last cast to mut indicates some unsoundness here. + config.inner.priv_ =3D core::ptr::from_ref(priv_).cast::()= .cast_mut(); + config.inner.dev =3D self.as_raw(); + config.inner.reg_read =3D Some(NvmemConfig::::reg_read); + config.inner.reg_write =3D Some(NvmemConfig::::reg_write); + // SAFETY: Both self and config can=E2=80=99t be null here, and sh= ould have the correct type. + unsafe { bindings::devm_nvmem_register(self.as_raw(), &config.inne= r) }; + } +} + +/// Helper trait to define the callbacks of a nvmem provider. +#[vtable] +pub trait NvmemProvider { + /// The type passed into the context for read and write functions. + type Priv; + + /// Callback to read data. + #[inline] + fn read(_context: &Self::Priv, _offset: u32, _data: &mut [u8]) -> Resu= lt { + build_error!(VTABLE_DEFAULT_ERROR) + } + + /// Callback to write data. + #[inline] + fn write(_context: &Self::Priv, _offset: u32, _data: &[u8]) -> Result { + build_error!(VTABLE_DEFAULT_ERROR) + } +} --=20 2.52.0 From nobody Sun Feb 8 18:24:03 2026 Received: from luna.linkmauve.fr (luna.linkmauve.fr [82.65.109.163]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E7D8B2EDD62; Wed, 4 Feb 2026 04:05:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=82.65.109.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770177914; cv=none; b=LdIRL9A9M/ZpIdQzfX5I3BzoeDSp9uEKv+jU2RjPUXvARk/LfrClQ3DpJj1iQgCMs24tw1UFFowRDCyCqnbKPjmPvFlQH621Lotn9CbwzhOEr5QIcfTj8XidtWLDOxjoHw+1I4bFsfOahpJOtWj2Zu4d+faPKUeQxuHInBDkICM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770177914; c=relaxed/simple; bh=Adbe+MoUbMJhR/PWn8a3amGxXBQI+E3gwE0Jto84gzQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=gHYumVE1mm6QxYqI126+YLae9pOvvGIVOuNej/A5k4KBK8bAfbIWHiBf4FuXACD727fjsy0cI2uJ5A1rsfW8DJ3huYKEyeyZ3kugavaOfk3VT8tg9pSOpTF0OfrsnjvuMXFIB3s2FkEC9dbbUJ/DN8KbbluwEHyZfULLy18lVFw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=linkmauve.fr; spf=pass smtp.mailfrom=linkmauve.fr; arc=none smtp.client-ip=82.65.109.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=linkmauve.fr Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linkmauve.fr Received: by luna.linkmauve.fr (Postfix, from userid 1000) id EE3ADF43B4B; Wed, 04 Feb 2026 05:05:09 +0100 (CET) From: Link Mauve To: rust-for-linux@vger.kernel.org Cc: Link Mauve , Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , "Christophe Leroy (CS GROUP)" , Srinivas Kandagatla , Miguel Ojeda , Boqun Feng , Gary Guo , =?UTF-8?q?Bj=C3=B6rn=20Roy=20Baron?= , Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , Danilo Krummrich , Daniel Almeida , Ard Biesheuvel , "Martin K. Petersen" , Eric Biggers , Greg Kroah-Hartman , Lyude Paul , Asahi Lina , Viresh Kumar , Lorenzo Stoakes , Tamir Duberstein , FUJITA Tomonori , linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, officialTechflashYT@gmail.com, Ash Logan , Roberto Van Eeden , =?UTF-8?q?Jonathan=20Neusch=C3=A4fer?= Subject: [PATCH v2 3/4] nvmem: Replace the Wii and Wii U OTP driver with a Rust one Date: Wed, 4 Feb 2026 05:05:00 +0100 Message-ID: <20260204040505.8447-4-linkmauve@linkmauve.fr> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260204040505.8447-1-linkmauve@linkmauve.fr> References: <20260204040505.8447-1-linkmauve@linkmauve.fr> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable I wrote this driver long ago, and wanted to try seeing how hard it would be to convert it to Rust. It is a very simple driver, we write the address we want to read in one memory address, and read the data from a second memory address. A third memory address can be used to disable all reads in a range until the system has been rebooted, but I didn=E2=80=99t find any reason to expose th= at feature. I made sure to use no unsafe in this driver, to make sure the API exposed in the previous commit is usable. Ideally we wouldn=E2=80=99t have to impl the write() function in NintendoOtpProvider, but currently the vtable requires both. I have tested this driver only on a Wii so far, but I assume it will work the same on a Wii U, just exposing more memory banks. Signed-off-by: Link Mauve --- drivers/nvmem/Kconfig | 1 + drivers/nvmem/Makefile | 2 +- drivers/nvmem/nintendo-otp.c | 122 -------------------------------- drivers/nvmem/nintendo_otp.rs | 127 ++++++++++++++++++++++++++++++++++ 4 files changed, 129 insertions(+), 123 deletions(-) delete mode 100644 drivers/nvmem/nintendo-otp.c create mode 100644 drivers/nvmem/nintendo_otp.rs diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig index bf47a982cf62..c23d338f820a 100644 --- a/drivers/nvmem/Kconfig +++ b/drivers/nvmem/Kconfig @@ -241,6 +241,7 @@ config NVMEM_MXS_OCOTP =20 config NVMEM_NINTENDO_OTP tristate "Nintendo Wii and Wii U OTP Support" + depends on RUST depends on WII || COMPILE_TEST help This is a driver exposing the OTP of a Nintendo Wii or Wii U console. diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile index 7252b8ec88d4..3d40a0a23f76 100644 --- a/drivers/nvmem/Makefile +++ b/drivers/nvmem/Makefile @@ -51,7 +51,7 @@ nvmem_mtk-efuse-y :=3D mtk-efuse.o obj-$(CONFIG_NVMEM_MXS_OCOTP) +=3D nvmem-mxs-ocotp.o nvmem-mxs-ocotp-y :=3D mxs-ocotp.o obj-$(CONFIG_NVMEM_NINTENDO_OTP) +=3D nvmem-nintendo-otp.o -nvmem-nintendo-otp-y :=3D nintendo-otp.o +nvmem-nintendo-otp-y :=3D nintendo_otp.o obj-$(CONFIG_NVMEM_QCOM_QFPROM) +=3D nvmem_qfprom.o nvmem_qfprom-y :=3D qfprom.o obj-$(CONFIG_NVMEM_QCOM_SEC_QFPROM) +=3D nvmem_sec_qfprom.o diff --git a/drivers/nvmem/nintendo-otp.c b/drivers/nvmem/nintendo-otp.c deleted file mode 100644 index 355e7f1fc6d5..000000000000 --- a/drivers/nvmem/nintendo-otp.c +++ /dev/null @@ -1,122 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Nintendo Wii and Wii=C2=A0U OTP driver - * - * This is a driver exposing the OTP of a Nintendo Wii or Wii=C2=A0U conso= le. - * - * This memory contains common and per-console keys, signatures and - * related data required to access peripherals. - * - * Based on reversed documentation from https://wiiubrew.org/wiki/Hardware= /OTP - * - * Copyright (C) 2021 Emmanuel Gil Peyrot - */ - -#include -#include -#include -#include -#include -#include -#include - -#define HW_OTPCMD 0 -#define HW_OTPDATA 4 -#define OTP_READ 0x80000000 -#define BANK_SIZE 128 -#define WORD_SIZE 4 - -struct nintendo_otp_priv { - void __iomem *regs; -}; - -struct nintendo_otp_devtype_data { - const char *name; - unsigned int num_banks; -}; - -static const struct nintendo_otp_devtype_data hollywood_otp_data =3D { - .name =3D "wii-otp", - .num_banks =3D 1, -}; - -static const struct nintendo_otp_devtype_data latte_otp_data =3D { - .name =3D "wiiu-otp", - .num_banks =3D 8, -}; - -static int nintendo_otp_reg_read(void *context, - unsigned int reg, void *_val, size_t bytes) -{ - struct nintendo_otp_priv *priv =3D context; - u32 *val =3D _val; - int words =3D bytes / WORD_SIZE; - u32 bank, addr; - - while (words--) { - bank =3D (reg / BANK_SIZE) << 8; - addr =3D (reg / WORD_SIZE) % (BANK_SIZE / WORD_SIZE); - iowrite32be(OTP_READ | bank | addr, priv->regs + HW_OTPCMD); - *val++ =3D ioread32be(priv->regs + HW_OTPDATA); - reg +=3D WORD_SIZE; - } - - return 0; -} - -static const struct of_device_id nintendo_otp_of_table[] =3D { - { .compatible =3D "nintendo,hollywood-otp", .data =3D &hollywood_otp_data= }, - { .compatible =3D "nintendo,latte-otp", .data =3D &latte_otp_data }, - {/* sentinel */}, -}; -MODULE_DEVICE_TABLE(of, nintendo_otp_of_table); - -static int nintendo_otp_probe(struct platform_device *pdev) -{ - struct device *dev =3D &pdev->dev; - const struct of_device_id *of_id =3D - of_match_device(nintendo_otp_of_table, dev); - struct nvmem_device *nvmem; - struct nintendo_otp_priv *priv; - - struct nvmem_config config =3D { - .stride =3D WORD_SIZE, - .word_size =3D WORD_SIZE, - .reg_read =3D nintendo_otp_reg_read, - .read_only =3D true, - .root_only =3D true, - }; - - priv =3D devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); - if (!priv) - return -ENOMEM; - - priv->regs =3D devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(priv->regs)) - return PTR_ERR(priv->regs); - - if (of_id->data) { - const struct nintendo_otp_devtype_data *data =3D of_id->data; - config.name =3D data->name; - config.size =3D data->num_banks * BANK_SIZE; - } - - config.dev =3D dev; - config.priv =3D priv; - - nvmem =3D devm_nvmem_register(dev, &config); - - return PTR_ERR_OR_ZERO(nvmem); -} - -static struct platform_driver nintendo_otp_driver =3D { - .probe =3D nintendo_otp_probe, - .driver =3D { - .name =3D "nintendo-otp", - .of_match_table =3D nintendo_otp_of_table, - }, -}; -module_platform_driver(nintendo_otp_driver); -MODULE_AUTHOR("Emmanuel Gil Peyrot "); -MODULE_DESCRIPTION("Nintendo Wii and Wii U OTP driver"); -MODULE_LICENSE("GPL v2"); diff --git a/drivers/nvmem/nintendo_otp.rs b/drivers/nvmem/nintendo_otp.rs new file mode 100644 index 000000000000..04ba3591d674 --- /dev/null +++ b/drivers/nvmem/nintendo_otp.rs @@ -0,0 +1,127 @@ +// SPDX-License-Identifier: GPL-2.0-only + +//! Nintendo Wii and Wii=C2=A0U OTP driver +//! +//! This is a driver exposing the OTP of a Nintendo Wii or Wii=C2=A0U cons= ole. +//! +//! This memory contains common and per-console keys, signatures and +//! related data required to access peripherals. +//! +//! Based on reversed documentation from https://wiiubrew.org/wiki/Hardwar= e/OTP +//! +//! Copyright (C) 2021 Link Mauve + +use kernel::{ + device::Core, + devres::Devres, + io::{mem::ExclusiveIoMem, Io}, + nvmem::{self, NvmemConfig, NvmemProvider}, + of::{DeviceId, IdTable}, + platform, + prelude::*, +}; + +const HW_OTPCMD: usize =3D 0; +const HW_OTPDATA: usize =3D 4; +const OTP_READ: u32 =3D 0x80000000; +const BANK_SIZE: u32 =3D 128; +const WORD_SIZE: u32 =3D 4; + +struct Info { + name: &'static CStr, + num_banks: u32, +} + +const WII_INFO: Info =3D Info { + name: c"wii-otp", + num_banks: 1, +}; + +const WIIU_INFO: Info =3D Info { + name: c"wiiu-otp", + num_banks: 8, +}; + +struct NintendoOtpDriver { + #[expect(dead_code)] + iomem: Pin>>>, +} + +kernel::of_device_table!( + OF_TABLE, + MODULE_OF_TABLE, + ::IdInfo, + [ + (DeviceId::new(c"nintendo,hollywood-otp"), WII_INFO), + (DeviceId::new(c"nintendo,latte-otp"), WIIU_INFO), + ] +); + +#[derive(Default)] +struct NintendoOtpProvider; + +#[vtable] +impl NvmemProvider for NintendoOtpProvider { + type Priv =3D Io<8>; + + fn read(io: &Self::Priv, mut reg: u32, mut data: &mut [u8]) -> Result { + while let Some(bytes) =3D data.split_off_mut(..4) { + let bank =3D (reg / BANK_SIZE) << 8; + let addr =3D (reg / WORD_SIZE) % (BANK_SIZE / WORD_SIZE); + io.write32be(OTP_READ | bank | addr, HW_OTPCMD); + let elem =3D io.read32be(HW_OTPDATA); + bytes.copy_from_slice(&elem.to_be_bytes()); + reg +=3D WORD_SIZE; + } + + Ok(()) + } + + fn write(_context: &Self::Priv, _offset: u32, _data: &[u8]) -> Result { + Err(ENODEV) + } +} + +impl platform::Driver for NintendoOtpDriver { + type IdInfo =3D Info; + const OF_ID_TABLE: Option> =3D Some(&OF_TABLE); + + fn probe( + pdev: &platform::Device, + info: Option<&Self::IdInfo>, + ) -> impl PinInit { + let dev =3D pdev.as_ref(); + + let Some(Info { name, num_banks }) =3D info else { + return Err(EINVAL); + }; + + dev_info!(dev, "got '{name}', num_banks =3D {num_banks}\n"); + + let request =3D pdev.io_request_by_index(0).ok_or(ENODEV)?; + let iomem =3D request.iomap_exclusive_sized::<8>(); + let iomem =3D KBox::pin_init(iomem, GFP_KERNEL)?; + let io =3D iomem.access(dev)?; + + let config =3D NvmemConfig::::default() + .with_name(name) + .with_type(nvmem::Type::Otp) + .with_size((num_banks * BANK_SIZE) as i32) + .with_word_size(WORD_SIZE as i32) + .with_stride(WORD_SIZE as i32) + .with_read_only(true) + .with_root_only(true); + + dev.nvmem_register(config, io); + + Ok(Self { iomem }) + } +} + +kernel::module_platform_driver! { + type: NintendoOtpDriver, + name: "nintendo-otp", + authors: ["Link Mauve "], + description: "Nintendo Wii and Wii U OTP driver", + license: "GPL v2", +} --=20 2.52.0 From nobody Sun Feb 8 18:24:03 2026 Received: from luna.linkmauve.fr (luna.linkmauve.fr [82.65.109.163]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 378962F0C79; Wed, 4 Feb 2026 04:05:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=82.65.109.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770177914; cv=none; b=UTa7vQ96HOrmsJOFZBXVqLNznNXn0lslyajPjIhcgwvCM+P4ZXzDprBwkrsuycvXXmGN+G1SQze9J1IVvQyE2N8uDr1TJaBVdjl61tVU5Np7LwatEpKvPmgJf54gdu5Dtn4csZH0e9cY+CevlZ6l05lbebd3lAsU+5R12pa+4gU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770177914; c=relaxed/simple; bh=i6B46l/QNgnb/riKaNTbsLdUqBhxpAy8DRQFk+QCLqs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=QBJTOIj6CTU+0ZFZLic1RMCzyK02jx7FYfYzxxDhVu9qLhWMHDx5uGXRiPmeCre/VeTi4VYGYkRrkCMvm/9AtvcW1PL11usmecqHtwAORPI1B0G8ivrjO9S9wM+MKq0e/Hm1Y0InLMoFtC4283st3TNqhe/Mqif4bNJkPoB5ihA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=linkmauve.fr; spf=pass smtp.mailfrom=linkmauve.fr; arc=none smtp.client-ip=82.65.109.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=linkmauve.fr Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linkmauve.fr Received: by luna.linkmauve.fr (Postfix, from userid 1000) id 9C58BF43B4C; Wed, 04 Feb 2026 05:05:10 +0100 (CET) From: Link Mauve To: rust-for-linux@vger.kernel.org Cc: Link Mauve , Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , "Christophe Leroy (CS GROUP)" , Srinivas Kandagatla , Miguel Ojeda , Boqun Feng , Gary Guo , =?UTF-8?q?Bj=C3=B6rn=20Roy=20Baron?= , Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , Danilo Krummrich , Daniel Almeida , Ard Biesheuvel , "Martin K. Petersen" , Eric Biggers , Greg Kroah-Hartman , Lyude Paul , Asahi Lina , Viresh Kumar , Lorenzo Stoakes , Tamir Duberstein , FUJITA Tomonori , linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, officialTechflashYT@gmail.com, Ash Logan , Roberto Van Eeden , =?UTF-8?q?Jonathan=20Neusch=C3=A4fer?= Subject: [PATCH v2 4/4] powerpc: wii_defconfig: Enable Rust Date: Wed, 4 Feb 2026 05:05:01 +0100 Message-ID: <20260204040505.8447-5-linkmauve@linkmauve.fr> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260204040505.8447-1-linkmauve@linkmauve.fr> References: <20260204040505.8447-1-linkmauve@linkmauve.fr> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The nintendo-otp driver now depends on Rust, so let=E2=80=99s enable it on = this platform. Signed-off-by: Link Mauve --- arch/powerpc/configs/wii_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/powerpc/configs/wii_defconfig b/arch/powerpc/configs/wii_= defconfig index 7c714a19221e..b1172249e783 100644 --- a/arch/powerpc/configs/wii_defconfig +++ b/arch/powerpc/configs/wii_defconfig @@ -18,6 +18,7 @@ CONFIG_WII=3Dy # CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set CONFIG_PREEMPT=3Dy CONFIG_BINFMT_MISC=3Dm +CONFIG_RUST=3Dy CONFIG_KEXEC=3Dy # CONFIG_SECCOMP is not set CONFIG_ADVANCED_OPTIONS=3Dy --=20 2.52.0