From nobody Tue Feb 10 01:35:21 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 501C64219F3; Wed, 4 Feb 2026 15:04:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770217444; cv=none; b=CP9SQd2pPSbJl2dQGeKMMmlvbgC3ChZg0lj0TLTJDTTj/EoIL2cSLWYJY7+o7ZcekDamHEXmS/nULcZMYwG0jJaF64XshM+9pNohWog7J1QQM/RWC1OGCmOB1yJ8D2TR2WtNvofka3CHPsSrVLbz9eW02nFz6vND5yeEkZRuO1E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770217444; c=relaxed/simple; bh=JlQBEWovYtEQvZX5Zd29IiK4tUStCNlnQYb0ISvwx0g=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=WDAr9oSttuywmq5bRwRS4zkNQ5SEbBlySBJ8l+jbGpCBioDpHfOD4cwY4leiu3AFIDoFAimfAvuDSUwZy1EFnByqTlj0aBAFNWmjupESoDgHpKTH4kUYCmR+XLhVBmLszhlWQxJCZRptomDMTMmQ1IMAsc/GROZNU80GqSTFENg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=ZCSrqrTT; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="ZCSrqrTT" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id DF18B4E423FD; Wed, 4 Feb 2026 15:04:02 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id B5E3860705; Wed, 4 Feb 2026 15:04:02 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 67A49119A88EE; Wed, 4 Feb 2026 16:04:00 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1770217441; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=6p/0qkc9q0L2/MssP3yQd880K7+7RE4DlFTVxL15zFA=; b=ZCSrqrTT7qItPTh+z40JnQByUb2lwIz4PjdthHG9fgt5UScshEnAQ81YEANT6bBsp3gf2y MIp8EKA1mlFTyH74M+vGtnDg2Oa1rSWhZ8w7q97ahLxfyX3MdnGYDxKZdYeAaYLtO5Qu7W 4bXML6sAvW03JYoyUeolt3/aQHi1j+VAS8HD/mFEIxENxMmzzNwCfrhr0Zbfr3pFJuyann 1sY0FXeDXAF2Bl7qnVHo525TgnQeMFYjuL4/5McdLjdJQBWFZ/undIcSpKY7MzdSnYzWO5 KXRl9UV9G1VwuVN0YQiiajlLtkwABpV7YRaU9ZIpHzfe0ARnJ3vNzjqmwJdevQ== From: "Thomas Richard (TI)" Date: Wed, 04 Feb 2026 16:03:40 +0100 Subject: [PATCH v4 3/4] clk: keystone: sci-clk: add restore_context() operation Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260204-ti-sci-jacinto-s2r-restore-irq-v4-3-67820af39eac@bootlin.com> References: <20260204-ti-sci-jacinto-s2r-restore-irq-v4-0-67820af39eac@bootlin.com> In-Reply-To: <20260204-ti-sci-jacinto-s2r-restore-irq-v4-0-67820af39eac@bootlin.com> To: Nishanth Menon , Tero Kristo , Santosh Shilimkar , Michael Turquette , Stephen Boyd Cc: Gregory CLEMENT , richard.genoud@bootlin.com, Udit Kumar , Prasanth Mantena , Abhash Kumar , Thomas Petazzoni , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, "Thomas Richard (TI)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 X-Rspamd-Fuzzy: 41a41182b59d79f583916f68cda4ce24371bbb78bb5201448cdda28aa13f7e12f6862ad9c69aaabad6cacf50bd7bcdc4e70062e7913d09bed0cb7f9b3ddaf05c Implement the restore_context() operation to restore the clock rate and the clock parent state. The clock rate is saved in sci_clk struct during set_rate() operation. The parent index is saved in sci_clk struct during set_parent() operation. During clock registration, the core retrieves each clock=E2=80=99s parent using get_parent() operation to ensure the internal = clock tree reflects the actual hardware state, including any configurations made by the bootloader. So we also save the parent index in get_parent(). Signed-off-by: Thomas Richard (TI) --- drivers/clk/keystone/sci-clk.c | 42 ++++++++++++++++++++++++++++++++++----= ---- 1 file changed, 34 insertions(+), 8 deletions(-) diff --git a/drivers/clk/keystone/sci-clk.c b/drivers/clk/keystone/sci-clk.c index 9d5071223f4c..428050a05de3 100644 --- a/drivers/clk/keystone/sci-clk.c +++ b/drivers/clk/keystone/sci-clk.c @@ -47,6 +47,8 @@ struct sci_clk_provider { * @node: Link for handling clocks probed via DT * @cached_req: Cached requested freq for determine rate calls * @cached_res: Cached result freq for determine rate calls + * @parent_id: Parent index for this clock + * @rate: Clock rate */ struct sci_clk { struct clk_hw hw; @@ -58,6 +60,8 @@ struct sci_clk { struct list_head node; unsigned long cached_req; unsigned long cached_res; + u8 parent_id; + unsigned long rate; }; =20 #define to_sci_clk(_hw) container_of(_hw, struct sci_clk, hw) @@ -210,10 +214,16 @@ static int sci_clk_set_rate(struct clk_hw *hw, unsign= ed long rate, unsigned long parent_rate) { struct sci_clk *clk =3D to_sci_clk(hw); + int ret; + + ret =3D clk->provider->ops->set_freq(clk->provider->sci, clk->dev_id, + clk->clk_id, rate / 10 * 9, rate, + rate / 10 * 11); =20 - return clk->provider->ops->set_freq(clk->provider->sci, clk->dev_id, - clk->clk_id, rate / 10 * 9, rate, - rate / 10 * 11); + if (!ret) + clk->rate =3D rate; + + return ret; } =20 /** @@ -237,9 +247,9 @@ static u8 sci_clk_get_parent(struct clk_hw *hw) return 0; } =20 - parent_id =3D parent_id - clk->clk_id - 1; + clk->parent_id =3D (u8)(parent_id - clk->clk_id - 1); =20 - return (u8)parent_id; + return clk->parent_id; } =20 /** @@ -252,12 +262,27 @@ static u8 sci_clk_get_parent(struct clk_hw *hw) static int sci_clk_set_parent(struct clk_hw *hw, u8 index) { struct sci_clk *clk =3D to_sci_clk(hw); + int ret; =20 clk->cached_req =3D 0; =20 - return clk->provider->ops->set_parent(clk->provider->sci, clk->dev_id, - clk->clk_id, - index + 1 + clk->clk_id); + ret =3D clk->provider->ops->set_parent(clk->provider->sci, clk->dev_id, + clk->clk_id, + index + 1 + clk->clk_id); + if (!ret) + clk->parent_id =3D index; + + return ret; +} + +static void sci_clk_restore_context(struct clk_hw *hw) +{ + struct sci_clk *clk =3D to_sci_clk(hw); + + sci_clk_set_parent(hw, clk->parent_id); + + if (clk->rate) + sci_clk_set_rate(hw, clk->rate, 0); } =20 static const struct clk_ops sci_clk_ops =3D { @@ -269,6 +294,7 @@ static const struct clk_ops sci_clk_ops =3D { .set_rate =3D sci_clk_set_rate, .get_parent =3D sci_clk_get_parent, .set_parent =3D sci_clk_set_parent, + .restore_context =3D sci_clk_restore_context, }; =20 /** --=20 2.51.0