From nobody Tue Feb 10 01:59:37 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 62396374755; Tue, 3 Feb 2026 21:46:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770155189; cv=none; b=RZbkZLxlxhaTgu3TpveTvdJEWuaUgL4ltHHZsPNmLdi0t1IOLvF7sxTFaQFYo7sZ6zSqMZZn3b93EnSjtGBBkctqcMp2WE67qN+6Wakd3MZT2oFFQOkAOldgw3KGK9KM+JVgHecga9eRZ8W7DhlKgz4eM1KJektPC166fOAnXNY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770155189; c=relaxed/simple; bh=OGtZspfBefWFzonPI5k0EXoDd9rxrEM9vWFACoDhed4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=alJITK8h6AVhmwAST1VCizO3LENXgcByYJuiV5oztBlP8YUblq+yBULre32bL6ApWX19Bq8RTHZq3viLcN3mkqjcTlCP6HyCxxvqlGqccopUla5mCieSn8bf+2N4TqYB3E3LFblqZWpsNKq+dhwnGJqnFU3yBDjbCiqs2L81MJU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9EE2E339; Tue, 3 Feb 2026 13:46:20 -0800 (PST) Received: from e134344.cambridge.arm.com (e134344.arm.com [10.1.196.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 784AD3F778; Tue, 3 Feb 2026 13:46:21 -0800 (PST) From: Ben Horgan To: ben.horgan@arm.com Cc: amitsinght@marvell.com, baisheng.gao@unisoc.com, baolin.wang@linux.alibaba.com, carl@os.amperecomputing.com, dave.martin@arm.com, david@kernel.org, dfustini@baylibre.com, fenghuay@nvidia.com, gshan@redhat.com, james.morse@arm.com, jonathan.cameron@huawei.com, kobak@nvidia.com, lcherian@marvell.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, peternewman@google.com, punit.agrawal@oss.qualcomm.com, quic_jiles@quicinc.com, reinette.chatre@intel.com, rohit.mathew@arm.com, scott@os.amperecomputing.com, sdonthineni@nvidia.com, tan.shaopeng@fujitsu.com, xhao@linux.alibaba.com, catalin.marinas@arm.com, will@kernel.org, corbet@lwn.net, maz@kernel.org, oupton@kernel.org, joey.gouly@arm.com, suzuki.poulose@arm.com, kvmarm@lists.linux.dev, zengheng4@huawei.com, linux-doc@vger.kernel.org, Shaopeng Tan Subject: [PATCH v4 25/41] arm_mpam: resctrl: Wait for cacheinfo to be ready Date: Tue, 3 Feb 2026 21:43:26 +0000 Message-ID: <20260203214342.584712-26-ben.horgan@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260203214342.584712-1-ben.horgan@arm.com> References: <20260203214342.584712-1-ben.horgan@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In order to calculate the rmid realloc threshold the size of the cache needs to be known. Cache domains will also be named after the cache id. So that this information can be extracted from cacheinfo we need to wait for it to be ready. The cacheinfo information is populated in device_initcall() so we wait for that. Tested-by: Gavin Shan Tested-by: Shaopeng Tan Tested-by: Peter Newman Signed-off-by: James Morse [horgan: split out from another patch] Reviewed-by: Jonathan Cameron Signed-off-by: Ben Horgan --- This is moved into it's own patch to allow all uses of cacheinfo to be valid when they are introduced. --- drivers/resctrl/mpam_resctrl.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/resctrl/mpam_resctrl.c b/drivers/resctrl/mpam_resctrl.c index e3a87464f0ac..25950e667077 100644 --- a/drivers/resctrl/mpam_resctrl.c +++ b/drivers/resctrl/mpam_resctrl.c @@ -16,6 +16,7 @@ #include #include #include +#include =20 #include =20 @@ -45,6 +46,13 @@ static bool exposed_mon_capable; */ static bool cdp_enabled; =20 +/* + * We use cacheinfo to discover the size of the caches and their id. cache= info + * populates this from a device_initcall(). mpam_resctrl_setup() must wait. + */ +static bool cacheinfo_ready; +static DECLARE_WAIT_QUEUE_HEAD(wait_cacheinfo_ready); + bool resctrl_arch_alloc_capable(void) { return exposed_alloc_capable; @@ -770,6 +778,8 @@ int mpam_resctrl_setup(void) struct mpam_resctrl_res *res; enum resctrl_res_level rid; =20 + wait_event(wait_cacheinfo_ready, cacheinfo_ready); + cpus_read_lock(); for_each_mpam_resctrl_control(res, rid) { INIT_LIST_HEAD_RCU(&res->resctrl_res.ctrl_domains); @@ -809,6 +819,15 @@ int mpam_resctrl_setup(void) return 0; } =20 +static int __init __cacheinfo_ready(void) +{ + cacheinfo_ready =3D true; + wake_up(&wait_cacheinfo_ready); + + return 0; +} +device_initcall_sync(__cacheinfo_ready); + #ifdef CONFIG_MPAM_KUNIT_TEST #include "test_mpam_resctrl.c" #endif --=20 2.43.0