From nobody Sun Feb 8 23:06:04 2026 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 62B87344DA7; Tue, 3 Feb 2026 12:43:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770122586; cv=none; b=IxDLlD627jAzxb0KmphjFBtwd2COFjfibgB/pQwu0VjtkoZ4z/eeXfncSIeOjjORWipQmEVvbCXcwl+L1U528evvGRzOP6ayUrVkZRgyLmeUKtQMm1TuHu+WOPhisGNYSvZcrhjiAOhEex0dFDiVX1hFXza0q/Pe/QzB6GYgSKA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770122586; c=relaxed/simple; bh=mBgkmTID+NEO7eE7rcOhcirl/O4tZXLLRlW7B7E+Fio=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=U8HH1B8iivyAt7wkZCZ2oX069tagiQSeGXSYnkE7BcQTLzKtI088EBm39KfuIdsaXrA+j6d9djfbic4Up+QhkokrriWq9bojpugMRsRkv3V4riBJtANIk2+1BIToXFoseE4ddgl+bRMWXYxwF43UiL07Zv/Hucx2pxLAndnN0Aw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: Swbxv3F3T4mxp1xentWd0w== X-CSE-MsgGUID: x2FV4cDnSA+TBUqCCEySHw== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 03 Feb 2026 21:42:58 +0900 Received: from mind-2s.example.org (unknown [10.226.36.118]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id CF2CA40134EE; Tue, 3 Feb 2026 21:42:53 +0900 (JST) From: Fabrizio Castro To: Rob Herring , Guenter Roeck , Michael Turquette , Stephen Boyd , Wim Van Sebroeck , Krzysztof Kozlowski , Geert Uytterhoeven , Conor Dooley , Magnus Damm Cc: Lad Prabhakar , linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Biju Das Subject: [PATCH v2 1/3] dt-bindings: watchdog: renesas,r9a09g057-wdt: Rework example Date: Tue, 3 Feb 2026 12:42:45 +0000 Message-ID: <20260203124247.7320-2-fabrizio.castro.jz@renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260203124247.7320-1-fabrizio.castro.jz@renesas.com> References: <20260203124247.7320-1-fabrizio.castro.jz@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" When the bindings for the Renesas RZ/V2H(P) SoC were factored out IP WDT0 was selected for the example, however the HW user manual states that only IP WDT1 can be used by Linux. This commit is part of a series that removes WDT{0,2,3} support from the kernel, therefore the example from the bindings has lost its meaning. Update the example accordingly. Signed-off-by: Fabrizio Castro Acked-by: Conor Dooley --- v1->v2: * Removed Fixes tag * Added Conor's Acked-by tag .../bindings/watchdog/renesas,r9a09g057-wdt.yaml | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/watchdog/renesas,r9a09g057-w= dt.yaml b/Documentation/devicetree/bindings/watchdog/renesas,r9a09g057-wdt.= yaml index 099200c4f136..975c5aa4d747 100644 --- a/Documentation/devicetree/bindings/watchdog/renesas,r9a09g057-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/renesas,r9a09g057-wdt.yaml @@ -89,11 +89,11 @@ examples: - | #include =20 - watchdog@11c00400 { + watchdog@14400000 { compatible =3D "renesas,r9a09g057-wdt"; - reg =3D <0x11c00400 0x400>; - clocks =3D <&cpg CPG_MOD 0x4b>, <&cpg CPG_MOD 0x4c>; + reg =3D <0x14400000 0x400>; + clocks =3D <&cpg CPG_MOD 0x4d>, <&cpg CPG_MOD 0x4e>; clock-names =3D "pclk", "oscclk"; - resets =3D <&cpg 0x75>; + resets =3D <&cpg 0x76>; power-domains =3D <&cpg>; }; --=20 2.34.1 From nobody Sun Feb 8 23:06:04 2026 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 8158A346777; Tue, 3 Feb 2026 12:43:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770122589; cv=none; b=tF18QfJM+KsqZ8AJW/3s5v0CTPTD4yVn/AOO+CM56FlQMFPW35yzlw8ea+5Ij0nuLAISlUeBSfcYpgKab4yxsCiRcOjT7l0LvG1Ttmj4jVhjCpuwhoriBEfFoxm6PLFbDhncN/pngiMQo57iVymhFqY7fn4zi2eVUpzzuRlZpZw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770122589; c=relaxed/simple; bh=5bX7wrIWf/xJkRhW09duvPVbKy38n0Uz8+BAuS02c5k=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=dVYiYtfv2xhvFAwDdT2lOIB+1nB8uMViaLVcxzmA7rQ6ufEFPJfeXL7NHS3RrirRXg+yFUNKDzhOPOYhByYtONNUqPM73+zAEPDCIojVrKnqe/pZZ18qo2wSuM17uUusCIuerl7Fh5HaysDkNza0BY9T6pUJisV3jPpzwaIz5w0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: n4Y1FAuJRLeAtyEOjm157A== X-CSE-MsgGUID: 0idDbr/tQzeND+6zcKfbXA== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 03 Feb 2026 21:43:03 +0900 Received: from mind-2s.example.org (unknown [10.226.36.118]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 1B203400F78B; Tue, 3 Feb 2026 21:42:58 +0900 (JST) From: Fabrizio Castro To: Rob Herring , Guenter Roeck , Michael Turquette , Stephen Boyd , Wim Van Sebroeck , Krzysztof Kozlowski , Geert Uytterhoeven , Conor Dooley , Magnus Damm Cc: Lad Prabhakar , linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Biju Das Subject: [PATCH v2 2/3] arm64: dts: renesas: r9a09g057: Remove wdt{0,2,3} nodes Date: Tue, 3 Feb 2026 12:42:46 +0000 Message-ID: <20260203124247.7320-3-fabrizio.castro.jz@renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260203124247.7320-1-fabrizio.castro.jz@renesas.com> References: <20260203124247.7320-1-fabrizio.castro.jz@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The HW user manual for the Renesas RZ/V2H(P) SoC (a.k.a r9a09g057) states that only WDT1 is supposed to be accessed by the CA55 cores. WDT0 is supposed to be used by the CM33 core, WDT2 is supposed to be used by the CR8 core 0, and WDT3 is supposed to be used by the CR8 core 1. Remove wdt{0,2,3} from the SoC specific device tree to make it compliant with the specification from the HW manual. This change is harmless as there are currently no users of the wdt{0,2,3} device tree nodes, only the wdt1 node is actually used. Fixes: 095105496e7d ("arm64: dts: renesas: r9a09g057: Add WDT0-WDT3 nodes") Signed-off-by: Fabrizio Castro --- v1->v2: * No change. arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 30 ---------------------- 1 file changed, 30 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi b/arch/arm64/boot/d= ts/renesas/r9a09g057.dtsi index 80cba9fcfe7b..504c28386622 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi @@ -581,16 +581,6 @@ ostm7: timer@12c03000 { status =3D "disabled"; }; =20 - wdt0: watchdog@11c00400 { - compatible =3D "renesas,r9a09g057-wdt"; - reg =3D <0 0x11c00400 0 0x400>; - clocks =3D <&cpg CPG_MOD 0x4b>, <&cpg CPG_MOD 0x4c>; - clock-names =3D "pclk", "oscclk"; - resets =3D <&cpg 0x75>; - power-domains =3D <&cpg>; - status =3D "disabled"; - }; - wdt1: watchdog@14400000 { compatible =3D "renesas,r9a09g057-wdt"; reg =3D <0 0x14400000 0 0x400>; @@ -601,26 +591,6 @@ wdt1: watchdog@14400000 { status =3D "disabled"; }; =20 - wdt2: watchdog@13000000 { - compatible =3D "renesas,r9a09g057-wdt"; - reg =3D <0 0x13000000 0 0x400>; - clocks =3D <&cpg CPG_MOD 0x4f>, <&cpg CPG_MOD 0x50>; - clock-names =3D "pclk", "oscclk"; - resets =3D <&cpg 0x77>; - power-domains =3D <&cpg>; - status =3D "disabled"; - }; - - wdt3: watchdog@13000400 { - compatible =3D "renesas,r9a09g057-wdt"; - reg =3D <0 0x13000400 0 0x400>; - clocks =3D <&cpg CPG_MOD 0x51>, <&cpg CPG_MOD 0x52>; - clock-names =3D "pclk", "oscclk"; - resets =3D <&cpg 0x78>; - power-domains =3D <&cpg>; - status =3D "disabled"; - }; - rtc: rtc@11c00800 { compatible =3D "renesas,r9a09g057-rtca3", "renesas,rz-rtca3"; reg =3D <0 0x11c00800 0 0x400>; --=20 2.34.1 From nobody Sun Feb 8 23:06:04 2026 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 906EC1C69D; Tue, 3 Feb 2026 12:43:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770122598; cv=none; b=t7l/ghASUdbIQ7SaHY8iiAkwa1V+MAdmrYldJ0+Ke+lBFlDGFcTHkftK4EtXgrPXrvtrA6PJg93QDaNKcc8baNn+YZVngqhkPjcIJ3ZaEr+ztgmFQtKOXT8q8KcI68NUIccl+YnQp5Ji+yP5IW1rNTtFTBemQvDnDuHhUy+LiIA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770122598; c=relaxed/simple; bh=5KB4s5v20dnYhByP6f+brbZkGfV7lqcvH3j1ABaoc0o=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=iCRFxbiQsEufQuPT7kEsCWpAOJ3+3MH/HO0hG9Hyn7pqyEOp6Yq5AzHizgzs9XrG0Mhiz7J1YUnwbIyrc6HKj/bXU0QCTFP0w6fDWyObLuloVaX+EOC+ZgTANhC5YhU10v9rczo2WHhy23FKYuHIVHscQIQQFwY7wAudhLIbB2I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: WznixfsNTOagJuL5bPGPEA== X-CSE-MsgGUID: 5hmqY40DRSuWPG2R/FaV0Q== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 03 Feb 2026 21:43:09 +0900 Received: from mind-2s.example.org (unknown [10.226.36.118]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 555BF400F78B; Tue, 3 Feb 2026 21:43:04 +0900 (JST) From: Fabrizio Castro To: Rob Herring , Guenter Roeck , Michael Turquette , Stephen Boyd , Wim Van Sebroeck , Krzysztof Kozlowski , Geert Uytterhoeven , Conor Dooley , Magnus Damm Cc: Lad Prabhakar , linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Biju Das Subject: [PATCH v2 3/3] clk: renesas: r9a09g057: Remove entries for WDT{0,2,3} Date: Tue, 3 Feb 2026 12:42:47 +0000 Message-ID: <20260203124247.7320-4-fabrizio.castro.jz@renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260203124247.7320-1-fabrizio.castro.jz@renesas.com> References: <20260203124247.7320-1-fabrizio.castro.jz@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The HW user manual for the Renesas RZ/V2H(P) SoC specifies that only the WDT1 IP is supposed to be used by Linux, while the WDT{0,2,3} IPs are supposed to be used by the CM33 and CR8 cores. Remove the clock and reset entries for WDT{0,2,3} to prevent interfering with the CM33 and CR8 cores. This change is harmless as only WDT1 is used by Linux, there are no users for the WDT{0,2,3} cores. Fixes: 3aeccbe08171 ("clk: renesas: r9a09g057: Add clock and reset entries = for GTM/RIIC/SDHI/WDT") Signed-off-by: Fabrizio Castro --- v1->v2: * No change. drivers/clk/renesas/r9a09g057-cpg.c | 15 --------------- 1 file changed, 15 deletions(-) diff --git a/drivers/clk/renesas/r9a09g057-cpg.c b/drivers/clk/renesas/r9a0= 9g057-cpg.c index 6943cad318b5..07803e0c91de 100644 --- a/drivers/clk/renesas/r9a09g057-cpg.c +++ b/drivers/clk/renesas/r9a09g057-cpg.c @@ -280,22 +280,10 @@ static const struct rzv2h_mod_clk r9a09g057_mod_clks[= ] __initconst =3D { BUS_MSTOP(11, BIT(15))), DEF_MOD("gtm_7_pclk", CLK_PLLCLN_DIV16, 4, 10, 2, 10, BUS_MSTOP(12, BIT(0))), - DEF_MOD("wdt_0_clkp", CLK_PLLCM33_DIV16, 4, 11, 2, 11, - BUS_MSTOP(3, BIT(10))), - DEF_MOD("wdt_0_clk_loco", CLK_QEXTAL, 4, 12, 2, 12, - BUS_MSTOP(3, BIT(10))), DEF_MOD("wdt_1_clkp", CLK_PLLCLN_DIV16, 4, 13, 2, 13, BUS_MSTOP(1, BIT(0))), DEF_MOD("wdt_1_clk_loco", CLK_QEXTAL, 4, 14, 2, 14, BUS_MSTOP(1, BIT(0))), - DEF_MOD("wdt_2_clkp", CLK_PLLCLN_DIV16, 4, 15, 2, 15, - BUS_MSTOP(5, BIT(12))), - DEF_MOD("wdt_2_clk_loco", CLK_QEXTAL, 5, 0, 2, 16, - BUS_MSTOP(5, BIT(12))), - DEF_MOD("wdt_3_clkp", CLK_PLLCLN_DIV16, 5, 1, 2, 17, - BUS_MSTOP(5, BIT(13))), - DEF_MOD("wdt_3_clk_loco", CLK_QEXTAL, 5, 2, 2, 18, - BUS_MSTOP(5, BIT(13))), DEF_MOD("rsci0_pclk", CLK_PLLCLN_DIV16, 5, 13, 2, 29, BUS_MSTOP(11, BIT(3))), DEF_MOD("rsci0_tclk", CLK_PLLCLN_DIV16, 5, 14, 2, 30, @@ -598,10 +586,7 @@ static const struct rzv2h_reset r9a09g057_resets[] __i= nitconst =3D { DEF_RST(7, 2, 3, 3), /* GTM_5_PRESETZ */ DEF_RST(7, 3, 3, 4), /* GTM_6_PRESETZ */ DEF_RST(7, 4, 3, 5), /* GTM_7_PRESETZ */ - DEF_RST(7, 5, 3, 6), /* WDT_0_RESET */ DEF_RST(7, 6, 3, 7), /* WDT_1_RESET */ - DEF_RST(7, 7, 3, 8), /* WDT_2_RESET */ - DEF_RST(7, 8, 3, 9), /* WDT_3_RESET */ DEF_RST(8, 1, 3, 18), /* RSCI0_PRESETN */ DEF_RST(8, 2, 3, 19), /* RSCI0_TRESETN */ DEF_RST(8, 3, 3, 20), /* RSCI1_PRESETN */ --=20 2.34.1