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charset="utf-8" No functional change for now, as we always allocate a single entity and use it everywhere. --- v4: stop using adev->sdma.num_instances --- Signed-off-by: Pierre-Eric Pelloux-Prayer --- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 55 +++++++++++++++------- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 3 +- 3 files changed, 42 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/a= md/amdgpu/amdgpu_object.c index 1fb956400696..bf98be8fd007 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c @@ -1325,7 +1325,7 @@ void amdgpu_bo_release_notify(struct ttm_buffer_objec= t *bo) if (r) goto out; =20 - r =3D amdgpu_fill_buffer(&adev->mman.clear_entity, abo, 0, &bo->base._res= v, + r =3D amdgpu_fill_buffer(&adev->mman.clear_entities[0], abo, 0, &bo->base= ._resv, &fence, AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE); if (WARN_ON(r)) goto out; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/= amdgpu/amdgpu_ttm.c index 0977a10679dc..71316b3d4a29 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -2346,8 +2346,9 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev) void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, bool e= nable) { struct ttm_resource_manager *man =3D ttm_manager_type(&adev->mman.bdev, T= TM_PL_VRAM); + u32 num_clear_entities; uint64_t size; - int r; + int r, i, j; =20 if (!adev->mman.initialized || amdgpu_in_reset(adev) || adev->mman.buffer_funcs_enabled =3D=3D enable || adev->gmc.is_app_apu) @@ -2362,6 +2363,7 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu= _device *adev, bool enable) return; } =20 + num_clear_entities =3D 1; ring =3D adev->mman.buffer_funcs_ring; sched =3D &ring->sched; r =3D amdgpu_ttm_buffer_entity_init(&adev->mman.gtt_mgr, @@ -2374,14 +2376,28 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdg= pu_device *adev, bool enable) return; } =20 - r =3D amdgpu_ttm_buffer_entity_init(&adev->mman.gtt_mgr, - &adev->mman.clear_entity, - DRM_SCHED_PRIORITY_NORMAL, - &sched, 1, 1); - if (r < 0) { - dev_err(adev->dev, - "Failed setting up TTM BO clear entity (%d)\n", r); + adev->mman.clear_entities =3D kcalloc(num_clear_entities, + sizeof(struct amdgpu_ttm_buffer_entity), + GFP_KERNEL); + if (!adev->mman.clear_entities) goto error_free_default_entity; + + adev->mman.num_clear_entities =3D num_clear_entities; + + for (i =3D 0; i < num_clear_entities; i++) { + r =3D amdgpu_ttm_buffer_entity_init( + &adev->mman.gtt_mgr, &adev->mman.clear_entities[i], + DRM_SCHED_PRIORITY_NORMAL, &sched, 1, 1); + + if (r < 0) { + for (j =3D 0; j < i; j++) + amdgpu_ttm_buffer_entity_fini( + &adev->mman.gtt_mgr, &adev->mman.clear_entities[j]); + kfree(adev->mman.clear_entities); + adev->mman.num_clear_entities =3D 0; + adev->mman.clear_entities =3D NULL; + goto error_free_default_entity; + } } =20 r =3D amdgpu_ttm_buffer_entity_init(&adev->mman.gtt_mgr, @@ -2391,19 +2407,23 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdg= pu_device *adev, bool enable) if (r < 0) { dev_err(adev->dev, "Failed setting up TTM BO move entity (%d)\n", r); - goto error_free_clear_entity; + goto error_free_clear_entities; } } else { amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr, &adev->mman.default_entity); - amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr, - &adev->mman.clear_entity); + for (i =3D 0; i < adev->mman.num_clear_entities; i++) + amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr, + &adev->mman.clear_entities[i]); amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr, &adev->mman.move_entity); /* Drop all the old fences since re-creating the scheduler entities * will allocate new contexts. */ ttm_resource_manager_cleanup(man); + kfree(adev->mman.clear_entities); + adev->mman.clear_entities =3D NULL; + adev->mman.num_clear_entities =3D 0; } =20 /* this just adjusts TTM size idea, which sets lpfn to the correct value = */ @@ -2416,9 +2436,13 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdgp= u_device *adev, bool enable) =20 return; =20 -error_free_clear_entity: - amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr, - &adev->mman.clear_entity); +error_free_clear_entities: + for (i =3D 0; i < adev->mman.num_clear_entities; i++) + amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr, + &adev->mman.clear_entities[i]); + kfree(adev->mman.clear_entities); + adev->mman.clear_entities =3D NULL; + adev->mman.num_clear_entities =3D 0; error_free_default_entity: amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr, &adev->mman.default_entity); @@ -2568,8 +2592,7 @@ int amdgpu_ttm_clear_buffer(struct amdgpu_bo *bo, =20 if (!fence) return -EINVAL; - - entity =3D &adev->mman.clear_entity; + entity =3D &adev->mman.clear_entities[0]; *fence =3D dma_fence_get_stub(); =20 amdgpu_res_first(bo->tbo.resource, 0, amdgpu_bo_size(bo), &cursor); diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/= amdgpu/amdgpu_ttm.h index bf101215757e..e98d458b8029 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h @@ -72,8 +72,9 @@ struct amdgpu_mman { =20 /* @default_entity: for workarounds, has no gart windows */ struct amdgpu_ttm_buffer_entity default_entity; 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charset="utf-8" No functional change for now, as we always allocate a single entity. Acked-by: Felix Kuehling --- v4: stop using adev->sdma.num_instances --- Signed-off-by: Pierre-Eric Pelloux-Prayer Acked-by: Felix Kuehling --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 35 +++++++++++++++--------- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 3 +- drivers/gpu/drm/amd/amdkfd/kfd_migrate.c | 2 +- 3 files changed, 25 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/= amdgpu/amdgpu_ttm.c index 71316b3d4a29..75cb354084a0 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -399,7 +399,7 @@ static int amdgpu_move_blit(struct ttm_buffer_object *b= o, dst.offset =3D 0; =20 r =3D amdgpu_ttm_copy_mem_to_mem(adev, - &adev->mman.move_entity, + &adev->mman.move_entities[0], &src, &dst, new_mem->size, amdgpu_bo_encrypted(abo), @@ -412,7 +412,7 @@ static int amdgpu_move_blit(struct ttm_buffer_object *b= o, (abo->flags & AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE)) { struct dma_fence *wipe_fence =3D NULL; =20 - r =3D amdgpu_fill_buffer(&adev->mman.move_entity, + r =3D amdgpu_fill_buffer(&adev->mman.move_entities[0], abo, 0, NULL, &wipe_fence, AMDGPU_KERNEL_JOB_ID_MOVE_BLIT); if (r) { @@ -2346,7 +2346,7 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev) void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, bool e= nable) { struct ttm_resource_manager *man =3D ttm_manager_type(&adev->mman.bdev, T= TM_PL_VRAM); - u32 num_clear_entities; + u32 num_clear_entities, num_move_entities; uint64_t size; int r, i, j; =20 @@ -2364,6 +2364,7 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu= _device *adev, bool enable) } =20 num_clear_entities =3D 1; + num_move_entities =3D 1; ring =3D adev->mman.buffer_funcs_ring; sched =3D &ring->sched; r =3D amdgpu_ttm_buffer_entity_init(&adev->mman.gtt_mgr, @@ -2400,14 +2401,20 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdg= pu_device *adev, bool enable) } } =20 - r =3D amdgpu_ttm_buffer_entity_init(&adev->mman.gtt_mgr, - &adev->mman.move_entity, - DRM_SCHED_PRIORITY_NORMAL, - &sched, 1, 2); - if (r < 0) { - dev_err(adev->dev, - "Failed setting up TTM BO move entity (%d)\n", r); - goto error_free_clear_entities; + adev->mman.num_move_entities =3D num_move_entities; + for (i =3D 0; i < num_move_entities; i++) { + r =3D amdgpu_ttm_buffer_entity_init( + &adev->mman.gtt_mgr, + &adev->mman.move_entities[i], + DRM_SCHED_PRIORITY_NORMAL, &sched, 1, 2); + + if (r < 0) { + for (j =3D 0; j < i; j++) + amdgpu_ttm_buffer_entity_fini( + &adev->mman.gtt_mgr, &adev->mman.move_entities[j]); + adev->mman.num_move_entities =3D 0; + goto error_free_clear_entities; + } } } else { amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr, @@ -2415,8 +2422,9 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu= _device *adev, bool enable) for (i =3D 0; i < adev->mman.num_clear_entities; i++) amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr, &adev->mman.clear_entities[i]); - amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr, - &adev->mman.move_entity); + for (i =3D 0; i < adev->mman.num_move_entities; i++) + amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr, + &adev->mman.move_entities[i]); /* Drop all the old fences since re-creating the scheduler entities * will allocate new contexts. */ @@ -2424,6 +2432,7 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu= _device *adev, bool enable) kfree(adev->mman.clear_entities); adev->mman.clear_entities =3D NULL; adev->mman.num_clear_entities =3D 0; + adev->mman.num_move_entities =3D 0; } =20 /* this just adjusts TTM size idea, which sets lpfn to the correct value = */ diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/= amdgpu/amdgpu_ttm.h index e98d458b8029..cd24ca851b6d 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h @@ -72,9 +72,10 @@ struct amdgpu_mman { =20 /* @default_entity: for workarounds, has no gart windows */ struct amdgpu_ttm_buffer_entity default_entity; - struct amdgpu_ttm_buffer_entity move_entity; struct amdgpu_ttm_buffer_entity *clear_entities; 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Partial jobs to clear a single BO still execute sequentially. Reviewed-by: Christian K=C3=B6nig --- v4: - check entity's validity - use u32 for the index in the entities array --- Signed-off-by: Pierre-Eric Pelloux-Prayer Reviewed-by: Christian K=C3=B6nig --- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 3 ++- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 20 ++++++++++++++++---- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 2 ++ 3 files changed, 20 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/a= md/amdgpu/amdgpu_object.c index bf98be8fd007..66c20dd46d12 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c @@ -1325,7 +1325,8 @@ void amdgpu_bo_release_notify(struct ttm_buffer_objec= t *bo) if (r) goto out; =20 - r =3D amdgpu_fill_buffer(&adev->mman.clear_entities[0], abo, 0, &bo->base= ._resv, + r =3D amdgpu_fill_buffer(amdgpu_ttm_next_clear_entity(adev), + abo, 0, &bo->base._resv, &fence, AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE); if (WARN_ON(r)) goto out; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/= amdgpu/amdgpu_ttm.c index 75cb354084a0..56b4f560ea7f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -2380,6 +2380,7 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu= _device *adev, bool enable) adev->mman.clear_entities =3D kcalloc(num_clear_entities, sizeof(struct amdgpu_ttm_buffer_entity), GFP_KERNEL); + atomic_set(&adev->mman.next_clear_entity, 0); if (!adev->mman.clear_entities) goto error_free_default_entity; =20 @@ -2653,11 +2654,8 @@ int amdgpu_fill_buffer(struct amdgpu_ttm_buffer_enti= ty *entity, struct amdgpu_res_cursor dst; int r; =20 - if (!adev->mman.buffer_funcs_enabled) { - dev_err(adev->dev, - "Trying to clear memory with ring turned off.\n"); + if (!entity) return -EINVAL; - } =20 amdgpu_res_first(bo->tbo.resource, 0, amdgpu_bo_size(bo), &dst); =20 @@ -2693,6 +2691,20 @@ int amdgpu_fill_buffer(struct amdgpu_ttm_buffer_enti= ty *entity, return r; } =20 +struct amdgpu_ttm_buffer_entity * +amdgpu_ttm_next_clear_entity(struct amdgpu_device *adev) +{ + struct amdgpu_mman *mman =3D &adev->mman; + u32 i; + + if (mman->num_clear_entities =3D=3D 0) + return NULL; + + i =3D atomic_inc_return(&mman->next_clear_entity) % + mman->num_clear_entities; + return &mman->clear_entities[i]; +} + /** * amdgpu_ttm_evict_resources - evict memory buffers * @adev: amdgpu device object diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/= amdgpu/amdgpu_ttm.h index cd24ca851b6d..cf32db3defb1 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h @@ -73,6 +73,7 @@ struct amdgpu_mman { /* @default_entity: for workarounds, has no gart windows */ struct amdgpu_ttm_buffer_entity default_entity; struct amdgpu_ttm_buffer_entity *clear_entities; + atomic_t next_clear_entity; u32 num_clear_entities; struct amdgpu_ttm_buffer_entity move_entities[TTM_NUM_MOVE_FENCES]; u32 num_move_entities; @@ -193,6 +194,7 @@ int amdgpu_fill_buffer(struct amdgpu_ttm_buffer_entity = *entity, struct dma_resv *resv, struct dma_fence **f, u64 k_job_id); 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Acked-by: Felix Kuehling Reviewed-by: Christian K=C3=B6nig --- v2: removed drm_err calls --- Signed-off-by: Pierre-Eric Pelloux-Prayer Acked-by: Felix Kuehling Reviewed-by: Christian K=C3=B6nig --- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 5 ++--- drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c | 6 ++---- drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 3 +-- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c | 6 ++---- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c | 6 ++---- 5 files changed, 9 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/a= mdgpu/amdgpu_cs.c index d591dce0f3b3..5215238f8fc9 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c @@ -916,9 +916,8 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser= *p, goto out_free_user_pages; =20 amdgpu_bo_list_for_each_entry(e, p->bo_list) { - /* One fence for TTM and one for each CS job */ r =3D drm_exec_prepare_obj(&p->exec, &e->bo->tbo.base, - 1 + p->gang_size); + TTM_NUM_MOVE_FENCES + p->gang_size); drm_exec_retry_on_contention(&p->exec); if (unlikely(r)) goto out_free_user_pages; @@ -928,7 +927,7 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser= *p, =20 if (p->uf_bo) { r =3D drm_exec_prepare_obj(&p->exec, &p->uf_bo->tbo.base, - 1 + p->gang_size); + TTM_NUM_MOVE_FENCES + p->gang_size); drm_exec_retry_on_contention(&p->exec); if (unlikely(r)) goto out_free_user_pages; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c b/drivers/gpu/drm/amd= /amdgpu/amdgpu_vkms.c index e548dc9708a2..2f874241ce16 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c @@ -328,11 +328,9 @@ static int amdgpu_vkms_prepare_fb(struct drm_plane *pl= ane, return r; } =20 - r =3D dma_resv_reserve_fences(rbo->tbo.base.resv, 1); - if (r) { - dev_err(adev->dev, "allocating fence slot failed (%d)\n", r); + r =3D dma_resv_reserve_fences(rbo->tbo.base.resv, TTM_NUM_MOVE_FENCES); + if (r) goto error_unlock; - } =20 if (plane->type !=3D DRM_PLANE_TYPE_CURSOR) domain =3D amdgpu_display_supported_domains(adev, rbo->flags); diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c b/drivers/gpu/drm/amd/amd= kfd/kfd_svm.c index fcddb54a439f..06c74511b529 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c @@ -628,9 +628,8 @@ svm_range_vram_node_new(struct kfd_node *node, struct s= vm_range *prange, } } =20 - r =3D dma_resv_reserve_fences(bo->tbo.base.resv, 1); + r =3D dma_resv_reserve_fences(bo->tbo.base.resv, TTM_NUM_MOVE_FENCES); if (r) { - pr_debug("failed %d to reserve bo\n", r); amdgpu_bo_unreserve(bo); goto reserve_bo_failed; } diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/driv= ers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c index 9e709caa7a4c..838c528a009d 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c @@ -952,11 +952,9 @@ static int amdgpu_dm_plane_helper_prepare_fb(struct dr= m_plane *plane, return r; } =20 - r =3D dma_resv_reserve_fences(rbo->tbo.base.resv, 1); - if (r) { - drm_err(adev_to_drm(adev), "reserving fence slot failed (%d)\n", r); + r =3D dma_resv_reserve_fences(rbo->tbo.base.resv, TTM_NUM_MOVE_FENCES); + if (r) goto error_unlock; - } =20 if (plane->type !=3D DRM_PLANE_TYPE_CURSOR) domain =3D amdgpu_display_supported_domains(adev, rbo->flags); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c b/drivers= /gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c index d9527c05fc87..110f0173eee6 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c @@ -106,11 +106,9 @@ static int amdgpu_dm_wb_prepare_job(struct drm_writeba= ck_connector *wb_connector return r; } =20 - r =3D dma_resv_reserve_fences(rbo->tbo.base.resv, 1); - if (r) { - drm_err(adev_to_drm(adev), "reserving fence slot failed (%d)\n", r); + r =3D dma_resv_reserve_fences(rbo->tbo.base.resv, TTM_NUM_MOVE_FENCES); + if (r) goto error_unlock; - } =20 domain =3D amdgpu_display_supported_domains(adev, rbo->flags); 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Reviewed-by: Christian K=C3=B6nig --- v4: use u32 for the index in the entities array --- Signed-off-by: Pierre-Eric Pelloux-Prayer Reviewed-by: Christian K=C3=B6nig --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 13 +++++++++---- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 1 + 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/= amdgpu/amdgpu_ttm.c index 56b4f560ea7f..91fcf4f08181 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -387,9 +387,11 @@ static int amdgpu_move_blit(struct ttm_buffer_object *= bo, { struct amdgpu_device *adev =3D amdgpu_ttm_adev(bo->bdev); struct amdgpu_bo *abo =3D ttm_to_amdgpu_bo(bo); + struct amdgpu_ttm_buffer_entity *entity; struct amdgpu_copy_mem src, dst; struct dma_fence *fence =3D NULL; int r; + u32 e; =20 src.bo =3D bo; dst.bo =3D bo; @@ -398,8 +400,12 @@ static int amdgpu_move_blit(struct ttm_buffer_object *= bo, src.offset =3D 0; dst.offset =3D 0; =20 + e =3D atomic_inc_return(&adev->mman.next_move_entity) % + adev->mman.num_move_entities; + entity =3D &adev->mman.move_entities[e]; + r =3D amdgpu_ttm_copy_mem_to_mem(adev, - &adev->mman.move_entities[0], + entity, &src, &dst, new_mem->size, amdgpu_bo_encrypted(abo), @@ -411,9 +417,7 @@ static int amdgpu_move_blit(struct ttm_buffer_object *b= o, if (old_mem->mem_type =3D=3D TTM_PL_VRAM && (abo->flags & AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE)) { struct dma_fence *wipe_fence =3D NULL; - - r =3D amdgpu_fill_buffer(&adev->mman.move_entities[0], - abo, 0, NULL, &wipe_fence, + r =3D amdgpu_fill_buffer(entity, abo, 0, NULL, &wipe_fence, AMDGPU_KERNEL_JOB_ID_MOVE_BLIT); if (r) { goto error; @@ -2403,6 +2407,7 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu= _device *adev, bool enable) } =20 adev->mman.num_move_entities =3D num_move_entities; + atomic_set(&adev->mman.next_move_entity, 0); for (i =3D 0; i < num_move_entities; i++) { r =3D amdgpu_ttm_buffer_entity_init( &adev->mman.gtt_mgr, diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/= amdgpu/amdgpu_ttm.h index cf32db3defb1..3b1973611446 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h @@ -76,6 +76,7 @@ struct amdgpu_mman { atomic_t next_clear_entity; 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charset="utf-8" This will allow the use of all of them for clear/fill buffer operations. Since drm_sched_entity_init requires a scheduler array, we store schedulers rather than rings. For the few places that need access to a ring, we can get it from the sched using container_of. Since the code is the same for all sdma versions, add a new helper amdgpu_sdma_set_buffer_funcs_scheds to set buffer_funcs_scheds based on the number of sdma instances. Note: the new sched array is identical to the amdgpu_vm_manager one. These 2 could be merged. Signed-off-by: Pierre-Eric Pelloux-Prayer Acked-by: Felix Kuehling --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 4 ++- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 32 ++++++++++++++++++---- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 3 +- drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 3 +- drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | 3 +- drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 3 +- drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 6 +--- drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 6 +--- drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 5 +--- drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 5 +--- drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c | 3 +- drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c | 3 +- drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c | 3 +- drivers/gpu/drm/amd/amdgpu/si_dma.c | 3 +- drivers/gpu/drm/amd/amdkfd/kfd_migrate.c | 3 +- 17 files changed, 47 insertions(+), 42 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdg= pu/amdgpu.h index af4042387f3b..5275311eb09b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -1538,6 +1538,8 @@ ssize_t amdgpu_get_soft_full_reset_mask(struct amdgpu= _ring *ring); ssize_t amdgpu_show_reset_mask(char *buf, uint32_t supported_reset); void amdgpu_sdma_set_vm_pte_scheds(struct amdgpu_device *adev, const struct amdgpu_vm_pte_funcs *vm_pte_funcs); +void amdgpu_sdma_set_buffer_funcs_scheds(struct amdgpu_device *adev, + const struct amdgpu_buffer_funcs *buffer_funcs); =20 /* atpx handler */ #if defined(CONFIG_VGA_SWITCHEROO) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/a= md/amdgpu/amdgpu_device.c index 5e73b9d67325..b5c48ff3d67e 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -4390,7 +4390,7 @@ int amdgpu_device_init(struct amdgpu_device *adev, adev->num_rings =3D 0; RCU_INIT_POINTER(adev->gang_submit, dma_fence_get_stub()); adev->mman.buffer_funcs =3D NULL; - adev->mman.buffer_funcs_ring =3D NULL; + adev->mman.num_buffer_funcs_scheds =3D 0; adev->vm_manager.vm_pte_funcs =3D NULL; adev->vm_manager.vm_pte_num_scheds =3D 0; adev->gmc.gmc_funcs =3D NULL; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/= amdgpu/amdgpu_gmc.c index e87cb8ccfcd9..f52c764d4c10 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c @@ -707,12 +707,14 @@ int amdgpu_gmc_allocate_vm_inv_eng(struct amdgpu_devi= ce *adev) void amdgpu_gmc_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid, uint32_t vmhub, uint32_t flush_type) { - struct amdgpu_ring *ring =3D adev->mman.buffer_funcs_ring; + struct amdgpu_ring *ring; struct amdgpu_vmhub *hub =3D &adev->vmhub[vmhub]; struct dma_fence *fence; struct amdgpu_job *job; int r; =20 + ring =3D to_amdgpu_ring(adev->mman.buffer_funcs_scheds[0]); + if (!hub->sdma_invalidation_workaround || vmid || !adev->mman.buffer_funcs_enabled || !adev->ib_pool_ready || !ring->sched.ready) { diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/= amdgpu/amdgpu_ttm.c index 91fcf4f08181..6df3a4659172 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -168,7 +168,7 @@ amdgpu_ttm_job_submit(struct amdgpu_device *adev, struc= t amdgpu_ttm_buffer_entit { struct amdgpu_ring *ring; =20 - ring =3D adev->mman.buffer_funcs_ring; + ring =3D to_amdgpu_ring(adev->mman.buffer_funcs_scheds[0]); amdgpu_ring_pad_ib(ring, &job->ibs[0]); WARN_ON(job->ibs[0].length_dw > num_dw); =20 @@ -2359,18 +2359,17 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdg= pu_device *adev, bool enable) return; =20 if (enable) { - struct amdgpu_ring *ring; struct drm_gpu_scheduler *sched; =20 - if (!adev->mman.buffer_funcs_ring || !adev->mman.buffer_funcs_ring->sche= d.ready) { + if (!adev->mman.num_buffer_funcs_scheds || + !adev->mman.buffer_funcs_scheds[0]->ready) { dev_warn(adev->dev, "Not enabling DMA transfers for in kernel use"); return; } =20 num_clear_entities =3D 1; num_move_entities =3D 1; - ring =3D adev->mman.buffer_funcs_ring; - sched =3D &ring->sched; + sched =3D adev->mman.buffer_funcs_scheds[0]; r =3D amdgpu_ttm_buffer_entity_init(&adev->mman.gtt_mgr, &adev->mman.default_entity, DRM_SCHED_PRIORITY_KERNEL, @@ -2507,7 +2506,7 @@ int amdgpu_copy_buffer(struct amdgpu_device *adev, unsigned int i; int r; =20 - ring =3D adev->mman.buffer_funcs_ring; + ring =3D to_amdgpu_ring(adev->mman.buffer_funcs_scheds[0]); =20 if (!ring->sched.ready) { dev_err(adev->dev, @@ -2740,6 +2739,27 @@ int amdgpu_ttm_evict_resources(struct amdgpu_device = *adev, int mem_type) return ttm_resource_manager_evict_all(&adev->mman.bdev, man); } =20 +void amdgpu_sdma_set_buffer_funcs_scheds(struct amdgpu_device *adev, + const struct amdgpu_buffer_funcs *buffer_funcs) +{ + struct amdgpu_vmhub *hub =3D &adev->vmhub[AMDGPU_GFXHUB(0)]; + struct drm_gpu_scheduler *sched; + int i; + + adev->mman.buffer_funcs =3D buffer_funcs; + + for (i =3D 0; i < adev->sdma.num_instances; i++) { + if (adev->sdma.has_page_queue) + sched =3D &adev->sdma.instance[i].page.sched; + else + sched =3D &adev->sdma.instance[i].ring.sched; + adev->mman.buffer_funcs_scheds[i] =3D sched; + } + + adev->mman.num_buffer_funcs_scheds =3D hub->sdma_invalidation_workaround ? + 1 : adev->sdma.num_instances; +} + #if defined(CONFIG_DEBUG_FS) =20 static int amdgpu_ttm_page_pool_show(struct seq_file *m, void *unused) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/= amdgpu/amdgpu_ttm.h index 3b1973611446..a6249252948b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h @@ -67,7 +67,8 @@ struct amdgpu_mman { =20 /* buffer handling */ const struct amdgpu_buffer_funcs *buffer_funcs; - struct amdgpu_ring *buffer_funcs_ring; + struct drm_gpu_scheduler *buffer_funcs_scheds[AMDGPU_MAX_RINGS]; + u32 num_buffer_funcs_scheds; bool buffer_funcs_enabled; =20 /* @default_entity: for workarounds, has no gart windows */ diff --git a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c b/drivers/gpu/drm/amd/am= dgpu/cik_sdma.c index 22780c09177d..26276dcfd458 100644 --- a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c +++ b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c @@ -1340,8 +1340,7 @@ static const struct amdgpu_buffer_funcs cik_sdma_buff= er_funcs =3D { =20 static void cik_sdma_set_buffer_funcs(struct amdgpu_device *adev) { - adev->mman.buffer_funcs =3D &cik_sdma_buffer_funcs; - adev->mman.buffer_funcs_ring =3D &adev->sdma.instance[0].ring; + amdgpu_sdma_set_buffer_funcs_scheds(adev, &cik_sdma_buffer_funcs); } =20 const struct amdgpu_ip_block_version cik_sdma_ip_block =3D diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c b/drivers/gpu/drm/amd/a= mdgpu/sdma_v2_4.c index 0090ace49024..c6a059ca59e5 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c @@ -1235,8 +1235,7 @@ static const struct amdgpu_buffer_funcs sdma_v2_4_buf= fer_funcs =3D { =20 static void sdma_v2_4_set_buffer_funcs(struct amdgpu_device *adev) { - adev->mman.buffer_funcs =3D &sdma_v2_4_buffer_funcs; - adev->mman.buffer_funcs_ring =3D &adev->sdma.instance[0].ring; + amdgpu_sdma_set_buffer_funcs_scheds(adev, &sdma_v2_4_buffer_funcs); } =20 const struct amdgpu_ip_block_version sdma_v2_4_ip_block =3D { diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/a= mdgpu/sdma_v3_0.c index 2526d393162a..cb516a25210d 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c @@ -1677,8 +1677,7 @@ static const struct amdgpu_buffer_funcs sdma_v3_0_buf= fer_funcs =3D { =20 static void sdma_v3_0_set_buffer_funcs(struct amdgpu_device *adev) { - adev->mman.buffer_funcs =3D &sdma_v3_0_buffer_funcs; - adev->mman.buffer_funcs_ring =3D &adev->sdma.instance[0].ring; + amdgpu_sdma_set_buffer_funcs_scheds(adev, &sdma_v3_0_buffer_funcs); } =20 const struct amdgpu_ip_block_version sdma_v3_0_ip_block =3D diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/a= mdgpu/sdma_v4_0.c index a35d9951e22a..f234ee54f39e 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c @@ -2615,11 +2615,7 @@ static const struct amdgpu_buffer_funcs sdma_v4_0_bu= ffer_funcs =3D { =20 static void sdma_v4_0_set_buffer_funcs(struct amdgpu_device *adev) { - adev->mman.buffer_funcs =3D &sdma_v4_0_buffer_funcs; - if (adev->sdma.has_page_queue) - adev->mman.buffer_funcs_ring =3D &adev->sdma.instance[0].page; - else - adev->mman.buffer_funcs_ring =3D &adev->sdma.instance[0].ring; + amdgpu_sdma_set_buffer_funcs_scheds(adev, &sdma_v4_0_buffer_funcs); } =20 static void sdma_v4_0_get_ras_error_count(uint32_t value, diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c b/drivers/gpu/drm/amd= /amdgpu/sdma_v4_4_2.c index 7f77367848d4..cd7627b03066 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c @@ -2316,11 +2316,7 @@ static const struct amdgpu_buffer_funcs sdma_v4_4_2_= buffer_funcs =3D { =20 static void sdma_v4_4_2_set_buffer_funcs(struct amdgpu_device *adev) { - adev->mman.buffer_funcs =3D &sdma_v4_4_2_buffer_funcs; - if (adev->sdma.has_page_queue) - adev->mman.buffer_funcs_ring =3D &adev->sdma.instance[0].page; - else - adev->mman.buffer_funcs_ring =3D &adev->sdma.instance[0].ring; + amdgpu_sdma_set_buffer_funcs_scheds(adev, &sdma_v4_4_2_buffer_funcs); } =20 /** diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/a= mdgpu/sdma_v5_0.c index d72bd3adfccf..5da18f845014 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c @@ -2061,10 +2061,7 @@ static const struct amdgpu_buffer_funcs sdma_v5_0_bu= ffer_funcs =3D { =20 static void sdma_v5_0_set_buffer_funcs(struct amdgpu_device *adev) { - if (adev->mman.buffer_funcs =3D=3D NULL) { - adev->mman.buffer_funcs =3D &sdma_v5_0_buffer_funcs; - adev->mman.buffer_funcs_ring =3D &adev->sdma.instance[0].ring; - } + amdgpu_sdma_set_buffer_funcs_scheds(adev, &sdma_v5_0_buffer_funcs); } =20 const struct amdgpu_ip_block_version sdma_v5_0_ip_block =3D { diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c b/drivers/gpu/drm/amd/a= mdgpu/sdma_v5_2.c index 5aa500fe554b..4133163fa24c 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c @@ -2072,10 +2072,7 @@ static const struct amdgpu_buffer_funcs sdma_v5_2_bu= ffer_funcs =3D { =20 static void sdma_v5_2_set_buffer_funcs(struct amdgpu_device *adev) { - if (adev->mman.buffer_funcs =3D=3D NULL) { - adev->mman.buffer_funcs =3D &sdma_v5_2_buffer_funcs; - adev->mman.buffer_funcs_ring =3D &adev->sdma.instance[0].ring; - } + amdgpu_sdma_set_buffer_funcs_scheds(adev, &sdma_v5_2_buffer_funcs); } =20 const struct amdgpu_ip_block_version sdma_v5_2_ip_block =3D { diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c b/drivers/gpu/drm/amd/a= mdgpu/sdma_v6_0.c index 45d13ac09f9b..1b9c1e659095 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c @@ -1904,8 +1904,7 @@ static const struct amdgpu_buffer_funcs sdma_v6_0_buf= fer_funcs =3D { =20 static void sdma_v6_0_set_buffer_funcs(struct amdgpu_device *adev) { - adev->mman.buffer_funcs =3D &sdma_v6_0_buffer_funcs; - adev->mman.buffer_funcs_ring =3D &adev->sdma.instance[0].ring; + amdgpu_sdma_set_buffer_funcs_scheds(adev, &sdma_v6_0_buffer_funcs); } =20 const struct amdgpu_ip_block_version sdma_v6_0_ip_block =3D { diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c b/drivers/gpu/drm/amd/a= mdgpu/sdma_v7_0.c index f938be0524cd..0896f0dc6030 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c @@ -1845,8 +1845,7 @@ static const struct amdgpu_buffer_funcs sdma_v7_0_buf= fer_funcs =3D { =20 static void sdma_v7_0_set_buffer_funcs(struct amdgpu_device *adev) { - adev->mman.buffer_funcs =3D &sdma_v7_0_buffer_funcs; - adev->mman.buffer_funcs_ring =3D &adev->sdma.instance[0].ring; + amdgpu_sdma_set_buffer_funcs_scheds(adev, &sdma_v7_0_buffer_funcs); } =20 const struct amdgpu_ip_block_version sdma_v7_0_ip_block =3D { diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c b/drivers/gpu/drm/amd/a= mdgpu/sdma_v7_1.c index 3de76afe3e45..ac63dc26ed53 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c @@ -1755,8 +1755,7 @@ static const struct amdgpu_buffer_funcs sdma_v7_1_buf= fer_funcs =3D { =20 static void sdma_v7_1_set_buffer_funcs(struct amdgpu_device *adev) { - adev->mman.buffer_funcs =3D &sdma_v7_1_buffer_funcs; - adev->mman.buffer_funcs_ring =3D &adev->sdma.instance[0].ring; + amdgpu_sdma_set_buffer_funcs_scheds(adev, &sdma_v7_1_buffer_funcs); } =20 const struct amdgpu_ip_block_version sdma_v7_1_ip_block =3D { diff --git a/drivers/gpu/drm/amd/amdgpu/si_dma.c b/drivers/gpu/drm/amd/amdg= pu/si_dma.c index 3e58feb2d5e4..155067c20a0e 100644 --- a/drivers/gpu/drm/amd/amdgpu/si_dma.c +++ b/drivers/gpu/drm/amd/amdgpu/si_dma.c @@ -833,8 +833,7 @@ static const struct amdgpu_buffer_funcs si_dma_buffer_f= uncs =3D { =20 static void si_dma_set_buffer_funcs(struct amdgpu_device *adev) { - adev->mman.buffer_funcs =3D &si_dma_buffer_funcs; - adev->mman.buffer_funcs_ring =3D &adev->sdma.instance[0].ring; + amdgpu_sdma_set_buffer_funcs_scheds(adev, &si_dma_buffer_funcs); } =20 const struct amdgpu_ip_block_version si_dma_ip_block =3D diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c b/drivers/gpu/drm/amd= /amdkfd/kfd_migrate.c index 7b089d22c367..f3e6ec68b167 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c @@ -129,13 +129,14 @@ svm_migrate_copy_memory_gart(struct amdgpu_device *ad= ev, dma_addr_t *sys, struct dma_fence **mfence) { const u64 GTT_MAX_PAGES =3D AMDGPU_GTT_MAX_TRANSFER_SIZE; - struct amdgpu_ring *ring =3D adev->mman.buffer_funcs_ring; + struct amdgpu_ring *ring; struct amdgpu_ttm_buffer_entity *entity; u64 gart_s, gart_d; struct dma_fence *next; u64 size; int r; =20 + ring =3D to_amdgpu_ring(adev->mman.buffer_funcs_scheds[0]); entity =3D &adev->mman.move_entities[0]; =20 mutex_lock(&entity->lock); --=20 2.43.0 From nobody Sat Feb 7 11:38:08 2026 Received: from CO1PR03CU002.outbound.protection.outlook.com (mail-westus2azon11010020.outbound.protection.outlook.com [52.101.46.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 093AF318ED6 for ; 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charset="utf-8" It's possible that some sdma instances aren't working so we shouldn't try to use them from TTM. To achieve this, delay the call to amdgpu_sdma_set_buffer_funcs_scheds after the rings have been tested, and then use the 'ready' property to decide if a sched should be used or not. Note that currently it's not doing much, because if the ring helper fails for any ring, the whole sdma block init fails. Signed-off-by: Pierre-Eric Pelloux-Prayer --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 21 +++++++++++++++------ drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 10 ++++++++-- drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | 5 +++-- drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 5 +++-- drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 9 +++++++-- drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 6 ++++-- drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 6 ++++-- drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 9 +++++++-- drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c | 9 +++++++-- drivers/gpu/drm/amd/amdgpu/si_dma.c | 9 +++++++-- 12 files changed, 67 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/= amdgpu/amdgpu_ttm.c index 6df3a4659172..4857b5abdfa5 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -2361,8 +2361,7 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu= _device *adev, bool enable) if (enable) { struct drm_gpu_scheduler *sched; =20 - if (!adev->mman.num_buffer_funcs_scheds || - !adev->mman.buffer_funcs_scheds[0]->ready) { + if (!adev->mman.num_buffer_funcs_scheds) { dev_warn(adev->dev, "Not enabling DMA transfers for in kernel use"); return; } @@ -2744,20 +2743,30 @@ void amdgpu_sdma_set_buffer_funcs_scheds(struct amd= gpu_device *adev, { struct amdgpu_vmhub *hub =3D &adev->vmhub[AMDGPU_GFXHUB(0)]; struct drm_gpu_scheduler *sched; - int i; + int i, n; =20 adev->mman.buffer_funcs =3D buffer_funcs; =20 - for (i =3D 0; i < adev->sdma.num_instances; i++) { + for (i =3D 0, n =3D 0; i < adev->sdma.num_instances; i++) { if (adev->sdma.has_page_queue) sched =3D &adev->sdma.instance[i].page.sched; else sched =3D &adev->sdma.instance[i].ring.sched; - adev->mman.buffer_funcs_scheds[i] =3D sched; + + if (!sched->ready) + continue; + + adev->mman.buffer_funcs_scheds[n++] =3D sched; + } + + if (n =3D=3D 0) { + adev->mman.num_buffer_funcs_scheds =3D 0; + drm_warn(&adev->ddev, "No working sdma ring available\n"); + return; } =20 adev->mman.num_buffer_funcs_scheds =3D hub->sdma_invalidation_workaround ? - 1 : adev->sdma.num_instances; + 1 : n; } =20 #if defined(CONFIG_DEBUG_FS) diff --git a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c b/drivers/gpu/drm/amd/am= dgpu/cik_sdma.c index 26276dcfd458..120da838ac28 100644 --- a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c +++ b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c @@ -939,7 +939,6 @@ static int cik_sdma_early_init(struct amdgpu_ip_block *= ip_block) =20 cik_sdma_set_ring_funcs(adev); cik_sdma_set_irq_funcs(adev); - cik_sdma_set_buffer_funcs(adev); amdgpu_sdma_set_vm_pte_scheds(adev, &cik_sdma_vm_pte_funcs); =20 return 0; @@ -1000,8 +999,15 @@ static int cik_sdma_sw_fini(struct amdgpu_ip_block *i= p_block) static int cik_sdma_hw_init(struct amdgpu_ip_block *ip_block) { struct amdgpu_device *adev =3D ip_block->adev; + int r; =20 - return cik_sdma_start(adev); + r =3D cik_sdma_start(adev); + if (r) + return r; + + cik_sdma_set_buffer_funcs(adev); + + return 0; } =20 static int cik_sdma_hw_fini(struct amdgpu_ip_block *ip_block) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c b/drivers/gpu/drm/amd/a= mdgpu/sdma_v2_4.c index c6a059ca59e5..93ec52c1f367 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c @@ -828,7 +828,6 @@ static int sdma_v2_4_early_init(struct amdgpu_ip_block = *ip_block) return r; =20 sdma_v2_4_set_ring_funcs(adev); - sdma_v2_4_set_buffer_funcs(adev); amdgpu_sdma_set_vm_pte_scheds(adev, &sdma_v2_4_vm_pte_funcs); sdma_v2_4_set_irq_funcs(adev); =20 @@ -898,7 +897,9 @@ static int sdma_v2_4_hw_init(struct amdgpu_ip_block *ip= _block) if (r) return r; =20 - return r; + sdma_v2_4_set_buffer_funcs(adev); + + return 0; } =20 static int sdma_v2_4_hw_fini(struct amdgpu_ip_block *ip_block) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/a= mdgpu/sdma_v3_0.c index cb516a25210d..3fde9be74690 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c @@ -1108,7 +1108,6 @@ static int sdma_v3_0_early_init(struct amdgpu_ip_bloc= k *ip_block) return r; =20 sdma_v3_0_set_ring_funcs(adev); - sdma_v3_0_set_buffer_funcs(adev); amdgpu_sdma_set_vm_pte_scheds(adev, &sdma_v3_0_vm_pte_funcs); sdma_v3_0_set_irq_funcs(adev); =20 @@ -1184,7 +1183,9 @@ static int sdma_v3_0_hw_init(struct amdgpu_ip_block *= ip_block) if (r) return r; =20 - return r; + sdma_v3_0_set_buffer_funcs(adev); + + return 0; } =20 static int sdma_v3_0_hw_fini(struct amdgpu_ip_block *ip_block) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/a= mdgpu/sdma_v4_0.c index f234ee54f39e..a5aaaec02dcf 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c @@ -1775,7 +1775,6 @@ static int sdma_v4_0_early_init(struct amdgpu_ip_bloc= k *ip_block) adev->sdma.has_page_queue =3D true; =20 sdma_v4_0_set_ring_funcs(adev); - sdma_v4_0_set_buffer_funcs(adev); amdgpu_sdma_set_vm_pte_scheds(adev, &sdma_v4_0_vm_pte_funcs); sdma_v4_0_set_irq_funcs(adev); sdma_v4_0_set_ras_funcs(adev); @@ -1961,6 +1960,7 @@ static int sdma_v4_0_sw_fini(struct amdgpu_ip_block *= ip_block) static int sdma_v4_0_hw_init(struct amdgpu_ip_block *ip_block) { struct amdgpu_device *adev =3D ip_block->adev; + int r; =20 if (adev->flags & AMD_IS_APU) amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, false, 0= ); @@ -1968,7 +1968,12 @@ static int sdma_v4_0_hw_init(struct amdgpu_ip_block = *ip_block) if (!amdgpu_sriov_vf(adev)) sdma_v4_0_init_golden_registers(adev); =20 - return sdma_v4_0_start(adev); + r =3D sdma_v4_0_start(adev); + if (r) + return r; + sdma_v4_0_set_buffer_funcs(adev); + + return 0; } =20 static int sdma_v4_0_hw_fini(struct amdgpu_ip_block *ip_block) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c b/drivers/gpu/drm/amd= /amdgpu/sdma_v4_4_2.c index cd7627b03066..ddc08a0e9f28 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c @@ -1368,7 +1368,6 @@ static int sdma_v4_4_2_early_init(struct amdgpu_ip_bl= ock *ip_block) adev->sdma.has_page_queue =3D true; =20 sdma_v4_4_2_set_ring_funcs(adev); - sdma_v4_4_2_set_buffer_funcs(adev); amdgpu_sdma_set_vm_pte_scheds(adev, &sdma_v4_4_2_vm_pte_funcs); sdma_v4_4_2_set_irq_funcs(adev); sdma_v4_4_2_set_ras_funcs(adev); @@ -1568,8 +1567,11 @@ static int sdma_v4_4_2_hw_init(struct amdgpu_ip_bloc= k *ip_block) sdma_v4_4_2_inst_init_golden_registers(adev, inst_mask); =20 r =3D sdma_v4_4_2_inst_start(adev, inst_mask, false); + if (r) + return r; + sdma_v4_4_2_set_buffer_funcs(adev); =20 - return r; + return 0; } =20 static int sdma_v4_4_2_hw_fini(struct amdgpu_ip_block *ip_block) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/a= mdgpu/sdma_v5_0.c index 5da18f845014..9c5bdb9f4dec 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c @@ -1373,7 +1373,6 @@ static int sdma_v5_0_early_init(struct amdgpu_ip_bloc= k *ip_block) return r; =20 sdma_v5_0_set_ring_funcs(adev); - sdma_v5_0_set_buffer_funcs(adev); amdgpu_sdma_set_vm_pte_scheds(adev, &sdma_v5_0_vm_pte_funcs); sdma_v5_0_set_irq_funcs(adev); sdma_v5_0_set_mqd_funcs(adev); @@ -1481,8 +1480,11 @@ static int sdma_v5_0_hw_init(struct amdgpu_ip_block = *ip_block) sdma_v5_0_init_golden_registers(adev); =20 r =3D sdma_v5_0_start(adev); + if (r) + return r; + sdma_v5_0_set_buffer_funcs(adev); =20 - return r; + return 0; } =20 static int sdma_v5_0_hw_fini(struct amdgpu_ip_block *ip_block) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c b/drivers/gpu/drm/amd/a= mdgpu/sdma_v5_2.c index 4133163fa24c..ecf4f1200079 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c @@ -1264,7 +1264,6 @@ static int sdma_v5_2_early_init(struct amdgpu_ip_bloc= k *ip_block) return r; =20 sdma_v5_2_set_ring_funcs(adev); - sdma_v5_2_set_buffer_funcs(adev); amdgpu_sdma_set_vm_pte_scheds(adev, &sdma_v5_2_vm_pte_funcs); sdma_v5_2_set_irq_funcs(adev); sdma_v5_2_set_mqd_funcs(adev); @@ -1401,8 +1400,14 @@ static int sdma_v5_2_sw_fini(struct amdgpu_ip_block = *ip_block) static int sdma_v5_2_hw_init(struct amdgpu_ip_block *ip_block) { struct amdgpu_device *adev =3D ip_block->adev; + int r; =20 - return sdma_v5_2_start(adev); + r =3D sdma_v5_2_start(adev); + if (r) + return r; + sdma_v5_2_set_buffer_funcs(adev); + + return 0; } =20 static int sdma_v5_2_hw_fini(struct amdgpu_ip_block *ip_block) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c b/drivers/gpu/drm/amd/a= mdgpu/sdma_v6_0.c index 1b9c1e659095..25d6eae560e3 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c @@ -1313,7 +1313,6 @@ static int sdma_v6_0_early_init(struct amdgpu_ip_bloc= k *ip_block) return r; =20 sdma_v6_0_set_ring_funcs(adev); - sdma_v6_0_set_buffer_funcs(adev); amdgpu_sdma_set_vm_pte_scheds(adev, &sdma_v6_0_vm_pte_funcs); sdma_v6_0_set_irq_funcs(adev); sdma_v6_0_set_mqd_funcs(adev); @@ -1486,6 +1485,7 @@ static int sdma_v6_0_hw_init(struct amdgpu_ip_block *= ip_block) r =3D sdma_v6_0_start(adev); if (r) return r; + sdma_v6_0_set_buffer_funcs(adev); =20 return sdma_v6_0_set_userq_trap_interrupts(adev, true); } diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c b/drivers/gpu/drm/amd/a= mdgpu/sdma_v7_0.c index 0896f0dc6030..a5b341089e52 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c @@ -1299,7 +1299,6 @@ static int sdma_v7_0_early_init(struct amdgpu_ip_bloc= k *ip_block) } =20 sdma_v7_0_set_ring_funcs(adev); - sdma_v7_0_set_buffer_funcs(adev); amdgpu_sdma_set_vm_pte_scheds(adev, &sdma_v7_0_vm_pte_funcs); sdma_v7_0_set_irq_funcs(adev); sdma_v7_0_set_mqd_funcs(adev); @@ -1432,6 +1431,7 @@ static int sdma_v7_0_hw_init(struct amdgpu_ip_block *= ip_block) r =3D sdma_v7_0_start(adev); if (r) return r; + sdma_v7_0_set_buffer_funcs(adev); =20 return sdma_v7_0_set_userq_trap_interrupts(adev, true); } diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c b/drivers/gpu/drm/amd/a= mdgpu/sdma_v7_1.c index ac63dc26ed53..586f04355abc 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c @@ -1266,7 +1266,6 @@ static int sdma_v7_1_early_init(struct amdgpu_ip_bloc= k *ip_block) } =20 sdma_v7_1_set_ring_funcs(adev); - sdma_v7_1_set_buffer_funcs(adev); amdgpu_sdma_set_vm_pte_scheds(adev, &sdma_v7_1_vm_pte_funcs); sdma_v7_1_set_irq_funcs(adev); sdma_v7_1_set_mqd_funcs(adev); @@ -1365,10 +1364,16 @@ static int sdma_v7_1_hw_init(struct amdgpu_ip_block= *ip_block) { struct amdgpu_device *adev =3D ip_block->adev; uint32_t inst_mask; + int r; =20 inst_mask =3D GENMASK(adev->sdma.num_instances - 1, 0); =20 - return sdma_v7_1_inst_start(adev, inst_mask); + r =3D sdma_v7_1_inst_start(adev, inst_mask); + if (r) + return r; + sdma_v7_1_set_buffer_funcs(adev); + + return 0; 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charset="utf-8" This enables parallelism of operations. Signed-off-by: Pierre-Eric Pelloux-Prayer --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/= amdgpu/amdgpu_ttm.c index 4857b5abdfa5..b233bcc61ec0 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -2366,8 +2366,8 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu= _device *adev, bool enable) return; } =20 - num_clear_entities =3D 1; - num_move_entities =3D 1; + num_clear_entities =3D MIN(adev->mman.num_buffer_funcs_scheds, TTM_NUM_M= OVE_FENCES); + num_move_entities =3D MIN(adev->mman.num_buffer_funcs_scheds, TTM_NUM_MO= VE_FENCES); sched =3D adev->mman.buffer_funcs_scheds[0]; r =3D amdgpu_ttm_buffer_entity_init(&adev->mman.gtt_mgr, &adev->mman.default_entity, --=20 2.43.0 From nobody Sat Feb 7 11:38:08 2026 Received: from CH4PR04CU002.outbound.protection.outlook.com (mail-northcentralusazon11013004.outbound.protection.outlook.com [40.107.201.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 623A73358D2 for ; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: EUFSiBcyP1J0rQiLUbVu83utL4xzVeTbdg0Jw1zselDfzNIWNuHz7aRklBFaWqlB29Sk+BB85JmkJ246lxluqAJCEY6/P0l+45S9fHbNlYxNTP8qGLuf7jNjUJV6/qOr85Dh9UAc+z2hF6CoxbxNGGSqehuIKQUnFHRq7gdpsxrmm0cRDZa9MIpc61SJ+Jqmp4qpTS7rK3cgh5F749uhoe0/yWMhLWAmkD3wh5rNzc4YfveZ9yJ9r7ERsNhXTvuxJII6+huX1F6/5ESTVPeyYIGQcjUstSiS1aznpQTmhG8p3yQV1e/iFH9u2OcDYUfGaUdh5u+ISeR09tQseH5anMGb0j2kmL33Hm3QR3X5TVg9wS4TLPT1TwEkEFfdJFpfKeDAM3xRsF3omkIMbk7YzYH1yedduiQlcojXsQvoxr7XSzM+P6xuv6TStLGt6wIK X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Feb 2026 10:27:42.9653 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e2fa7c17-680e-4aef-f378-08de630edd90 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000075F0.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB9733 With this change we now have as many clear and move entities as we have sdma engines (limited to TTM_NUM_MOVE_FENCES). To enable load-balancing this patch gives access to all sdma schedulers to all entities. Signed-off-by: Pierre-Eric Pelloux-Prayer Reviewed-by: Christian K=C3=B6nig --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/= amdgpu/amdgpu_ttm.c index b233bcc61ec0..f4304f061d7e 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -2359,8 +2359,6 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu= _device *adev, bool enable) return; =20 if (enable) { - struct drm_gpu_scheduler *sched; - if (!adev->mman.num_buffer_funcs_scheds) { dev_warn(adev->dev, "Not enabling DMA transfers for in kernel use"); return; @@ -2368,11 +2366,10 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdg= pu_device *adev, bool enable) =20 num_clear_entities =3D MIN(adev->mman.num_buffer_funcs_scheds, TTM_NUM_M= OVE_FENCES); num_move_entities =3D MIN(adev->mman.num_buffer_funcs_scheds, TTM_NUM_MO= VE_FENCES); - sched =3D adev->mman.buffer_funcs_scheds[0]; r =3D amdgpu_ttm_buffer_entity_init(&adev->mman.gtt_mgr, &adev->mman.default_entity, DRM_SCHED_PRIORITY_KERNEL, - &sched, 1, 0); + adev->mman.buffer_funcs_scheds, 1, 0); if (r < 0) { dev_err(adev->dev, "Failed setting up TTM entity (%d)\n", r); @@ -2390,8 +2387,11 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdgp= u_device *adev, bool enable) =20 for (i =3D 0; i < num_clear_entities; i++) { r =3D amdgpu_ttm_buffer_entity_init( - &adev->mman.gtt_mgr, &adev->mman.clear_entities[i], - DRM_SCHED_PRIORITY_NORMAL, &sched, 1, 1); + &adev->mman.gtt_mgr, + &adev->mman.clear_entities[i], + DRM_SCHED_PRIORITY_NORMAL, + adev->mman.buffer_funcs_scheds, + adev->mman.num_buffer_funcs_scheds, 1); =20 if (r < 0) { for (j =3D 0; j < i; j++) @@ -2410,7 +2410,9 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu= _device *adev, bool enable) r =3D amdgpu_ttm_buffer_entity_init( &adev->mman.gtt_mgr, &adev->mman.move_entities[i], - DRM_SCHED_PRIORITY_NORMAL, &sched, 1, 2); + DRM_SCHED_PRIORITY_NORMAL, + adev->mman.buffer_funcs_scheds, + adev->mman.num_buffer_funcs_scheds, 2); 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charset="utf-8" It's doing the same thing as amdgpu_fill_buffer(src_data=3D0), so drop it. The only caveat is that amdgpu_res_cleared() return value is only valid right after allocation. --- v2: introduce new "bool consider_clear_status" arg --- Signed-off-by: Pierre-Eric Pelloux-Prayer --- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 16 ++-- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 88 +++++----------------- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 6 +- 3 files changed, 32 insertions(+), 78 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/a= md/amdgpu/amdgpu_object.c index 66c20dd46d12..d0884bbffa75 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c @@ -717,13 +717,17 @@ int amdgpu_bo_create(struct amdgpu_device *adev, bo->tbo.resource->mem_type =3D=3D TTM_PL_VRAM) { struct dma_fence *fence; =20 - r =3D amdgpu_ttm_clear_buffer(bo, bo->tbo.base.resv, &fence); + r =3D amdgpu_fill_buffer(amdgpu_ttm_next_clear_entity(adev), + bo, 0, NULL, &fence, + true, AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER); if (unlikely(r)) goto fail_unreserve; =20 - dma_resv_add_fence(bo->tbo.base.resv, fence, - DMA_RESV_USAGE_KERNEL); - dma_fence_put(fence); + if (fence) { + dma_resv_add_fence(bo->tbo.base.resv, fence, + DMA_RESV_USAGE_KERNEL); + dma_fence_put(fence); + } } if (!bp->resv) amdgpu_bo_unreserve(bo); @@ -1326,8 +1330,8 @@ void amdgpu_bo_release_notify(struct ttm_buffer_objec= t *bo) goto out; =20 r =3D amdgpu_fill_buffer(amdgpu_ttm_next_clear_entity(adev), - abo, 0, &bo->base._resv, - &fence, AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE); + abo, 0, &bo->base._resv, &fence, + false, AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE); if (WARN_ON(r)) goto out; =20 diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/= amdgpu/amdgpu_ttm.c index f4304f061d7e..b7124356dd26 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -418,7 +418,7 @@ static int amdgpu_move_blit(struct ttm_buffer_object *b= o, (abo->flags & AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE)) { struct dma_fence *wipe_fence =3D NULL; r =3D amdgpu_fill_buffer(entity, abo, 0, NULL, &wipe_fence, - AMDGPU_KERNEL_JOB_ID_MOVE_BLIT); + false, AMDGPU_KERNEL_JOB_ID_MOVE_BLIT); if (r) { goto error; } else if (wipe_fence) { @@ -2582,76 +2582,25 @@ static int amdgpu_ttm_fill_mem(struct amdgpu_device= *adev, } =20 /** - * amdgpu_ttm_clear_buffer - clear memory buffers - * @bo: amdgpu buffer object - * @resv: reservation object - * @fence: dma_fence associated with the operation + * amdgpu_fill_buffer - fill a buffer with a given value + * @entity: entity to use + * @bo: the bo to fill + * @src_data: the value to set + * @resv: fences contained in this reservation will be used as dependencie= s. + * @out_fence: the fence from the last clear will be stored here. It might= be + * NULL if no job was run. + * @dependency: optional input dependency fence. + * @consider_clear_status: true if region reported as cleared by amdgpu_re= s_cleared() + * are skipped. + * @k_job_id: trace id * - * Clear the memory buffer resource. - * - * Returns: - * 0 for success or a negative error code on failure. */ -int amdgpu_ttm_clear_buffer(struct amdgpu_bo *bo, - struct dma_resv *resv, - struct dma_fence **fence) -{ - struct amdgpu_device *adev =3D amdgpu_ttm_adev(bo->tbo.bdev); - struct amdgpu_ttm_buffer_entity *entity; - struct amdgpu_res_cursor cursor; - u64 addr; - int r =3D 0; - - if (!adev->mman.buffer_funcs_enabled) - return -EINVAL; - - if (!fence) - return -EINVAL; - entity =3D &adev->mman.clear_entities[0]; - *fence =3D dma_fence_get_stub(); - - amdgpu_res_first(bo->tbo.resource, 0, amdgpu_bo_size(bo), &cursor); - - mutex_lock(&entity->lock); - while (cursor.remaining) { - struct dma_fence *next =3D NULL; - u64 size; - - if (amdgpu_res_cleared(&cursor)) { - amdgpu_res_next(&cursor, cursor.size); - continue; - } - - /* Never clear more than 256MiB at once to avoid timeouts */ - size =3D min(cursor.size, 256ULL << 20); - - r =3D amdgpu_ttm_map_buffer(entity, &bo->tbo, bo->tbo.resource, &cursor, - 0, false, &size, &addr); - if (r) - goto err; - - r =3D amdgpu_ttm_fill_mem(adev, entity, 0, addr, size, resv, - &next, true, - AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER); - if (r) - goto err; - - dma_fence_put(*fence); - *fence =3D next; - - amdgpu_res_next(&cursor, size); - } -err: - mutex_unlock(&entity->lock); - - return r; -} - int amdgpu_fill_buffer(struct amdgpu_ttm_buffer_entity *entity, struct amdgpu_bo *bo, uint32_t src_data, struct dma_resv *resv, - struct dma_fence **f, + struct dma_fence **out_fence, + bool consider_clear_status, u64 k_job_id) { struct amdgpu_device *adev =3D amdgpu_ttm_adev(bo->tbo.bdev); @@ -2669,6 +2618,11 @@ int amdgpu_fill_buffer(struct amdgpu_ttm_buffer_enti= ty *entity, struct dma_fence *next; uint64_t cur_size, to; =20 + if (consider_clear_status && amdgpu_res_cleared(&dst)) { + amdgpu_res_next(&dst, dst.size); + continue; + } + /* Never fill more than 256MiB at once to avoid timeouts */ cur_size =3D min(dst.size, 256ULL << 20); =20 @@ -2690,9 +2644,7 @@ int amdgpu_fill_buffer(struct amdgpu_ttm_buffer_entit= y *entity, } error: mutex_unlock(&entity->lock); - if (f) - *f =3D dma_fence_get(fence); - dma_fence_put(fence); + *out_fence =3D fence; return r; } =20 diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/= amdgpu/amdgpu_ttm.h index a6249252948b..436a3e09a178 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h @@ -187,14 +187,12 @@ int amdgpu_copy_buffer(struct amdgpu_device *adev, struct dma_resv *resv, struct dma_fence **fence, bool vm_needs_flush, uint32_t copy_flags); -int amdgpu_ttm_clear_buffer(struct amdgpu_bo *bo, - struct dma_resv *resv, - struct dma_fence **fence); int amdgpu_fill_buffer(struct amdgpu_ttm_buffer_entity *entity, struct amdgpu_bo *bo, uint32_t src_data, struct dma_resv *resv, - struct dma_fence **f, + struct dma_fence **out_fence, + bool consider_clear_status, u64 k_job_id); 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Reviewed-by: Christian K=C3=B6nig --- v2: amdgpu_ttm_clear_buffer instead of amdgpu_clear_buffer --- Signed-off-by: Pierre-Eric Pelloux-Prayer Reviewed-by: Christian K=C3=B6nig --- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 12 +++++------ drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 23 ++++++++++------------ drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 13 ++++++------ 3 files changed, 22 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/a= md/amdgpu/amdgpu_object.c index d0884bbffa75..195cb1c814d1 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c @@ -717,9 +717,9 @@ int amdgpu_bo_create(struct amdgpu_device *adev, bo->tbo.resource->mem_type =3D=3D TTM_PL_VRAM) { struct dma_fence *fence; =20 - r =3D amdgpu_fill_buffer(amdgpu_ttm_next_clear_entity(adev), - bo, 0, NULL, &fence, - true, AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER); + r =3D amdgpu_ttm_clear_buffer(amdgpu_ttm_next_clear_entity(adev), + bo, NULL, &fence, + true, AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER); if (unlikely(r)) goto fail_unreserve; =20 @@ -1329,9 +1329,9 @@ void amdgpu_bo_release_notify(struct ttm_buffer_objec= t *bo) if (r) goto out; =20 - r =3D amdgpu_fill_buffer(amdgpu_ttm_next_clear_entity(adev), - abo, 0, &bo->base._resv, &fence, - false, AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE); + r =3D amdgpu_ttm_clear_buffer(amdgpu_ttm_next_clear_entity(adev), + abo, &bo->base._resv, &fence, + false, AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE); if (WARN_ON(r)) goto out; =20 diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/= amdgpu/amdgpu_ttm.c index b7124356dd26..3b369b3fbce8 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -417,8 +417,8 @@ static int amdgpu_move_blit(struct ttm_buffer_object *b= o, if (old_mem->mem_type =3D=3D TTM_PL_VRAM && (abo->flags & AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE)) { struct dma_fence *wipe_fence =3D NULL; - r =3D amdgpu_fill_buffer(entity, abo, 0, NULL, &wipe_fence, - false, AMDGPU_KERNEL_JOB_ID_MOVE_BLIT); + r =3D amdgpu_ttm_clear_buffer(entity, abo, NULL, &wipe_fence, + false, AMDGPU_KERNEL_JOB_ID_MOVE_BLIT); if (r) { goto error; } else if (wipe_fence) { @@ -2582,26 +2582,23 @@ static int amdgpu_ttm_fill_mem(struct amdgpu_device= *adev, } =20 /** - * amdgpu_fill_buffer - fill a buffer with a given value + * amdgpu_ttm_clear_buffer - fill a buffer with 0 * @entity: entity to use * @bo: the bo to fill - * @src_data: the value to set * @resv: fences contained in this reservation will be used as dependencie= s. * @out_fence: the fence from the last clear will be stored here. It might= be * NULL if no job was run. - * @dependency: optional input dependency fence. * @consider_clear_status: true if region reported as cleared by amdgpu_re= s_cleared() * are skipped. * @k_job_id: trace id * */ -int amdgpu_fill_buffer(struct amdgpu_ttm_buffer_entity *entity, - struct amdgpu_bo *bo, - uint32_t src_data, - struct dma_resv *resv, - struct dma_fence **out_fence, - bool consider_clear_status, - u64 k_job_id) +int amdgpu_ttm_clear_buffer(struct amdgpu_ttm_buffer_entity *entity, + struct amdgpu_bo *bo, + struct dma_resv *resv, + struct dma_fence **out_fence, + bool consider_clear_status, + u64 k_job_id) { struct amdgpu_device *adev =3D amdgpu_ttm_adev(bo->tbo.bdev); struct dma_fence *fence =3D NULL; @@ -2632,7 +2629,7 @@ int amdgpu_fill_buffer(struct amdgpu_ttm_buffer_entit= y *entity, goto error; =20 r =3D amdgpu_ttm_fill_mem(adev, entity, - src_data, to, cur_size, resv, + 0, to, cur_size, resv, &next, true, k_job_id); if (r) goto error; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/= amdgpu/amdgpu_ttm.h index 436a3e09a178..d7b14d5cac77 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h @@ -187,13 +187,12 @@ int amdgpu_copy_buffer(struct amdgpu_device *adev, struct dma_resv *resv, struct dma_fence **fence, bool vm_needs_flush, uint32_t copy_flags); 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Signed-off-by: Pierre-Eric Pelloux-Prayer Suggested-by: Christian K=C3=B6nig --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 14 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 186 +++++++++++---------- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 4 +- 3 files changed, 108 insertions(+), 96 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/a= md/amdgpu/amdgpu_device.c index b5c48ff3d67e..072c671a3c95 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -3158,7 +3158,7 @@ static int amdgpu_device_ip_init(struct amdgpu_device= *adev) if (r) goto init_failed; =20 - amdgpu_ttm_set_buffer_funcs_status(adev, true); + amdgpu_ttm_enable_buffer_funcs(adev); =20 /* Don't init kfd if whole hive need to be reset during init */ if (adev->init_lvl->level !=3D AMDGPU_INIT_LEVEL_MINIMAL_XGMI) { @@ -3835,7 +3835,7 @@ static int amdgpu_device_ip_suspend(struct amdgpu_dev= ice *adev) amdgpu_virt_request_full_gpu(adev, false); } =20 - amdgpu_ttm_set_buffer_funcs_status(adev, false); + amdgpu_ttm_disable_buffer_funcs(adev); =20 r =3D amdgpu_device_ip_suspend_phase1(adev); if (r) @@ -4050,7 +4050,7 @@ static int amdgpu_device_ip_resume(struct amdgpu_devi= ce *adev) =20 r =3D amdgpu_device_ip_resume_phase2(adev); =20 - amdgpu_ttm_set_buffer_funcs_status(adev, true); + amdgpu_ttm_enable_buffer_funcs(adev); =20 if (r) return r; @@ -4916,7 +4916,7 @@ void amdgpu_device_fini_hw(struct amdgpu_device *adev) /* disable ras feature must before hw fini */ amdgpu_ras_pre_fini(adev); =20 - amdgpu_ttm_set_buffer_funcs_status(adev, false); + amdgpu_ttm_disable_buffer_funcs(adev); =20 /* * device went through surprise hotplug; we need to destroy topology @@ -5182,7 +5182,7 @@ int amdgpu_device_suspend(struct drm_device *dev, boo= l notify_clients) if (r) goto unwind_userq; =20 - amdgpu_ttm_set_buffer_funcs_status(adev, false); + amdgpu_ttm_disable_buffer_funcs(adev); =20 amdgpu_fence_driver_hw_fini(adev); =20 @@ -5196,7 +5196,7 @@ int amdgpu_device_suspend(struct drm_device *dev, boo= l notify_clients) return 0; =20 unwind_evict: - amdgpu_ttm_set_buffer_funcs_status(adev, true); + amdgpu_ttm_enable_buffer_funcs(adev); amdgpu_fence_driver_hw_init(adev); =20 unwind_userq: @@ -5930,7 +5930,7 @@ int amdgpu_device_reinit_after_reset(struct amdgpu_re= set_context *reset_context) if (r) goto out; =20 - amdgpu_ttm_set_buffer_funcs_status(tmp_adev, true); + amdgpu_ttm_enable_buffer_funcs(tmp_adev); =20 r =3D amdgpu_device_ip_resume_phase3(tmp_adev); if (r) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/= amdgpu/amdgpu_ttm.c index 3b369b3fbce8..7a72f634f05b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -2110,7 +2110,7 @@ int amdgpu_ttm_init(struct amdgpu_device *adev) } =20 /* Change the size here instead of the init above so only lpfn is affecte= d */ - amdgpu_ttm_set_buffer_funcs_status(adev, false); + amdgpu_ttm_disable_buffer_funcs(adev); #ifdef CONFIG_64BIT #ifdef CONFIG_X86 if (adev->gmc.xgmi.connected_to_cpu) @@ -2339,115 +2339,91 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev) } =20 /** - * amdgpu_ttm_set_buffer_funcs_status - enable/disable use of buffer funct= ions + * amdgpu_ttm_enable_buffer_funcs - enable use of buffer functions * * @adev: amdgpu_device pointer - * @enable: true when we can use buffer functions. * - * Enable/disable use of buffer functions during suspend/resume. This shou= ld + * Enable use of buffer functions during suspend/resume. This should * only be called at bootup or when userspace isn't running. */ -void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, bool e= nable) +void amdgpu_ttm_enable_buffer_funcs(struct amdgpu_device *adev) { struct ttm_resource_manager *man =3D ttm_manager_type(&adev->mman.bdev, T= TM_PL_VRAM); u32 num_clear_entities, num_move_entities; - uint64_t size; int r, i, j; =20 if (!adev->mman.initialized || amdgpu_in_reset(adev) || - adev->mman.buffer_funcs_enabled =3D=3D enable || adev->gmc.is_app_apu) + adev->mman.buffer_funcs_enabled || adev->gmc.is_app_apu) return; =20 - if (enable) { - if (!adev->mman.num_buffer_funcs_scheds) { - dev_warn(adev->dev, "Not enabling DMA transfers for in kernel use"); - return; - } + if (!adev->mman.num_buffer_funcs_scheds) { + dev_warn(adev->dev, "Not enabling DMA transfers for in kernel use"); + return; + } + + r =3D amdgpu_ttm_buffer_entity_init(&adev->mman.gtt_mgr, + &adev->mman.default_entity, + DRM_SCHED_PRIORITY_KERNEL, + adev->mman.buffer_funcs_scheds, 1, 0); + if (r < 0) { + dev_err(adev->dev, + "Failed setting up TTM entity (%d)\n", r); + return; + } + + num_clear_entities =3D MIN(adev->mman.num_buffer_funcs_scheds, TTM_NUM_MO= VE_FENCES); + num_move_entities =3D MIN(adev->mman.num_buffer_funcs_scheds, TTM_NUM_MOV= E_FENCES); + + adev->mman.clear_entities =3D kcalloc(num_clear_entities, + sizeof(struct amdgpu_ttm_buffer_entity), + GFP_KERNEL); + atomic_set(&adev->mman.next_clear_entity, 0); + if (!adev->mman.clear_entities) + goto error_free_default_entity; + + adev->mman.num_clear_entities =3D num_clear_entities; + + for (i =3D 0; i < num_clear_entities; i++) { + r =3D amdgpu_ttm_buffer_entity_init( + &adev->mman.gtt_mgr, + &adev->mman.clear_entities[i], + DRM_SCHED_PRIORITY_NORMAL, + adev->mman.buffer_funcs_scheds, + adev->mman.num_buffer_funcs_scheds, 1); =20 - num_clear_entities =3D MIN(adev->mman.num_buffer_funcs_scheds, TTM_NUM_M= OVE_FENCES); - num_move_entities =3D MIN(adev->mman.num_buffer_funcs_scheds, TTM_NUM_MO= VE_FENCES); - r =3D amdgpu_ttm_buffer_entity_init(&adev->mman.gtt_mgr, - &adev->mman.default_entity, - DRM_SCHED_PRIORITY_KERNEL, - adev->mman.buffer_funcs_scheds, 1, 0); if (r < 0) { - dev_err(adev->dev, - "Failed setting up TTM entity (%d)\n", r); - return; - } - - adev->mman.clear_entities =3D kcalloc(num_clear_entities, - sizeof(struct amdgpu_ttm_buffer_entity), - GFP_KERNEL); - atomic_set(&adev->mman.next_clear_entity, 0); - if (!adev->mman.clear_entities) + for (j =3D 0; j < i; j++) + amdgpu_ttm_buffer_entity_fini( + &adev->mman.gtt_mgr, &adev->mman.clear_entities[j]); + adev->mman.num_clear_entities =3D 0; + kfree(adev->mman.clear_entities); goto error_free_default_entity; - - adev->mman.num_clear_entities =3D num_clear_entities; - - for (i =3D 0; i < num_clear_entities; i++) { - r =3D amdgpu_ttm_buffer_entity_init( - &adev->mman.gtt_mgr, - &adev->mman.clear_entities[i], - DRM_SCHED_PRIORITY_NORMAL, - adev->mman.buffer_funcs_scheds, - adev->mman.num_buffer_funcs_scheds, 1); - - if (r < 0) { - for (j =3D 0; j < i; j++) - amdgpu_ttm_buffer_entity_fini( - &adev->mman.gtt_mgr, &adev->mman.clear_entities[j]); - kfree(adev->mman.clear_entities); - adev->mman.num_clear_entities =3D 0; - adev->mman.clear_entities =3D NULL; - goto error_free_default_entity; - } } + } =20 - adev->mman.num_move_entities =3D num_move_entities; - atomic_set(&adev->mman.next_move_entity, 0); - for (i =3D 0; i < num_move_entities; i++) { - r =3D amdgpu_ttm_buffer_entity_init( - &adev->mman.gtt_mgr, - &adev->mman.move_entities[i], - DRM_SCHED_PRIORITY_NORMAL, - adev->mman.buffer_funcs_scheds, - adev->mman.num_buffer_funcs_scheds, 2); + adev->mman.num_move_entities =3D num_move_entities; + atomic_set(&adev->mman.next_move_entity, 0); + for (i =3D 0; i < num_move_entities; i++) { + r =3D amdgpu_ttm_buffer_entity_init( + &adev->mman.gtt_mgr, + &adev->mman.move_entities[i], + DRM_SCHED_PRIORITY_NORMAL, + adev->mman.buffer_funcs_scheds, + adev->mman.num_buffer_funcs_scheds, 2); =20 - if (r < 0) { - for (j =3D 0; j < i; j++) - amdgpu_ttm_buffer_entity_fini( - &adev->mman.gtt_mgr, &adev->mman.move_entities[j]); - adev->mman.num_move_entities =3D 0; - goto error_free_clear_entities; - } + if (r < 0) { + for (j =3D 0; j < i; j++) + amdgpu_ttm_buffer_entity_fini( + &adev->mman.gtt_mgr, + &adev->mman.move_entities[j]); + adev->mman.num_move_entities =3D 0; + goto error_free_clear_entities; } - } else { - amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr, - &adev->mman.default_entity); - for (i =3D 0; i < adev->mman.num_clear_entities; i++) - amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr, - &adev->mman.clear_entities[i]); - for (i =3D 0; i < adev->mman.num_move_entities; i++) - amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr, - &adev->mman.move_entities[i]); - /* Drop all the old fences since re-creating the scheduler entities - * will allocate new contexts. - */ - ttm_resource_manager_cleanup(man); - kfree(adev->mman.clear_entities); - adev->mman.clear_entities =3D NULL; - adev->mman.num_clear_entities =3D 0; - adev->mman.num_move_entities =3D 0; } =20 /* this just adjusts TTM size idea, which sets lpfn to the correct value = */ - if (enable) - size =3D adev->gmc.real_vram_size; - else - size =3D adev->gmc.visible_vram_size; - man->size =3D size; - adev->mman.buffer_funcs_enabled =3D enable; + man->size =3D adev->gmc.real_vram_size; + adev->mman.buffer_funcs_enabled =3D true; =20 return; =20 @@ -2463,6 +2439,42 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdgp= u_device *adev, bool enable) &adev->mman.default_entity); } =20 +/** + * amdgpu_ttm_disable_buffer_funcs - disable use of buffer functions + * + * @adev: amdgpu_device pointer + */ +void amdgpu_ttm_disable_buffer_funcs(struct amdgpu_device *adev) +{ + struct ttm_resource_manager *man =3D + ttm_manager_type(&adev->mman.bdev, TTM_PL_VRAM); + int i; + + if (!adev->mman.buffer_funcs_enabled) + return; + + amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr, + &adev->mman.default_entity); + for (i =3D 0; i < adev->mman.num_move_entities; i++) + amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr, + &adev->mman.move_entities[i]); + for (i =3D 0; i < adev->mman.num_clear_entities; i++) + amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr, + &adev->mman.clear_entities[i]); + /* Drop all the old fences since re-creating the scheduler entities + * will allocate new contexts. + */ + ttm_resource_manager_cleanup(man); + + kfree(adev->mman.clear_entities); + adev->mman.clear_entities =3D NULL; + adev->mman.num_clear_entities =3D 0; + adev->mman.num_move_entities =3D 0; + + man->size =3D adev->gmc.visible_vram_size; + adev->mman.buffer_funcs_enabled =3D false; +} + static int amdgpu_ttm_prepare_job(struct amdgpu_device *adev, struct amdgpu_ttm_buffer_entity *entity, unsigned int num_dw, diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/= amdgpu/amdgpu_ttm.h index d7b14d5cac77..8a5f34aaabac 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h @@ -178,8 +178,8 @@ bool amdgpu_res_cpu_visible(struct amdgpu_device *adev, =20 int amdgpu_ttm_init(struct amdgpu_device *adev); void amdgpu_ttm_fini(struct amdgpu_device *adev); -void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, - bool enable); +void amdgpu_ttm_enable_buffer_funcs(struct amdgpu_device *adev); +void amdgpu_ttm_disable_buffer_funcs(struct amdgpu_device *adev); int amdgpu_copy_buffer(struct amdgpu_device *adev, struct amdgpu_ttm_buffer_entity *entity, uint64_t src_offset, --=20 2.43.0