From nobody Mon Feb 9 12:42:42 2026 Received: from szxga01-in.huawei.com (szxga01-in.huawei.com [45.249.212.187]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EC19E399026 for ; Tue, 3 Feb 2026 09:54:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.249.212.187 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770112484; cv=none; b=Xk6yfWyzDpm5EOLg0KWvNOIxdtdDNko/gqOSRhBf49h0NMNp3kNGYpI0evNF4CaJzQ284hVSlPHD3ki8r1z1CRMRaVRU7u5LdUIcXUY+KLmyTtptDwRHXIDjAGsfwUg6w+H9+u/emNl4ttLl12FpzIaHb50deQvDacnmhVG13Q8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770112484; c=relaxed/simple; bh=0nDyZtaWZE7PBZvOjz9+NgHs61vZVHfZlVKHruWCTDg=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=F5sjPIIrgIzs0DzOkjWVdKeoxJsar4C7apGwpuPug53bQHflB6ylIAruvw/k/FhZIxHI9pYVFwdpcg4onK42Ck7JsWh97bbj6nYbbww2s/mbZALETro1889OXUSMbdEVeZ79TN5PWhgjn0f2j+3gEQr+tj8XaEhFFrc8dlghsmw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=h-partners.com; dkim=pass (1024-bit key) header.d=h-partners.com header.i=@h-partners.com header.b=dVKyQtsP; dkim=pass (1024-bit key) header.d=h-partners.com header.i=@h-partners.com header.b=dVKyQtsP; arc=none smtp.client-ip=45.249.212.187 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=h-partners.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=h-partners.com header.i=@h-partners.com header.b="dVKyQtsP"; dkim=pass (1024-bit key) header.d=h-partners.com header.i=@h-partners.com header.b="dVKyQtsP" dkim-signature: v=1; a=rsa-sha256; d=h-partners.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=VM+Jc/f54ziinASL269j+aHrU0OKs5LpSdevI2aHl9A=; b=dVKyQtsPcBOH1jDEa2vplD0/9GqUSyeB1DMZ6wQeQQrK/BMh1df+EcRhOvJ/piVpsYIcGXhpd KBSZAfY9aCTzT6Jniqgitq0MV1wamgg4xNuIUoHBdAJWlQCw1YP/hlwGlXBC9WWzTLfcW9etF7J I+r9smEKzTLsA10FjspqF9U= Received: from canpmsgout01.his.huawei.com (unknown [172.19.92.178]) by szxga01-in.huawei.com (SkyGuard) with ESMTPS id 4f4zMg6nk5z1BFQP for ; Tue, 3 Feb 2026 17:53:51 +0800 (CST) dkim-signature: v=1; a=rsa-sha256; d=h-partners.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=VM+Jc/f54ziinASL269j+aHrU0OKs5LpSdevI2aHl9A=; b=dVKyQtsPcBOH1jDEa2vplD0/9GqUSyeB1DMZ6wQeQQrK/BMh1df+EcRhOvJ/piVpsYIcGXhpd KBSZAfY9aCTzT6Jniqgitq0MV1wamgg4xNuIUoHBdAJWlQCw1YP/hlwGlXBC9WWzTLfcW9etF7J I+r9smEKzTLsA10FjspqF9U= Received: from mail.maildlp.com (unknown [172.19.163.104]) by canpmsgout01.his.huawei.com (SkyGuard) with ESMTPS id 4f4zHG4G8kz1T4FV; Tue, 3 Feb 2026 17:50:02 +0800 (CST) Received: from kwepemf100008.china.huawei.com (unknown [7.202.181.222]) by mail.maildlp.com (Postfix) with ESMTPS id 8F62F404AD; Tue, 3 Feb 2026 17:54:23 +0800 (CST) Received: from huawei.com (10.50.87.109) by kwepemf100008.china.huawei.com (7.202.181.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.36; Tue, 3 Feb 2026 17:54:22 +0800 From: Zeng Heng To: , , , , , , , , , , , , , , , , , , , , , , , , CC: , , Subject: [PATCH v2 2/2] arm_mpam: Update architecture version check for MPAM MSC Date: Tue, 3 Feb 2026 17:54:06 +0800 Message-ID: <20260203095406.6437-3-zengheng4@huawei.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260203095406.6437-1-zengheng4@huawei.com> References: <20260203095406.6437-1-zengheng4@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems200002.china.huawei.com (7.221.188.68) To kwepemf100008.china.huawei.com (7.202.181.222) Content-Type: text/plain; charset="utf-8" In addition to updating the CPU MPAM version check, the MPAM MSC version check also need to be updated. mpam_msc_check_aidr() is added to check the MSC AIDR register, ensuring that both the major and minor version numbers fall within the supported range of the MPAM architecture version. Signed-off-by: Zeng Heng --- drivers/resctrl/mpam_devices.c | 16 +++++++++++++--- drivers/resctrl/mpam_internal.h | 5 ++++- 2 files changed, 17 insertions(+), 4 deletions(-) diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c index 744df3a6a078..a58031f0a280 100644 --- a/drivers/resctrl/mpam_devices.c +++ b/drivers/resctrl/mpam_devices.c @@ -202,6 +202,17 @@ static inline void _mpam_write_monsel_reg(struct mpam_= msc *msc, u16 reg, u32 val =20 #define mpam_write_monsel_reg(msc, reg, val) _mpam_write_monsel_reg(msc,= MSMON_##reg, val) =20 +static bool mpam_msc_check_aidr(struct mpam_msc *msc) +{ + u32 rev; + + rev =3D __mpam_read_reg(msc, MPAMF_AIDR) & MPAMF_AIDR_ARCH_REV; + + return rev =3D=3D MPAM_ARCHITECTURE_V0_1 || + rev =3D=3D MPAM_ARCHITECTURE_V1_0 || + rev =3D=3D MPAM_ARCHITECTURE_V1_1; +} + static u64 mpam_msc_read_idr(struct mpam_msc *msc) { u64 idr_high =3D 0, idr_low; @@ -842,9 +853,8 @@ static int mpam_msc_hw_probe(struct mpam_msc *msc) =20 lockdep_assert_held(&msc->probe_lock); =20 - idr =3D __mpam_read_reg(msc, MPAMF_AIDR); - if ((idr & MPAMF_AIDR_ARCH_MAJOR_REV) !=3D MPAM_ARCHITECTURE_V1) { - dev_err_once(dev, "MSC does not match MPAM architecture v1.x\n"); + if (!mpam_msc_check_aidr(msc)) { + dev_err_once(dev, "MSC does not match MPAM architecture\n"); return -EIO; } =20 diff --git a/drivers/resctrl/mpam_internal.h b/drivers/resctrl/mpam_interna= l.h index e79c3c47259c..7c6431405d5a 100644 --- a/drivers/resctrl/mpam_internal.h +++ b/drivers/resctrl/mpam_internal.h @@ -394,7 +394,9 @@ int mpam_get_cpumask_from_cache_id(unsigned long cache_= id, u32 cache_level, * Component Specification. * https://developer.arm.com/documentation/ihi0099/aa/ */ -#define MPAM_ARCHITECTURE_V1 0x10 +#define MPAM_ARCHITECTURE_V0_1 0x01 +#define MPAM_ARCHITECTURE_V1_0 0x10 +#define MPAM_ARCHITECTURE_V1_1 0x11 =20 /* Memory mapped control pages */ /* ID Register offsets in the memory mapped page */ @@ -518,6 +520,7 @@ int mpam_get_cpumask_from_cache_id(unsigned long cache_= id, u32 cache_level, /* MPAMF_AIDR - MPAM architecture ID register */ #define MPAMF_AIDR_ARCH_MINOR_REV GENMASK(3, 0) #define MPAMF_AIDR_ARCH_MAJOR_REV GENMASK(7, 4) +#define MPAMF_AIDR_ARCH_REV (MPAMF_AIDR_ARCH_MAJOR_REV | MPAMF_AIDR_ARCH_= MINOR_REV) =20 /* MPAMCFG_PART_SEL - MPAM partition configuration selection register */ #define MPAMCFG_PART_SEL_PARTID_SEL GENMASK(15, 0) --=20 2.25.1