From nobody Sun Feb 8 11:17:02 2026 Received: from canpmsgout04.his.huawei.com (canpmsgout04.his.huawei.com [113.46.200.219]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 079D3399023 for ; Tue, 3 Feb 2026 09:54:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.219 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770112467; cv=none; b=X2hfJeoaJg9xJOAmLDBGvHkAmOaUIU90SKRqyLwDx7fGmdVyiCJBwN+dnu4bK70eV5uW2reawUQCTed+wW0Gx/ww9FmYmg18mpuFZjA6Kr6uj4rBSzvatwg+NyEL+jOnBMVBwvOfJ3j8Qv9stJEK6lgbSjUSYucl0BQF0Hxc7e4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770112467; c=relaxed/simple; bh=14qcawHXRm2Ezrx/hXDeuejXRFTco6SUat/RrekKYkY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Kf0HVCyEAnP+z6MuUURlm+ysPjKuid0haWrA4emNSKMinHNuC4DDPk71yItLR8hfDmWWOaZ8fW/gNMzwKW2L0qhI7R56hbupEKF6wawLQXCFvk9btRa2ydpIOX+nEAHf6OPKaDBcNPVoFXd3EZ36kTGMetmHQq9ruvfzDre2sRg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=h-partners.com; dkim=pass (1024-bit key) header.d=h-partners.com header.i=@h-partners.com header.b=QJDPpwCj; arc=none smtp.client-ip=113.46.200.219 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=h-partners.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=h-partners.com header.i=@h-partners.com header.b="QJDPpwCj" dkim-signature: v=1; a=rsa-sha256; d=h-partners.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=35k2Qius4SFCnV/aj/qYOl0lTPhCwV+oICdVuqJczm4=; b=QJDPpwCj/f1x6vJ/sxE/k8xds5nH1n4hpcvGDKbgDLB6GSMUiEEPFiHzSKwlzwf/CzT1nsg4p c241toTjDFCKwx4K82z1AsKDjPqn1OrtCV8AJCxMjboQJrm1wTMv+0ttJJG3BqkFGM7hjQ7IIEa LzNhvN2HR72wYK7GkJtiHcY= Received: from mail.maildlp.com (unknown [172.19.162.144]) by canpmsgout04.his.huawei.com (SkyGuard) with ESMTPS id 4f4zJ914zpz1prMp; Tue, 3 Feb 2026 17:50:49 +0800 (CST) Received: from kwepemf100008.china.huawei.com (unknown [7.202.181.222]) by mail.maildlp.com (Postfix) with ESMTPS id 9011D40538; Tue, 3 Feb 2026 17:54:22 +0800 (CST) Received: from huawei.com (10.50.87.109) by kwepemf100008.china.huawei.com (7.202.181.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.36; Tue, 3 Feb 2026 17:54:21 +0800 From: Zeng Heng To: , , , , , , , , , , , , , , , , , , , , , , , , CC: , , Subject: [PATCH v2 1/2] arm64: cpufeature: Add support for the MPAM v0.1 architecture version Date: Tue, 3 Feb 2026 17:54:05 +0800 Message-ID: <20260203095406.6437-2-zengheng4@huawei.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260203095406.6437-1-zengheng4@huawei.com> References: <20260203095406.6437-1-zengheng4@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems200002.china.huawei.com (7.221.188.68) To kwepemf100008.china.huawei.com (7.202.181.222) Content-Type: text/plain; charset="utf-8" According to the MPAM spec [1], the supported architecture versions are v1.0, v1.1 and v0.1. MPAM versions v0.1 and v1.1 are functionally identical, but v0.1 additionally supports the FORCE_NS feature. ID_AA64PR | ID_AA64PR | MPAM Extension | Notes F0_EL1. | F1_EL1. | Architecture | MPAM | MPAM_frac | version | --------------------------------------------------------------------------- 0b0000 | 0b0001 | v0.1 | MPAM v0.1 is implemented. | | | MPAM v0.1 is the same as MPAM v1.1 | | | with FORCE_NS which is | | | incompatible with MPAM v1.0. --------------------------------------------------------------------------- 0b0001 | 0b0000 | v1.0 | MPAM v1.0 is implemented. --------------------------------------------------------------------------- 0b0001 | 0b0001 | v1.1 | MPAM v1.1 is implemented. | | | MPAM v1.1 includes all features of | | | MPAM v1.0. | | | It must not include FORCE_NS. FORCE_NS is a feature that operates in EL3 mode. Consequently, the current Linux MPAM driver is also compatible with MPAM v0.1. To support v0.1, the existing driver which only checks ID_AA64PFR0_EL1.MPAM for the major version needs to examine ID_AA64PFR1_EL1.MPAM_frac for the minor version as well. [1] https://developer.arm.com/documentation/ddi0598/db/?lang=3Den Signed-off-by: Zeng Heng --- arch/arm64/include/asm/cpufeature.h | 7 +++++++ arch/arm64/include/asm/el2_setup.h | 4 +++- arch/arm64/kernel/cpufeature.c | 15 +++++++++++---- 3 files changed, 21 insertions(+), 5 deletions(-) diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/c= pufeature.h index 4de51f8d92cb..a57870fa96db 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -620,6 +620,13 @@ static inline bool id_aa64pfr0_mpam(u64 pfr0) return val > 0; } =20 +static inline bool id_aa64pfr1_mpamfrac(u64 pfr1) +{ + u32 val =3D cpuid_feature_extract_unsigned_field(pfr1, ID_AA64PFR1_EL1_MP= AM_frac_SHIFT); + + return val > 0; +} + static inline bool id_aa64pfr1_mte(u64 pfr1) { u32 val =3D cpuid_feature_extract_unsigned_field(pfr1, ID_AA64PFR1_EL1_MT= E_SHIFT); diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el= 2_setup.h index cacd20df1786..606cf14e4044 100644 --- a/arch/arm64/include/asm/el2_setup.h +++ b/arch/arm64/include/asm/el2_setup.h @@ -501,7 +501,9 @@ #endif =20 .macro finalise_el2_state - check_override id_aa64pfr0, ID_AA64PFR0_EL1_MPAM_SHIFT, .Linit_mpam_\@, .= Lskip_mpam_\@, x1, x2 + check_override id_aa64pfr0, ID_AA64PFR0_EL1_MPAM_SHIFT, .Linit_mpam_\@, .= Lmpam_minor_\@, x1, x2 +.Lmpam_minor_\@: + check_override id_aa64pfr1, ID_AA64PFR1_EL1_MPAM_frac_SHIFT, .Linit_mpam_= \@, .Lskip_mpam_\@, x1, x2 =20 .Linit_mpam_\@: msr_s SYS_MPAM2_EL2, xzr // use the default partition diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index c840a93b9ef9..e8fa6f7cf2a2 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -1159,6 +1159,14 @@ static __init void detect_system_supports_pseudo_nmi= (void) static inline void detect_system_supports_pseudo_nmi(void) { } #endif =20 +static bool detect_ftr_has_mpam(void) +{ + u64 pfr0 =3D read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1); + u64 pfr1 =3D read_sanitised_ftr_reg(SYS_ID_AA64PFR1_EL1); + + return id_aa64pfr0_mpam(pfr0) || id_aa64pfr1_mpamfrac(pfr1); +} + void __init init_cpu_features(struct cpuinfo_arm64 *info) { /* Before we start using the tables, make sure it is sorted */ @@ -1206,7 +1214,7 @@ void __init init_cpu_features(struct cpuinfo_arm64 *i= nfo) cpacr_restore(cpacr); } =20 - if (id_aa64pfr0_mpam(read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1))) { + if (detect_ftr_has_mpam()) { info->reg_mpamidr =3D read_cpuid(MPAMIDR_EL1); init_cpu_ftr_reg(SYS_MPAMIDR_EL1, info->reg_mpamidr); } @@ -1462,7 +1470,7 @@ void update_cpu_features(int cpu, cpacr_restore(cpacr); } =20 - if (id_aa64pfr0_mpam(read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1))) { + if (detect_ftr_has_mpam()) { info->reg_mpamidr =3D read_cpuid(MPAMIDR_EL1); taint |=3D check_update_ftr_reg(SYS_MPAMIDR_EL1, cpu, info->reg_mpamidr, boot->reg_mpamidr); @@ -2473,7 +2481,7 @@ cpucap_panic_on_conflict(const struct arm64_cpu_capab= ilities *cap) static bool test_has_mpam(const struct arm64_cpu_capabilities *entry, int scope) { - if (!has_cpuid_feature(entry, scope)) + if (!detect_ftr_has_mpam()) return false; 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Tue, 3 Feb 2026 17:50:02 +0800 (CST) Received: from kwepemf100008.china.huawei.com (unknown [7.202.181.222]) by mail.maildlp.com (Postfix) with ESMTPS id 8F62F404AD; Tue, 3 Feb 2026 17:54:23 +0800 (CST) Received: from huawei.com (10.50.87.109) by kwepemf100008.china.huawei.com (7.202.181.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.36; Tue, 3 Feb 2026 17:54:22 +0800 From: Zeng Heng To: , , , , , , , , , , , , , , , , , , , , , , , , CC: , , Subject: [PATCH v2 2/2] arm_mpam: Update architecture version check for MPAM MSC Date: Tue, 3 Feb 2026 17:54:06 +0800 Message-ID: <20260203095406.6437-3-zengheng4@huawei.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260203095406.6437-1-zengheng4@huawei.com> References: <20260203095406.6437-1-zengheng4@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems200002.china.huawei.com (7.221.188.68) To kwepemf100008.china.huawei.com (7.202.181.222) Content-Type: text/plain; charset="utf-8" In addition to updating the CPU MPAM version check, the MPAM MSC version check also need to be updated. mpam_msc_check_aidr() is added to check the MSC AIDR register, ensuring that both the major and minor version numbers fall within the supported range of the MPAM architecture version. Signed-off-by: Zeng Heng --- drivers/resctrl/mpam_devices.c | 16 +++++++++++++--- drivers/resctrl/mpam_internal.h | 5 ++++- 2 files changed, 17 insertions(+), 4 deletions(-) diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c index 744df3a6a078..a58031f0a280 100644 --- a/drivers/resctrl/mpam_devices.c +++ b/drivers/resctrl/mpam_devices.c @@ -202,6 +202,17 @@ static inline void _mpam_write_monsel_reg(struct mpam_= msc *msc, u16 reg, u32 val =20 #define mpam_write_monsel_reg(msc, reg, val) _mpam_write_monsel_reg(msc,= MSMON_##reg, val) =20 +static bool mpam_msc_check_aidr(struct mpam_msc *msc) +{ + u32 rev; + + rev =3D __mpam_read_reg(msc, MPAMF_AIDR) & MPAMF_AIDR_ARCH_REV; + + return rev =3D=3D MPAM_ARCHITECTURE_V0_1 || + rev =3D=3D MPAM_ARCHITECTURE_V1_0 || + rev =3D=3D MPAM_ARCHITECTURE_V1_1; +} + static u64 mpam_msc_read_idr(struct mpam_msc *msc) { u64 idr_high =3D 0, idr_low; @@ -842,9 +853,8 @@ static int mpam_msc_hw_probe(struct mpam_msc *msc) =20 lockdep_assert_held(&msc->probe_lock); =20 - idr =3D __mpam_read_reg(msc, MPAMF_AIDR); - if ((idr & MPAMF_AIDR_ARCH_MAJOR_REV) !=3D MPAM_ARCHITECTURE_V1) { - dev_err_once(dev, "MSC does not match MPAM architecture v1.x\n"); + if (!mpam_msc_check_aidr(msc)) { + dev_err_once(dev, "MSC does not match MPAM architecture\n"); return -EIO; } =20 diff --git a/drivers/resctrl/mpam_internal.h b/drivers/resctrl/mpam_interna= l.h index e79c3c47259c..7c6431405d5a 100644 --- a/drivers/resctrl/mpam_internal.h +++ b/drivers/resctrl/mpam_internal.h @@ -394,7 +394,9 @@ int mpam_get_cpumask_from_cache_id(unsigned long cache_= id, u32 cache_level, * Component Specification. * https://developer.arm.com/documentation/ihi0099/aa/ */ -#define MPAM_ARCHITECTURE_V1 0x10 +#define MPAM_ARCHITECTURE_V0_1 0x01 +#define MPAM_ARCHITECTURE_V1_0 0x10 +#define MPAM_ARCHITECTURE_V1_1 0x11 =20 /* Memory mapped control pages */ /* ID Register offsets in the memory mapped page */ @@ -518,6 +520,7 @@ int mpam_get_cpumask_from_cache_id(unsigned long cache_= id, u32 cache_level, /* MPAMF_AIDR - MPAM architecture ID register */ #define MPAMF_AIDR_ARCH_MINOR_REV GENMASK(3, 0) #define MPAMF_AIDR_ARCH_MAJOR_REV GENMASK(7, 4) +#define MPAMF_AIDR_ARCH_REV (MPAMF_AIDR_ARCH_MAJOR_REV | MPAMF_AIDR_ARCH_= MINOR_REV) =20 /* MPAMCFG_PART_SEL - MPAM partition configuration selection register */ #define MPAMCFG_PART_SEL_PARTID_SEL GENMASK(15, 0) --=20 2.25.1