From nobody Tue Feb 10 09:24:25 2026 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B28F73148C2 for ; Tue, 3 Feb 2026 09:34:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770111281; cv=none; b=fA4WlsGNSdSZ4Y8Zd5dIONzQeIxq4Aqq9zWphUqY7Tuyo9YnQngOmEGKMO+i4xbJzZrj2ivl3MvRd3lHWc7x551EmN0L0SKY6jP7GhDPBRueWb4VL/03A5SGA7eePS3wyhhEs7OT2hCqBIGSrvI4GVW2UUk3KIjVpDSL47pe0Js= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770111281; c=relaxed/simple; bh=LNApek0UeIv8561bakOWYzQeuuZr30b4E0h9NsPKzFM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=n3xOKK38i5+1xYzFybQXP7N2Fwg2s7m/X531bZyboBRUhIZlNuM3vLYUsRytDkio0NBHLfNJmOR/EuToTYmt4QBN1cn/+xsDpQw5XNOYaRnbyarY0SV4q35Z23eWp/bipTVs5qGKGovdCcnBPeNBiPRLem0qTw3qjeChgsLP+/s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de; spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.201.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.whiteo.stw.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1vnCnr-0003lY-QA; Tue, 03 Feb 2026 10:34:35 +0100 Received: from dude04.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::ac] helo=dude04) by drehscheibe.grey.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1vnCnr-003slO-2f; Tue, 03 Feb 2026 10:34:35 +0100 Received: from ore by dude04 with local (Exim 4.98.2) (envelope-from ) id 1vnCnr-0000000Ah8x-0MCL; Tue, 03 Feb 2026 10:34:35 +0100 From: Oleksij Rempel To: Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Oleksij Rempel , Andy Shevchenko , kernel@pengutronix.de, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, Andy Shevchenko , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , David Jander Subject: [PATCH v4 02/13] iio: dac: ds4424: refactor raw access to use bitwise operations Date: Tue, 3 Feb 2026 10:34:22 +0100 Message-ID: <20260203093434.2548978-3-o.rempel@pengutronix.de> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260203093434.2548978-1-o.rempel@pengutronix.de> References: <20260203093434.2548978-1-o.rempel@pengutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: ore@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Refactor the raw access logic to use standard GENMASK() and BIT() macros. Use abs() for magnitude calculation to simplify the logic and make the data flow clearer. Signed-off-by: Oleksij Rempel Reviewed-by: Andy Shevchenko --- changes v4: - Split patch: The functional fix for -128 was moved to the previous patch (1/9) for stable backporting. - This patch now contains only the refactoring (GENMASK/BIT/abs) on top of the fix. changes v3: - Remove "Rebase on top of regmap" note as this is now patch 1/8. - Add #include - Clarify 0mA sink/source behavior in comments - Remove redundant blank line in write_raw changes v2: - Replace S8_MIN/MAX checks with abs() > DS4424_DAC_MASK to enforce the correct [-127, 127] physical range. - Refactor read_raw/write_raw to use symmetrical bitwise operations, removing the custom bitfield union. - Rebase on top of regmap port --- drivers/iio/dac/ds4424.c | 55 +++++++++++++++------------------------- 1 file changed, 21 insertions(+), 34 deletions(-) diff --git a/drivers/iio/dac/ds4424.c b/drivers/iio/dac/ds4424.c index 059acca45f64..596ff5999271 100644 --- a/drivers/iio/dac/ds4424.c +++ b/drivers/iio/dac/ds4424.c @@ -5,6 +5,7 @@ * Copyright (C) 2017 Maxim Integrated */ =20 +#include #include #include #include @@ -19,9 +20,10 @@ #define DS4422_MAX_DAC_CHANNELS 2 #define DS4424_MAX_DAC_CHANNELS 4 =20 +#define DS4424_DAC_MASK GENMASK(6, 0) +#define DS4424_DAC_SOURCE BIT(7) + #define DS4424_DAC_ADDR(chan) ((chan) + 0xf8) -#define DS4424_SOURCE_I 1 -#define DS4424_SINK_I 0 =20 #define DS4424_CHANNEL(chan) { \ .type =3D IIO_CURRENT, \ @@ -31,22 +33,6 @@ .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW), \ } =20 -/* - * DS4424 DAC control register 8 bits - * [7] 0: to sink; 1: to source - * [6:0] steps to sink/source - * bit[7] looks like a sign bit, but the value of the register is - * not a two's complement code considering the bit[6:0] is a absolute - * distance from the zero point. - */ -union ds4424_raw_data { - struct { - u8 dx:7; - u8 source_bit:1; - }; - u8 bits; -}; - enum ds4424_device_ids { ID_DS4422, ID_DS4424, @@ -108,21 +94,21 @@ static int ds4424_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask) { - union ds4424_raw_data raw; - int ret; + int ret, regval; =20 switch (mask) { case IIO_CHAN_INFO_RAW: - ret =3D ds4424_get_value(indio_dev, val, chan->channel); + ret =3D ds4424_get_value(indio_dev, ®val, chan->channel); if (ret < 0) { pr_err("%s : ds4424_get_value returned %d\n", __func__, ret); return ret; } - raw.bits =3D *val; - *val =3D raw.dx; - if (raw.source_bit =3D=3D DS4424_SINK_I) + + *val =3D regval & DS4424_DAC_MASK; + if (!(regval & DS4424_DAC_SOURCE)) *val =3D -*val; + return IIO_VAL_INT; =20 default: @@ -134,25 +120,26 @@ static int ds4424_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask) { - union ds4424_raw_data raw; + unsigned int abs_val; =20 if (val2 !=3D 0) return -EINVAL; =20 switch (mask) { case IIO_CHAN_INFO_RAW: - if (val <=3D S8_MIN || val > S8_MAX) + abs_val =3D abs(val); + if (abs_val > DS4424_DAC_MASK) return -EINVAL; =20 - if (val > 0) { - raw.source_bit =3D DS4424_SOURCE_I; - raw.dx =3D val; - } else { - raw.source_bit =3D DS4424_SINK_I; - raw.dx =3D -val; - } + /* + * Currents exiting the IC (Source) are positive. 0 is a valid + * value for no current flow; the direction bit (Source vs Sink) + * is treated as don't-care by the hardware at 0. + */ + if (val > 0) + abs_val |=3D DS4424_DAC_SOURCE; =20 - return ds4424_set_value(indio_dev, raw.bits, chan); + return ds4424_set_value(indio_dev, abs_val, chan); =20 default: return -EINVAL; --=20 2.47.3