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charset="utf-8" CXL drivers dont require a correctable PCI AER handler. Correctable AER errors reported by CXL devices are logged and cleared in the AER driver. This makes the correctable AER handler callback in the CXL driver unnecessary. Remove cxl_cor_error_detected() and drop the .cor_error_detected callback from the CXL PCI error handlers. This consolidates correctable error reporting under the CXL RAS infrastruct= ure and avoids redundant or conflicting logging with the AER driver. Signed-off-by: Terry Bowman --- Changes in v14->v15: - Remove cxl_pci_cor_error_detected(). Is not needed. AER is logged in the AER driver. (Dan) - Update commit message (Terry) Changes in v13->v14: - New commit - Change cxl_cor_error_detected() parameter to &pdev->dev device from memdev device. (Terry) - Updated commit message (Terry) --- drivers/cxl/core/ras.c | 23 ----------------------- drivers/cxl/cxlpci.h | 2 -- drivers/cxl/pci.c | 1 - 3 files changed, 26 deletions(-) diff --git a/drivers/cxl/core/ras.c b/drivers/cxl/core/ras.c index 061e6aaec176..e5a0d0283d3f 100644 --- a/drivers/cxl/core/ras.c +++ b/drivers/cxl/core/ras.c @@ -418,29 +418,6 @@ static pci_ers_result_t cxl_port_error_detected(struct= device *dev) } } =20 -void cxl_cor_error_detected(struct pci_dev *pdev) -{ - struct cxl_dev_state *cxlds =3D pci_get_drvdata(pdev); - struct cxl_memdev *cxlmd =3D cxlds->cxlmd; - struct device *dev =3D &cxlds->cxlmd->dev; - - scoped_guard(device, dev) { - if (!dev->driver) { - dev_warn(&pdev->dev, - "%s: memdev disabled, abort error handling\n", - dev_name(dev)); - return; - } - - if (cxlds->rcd) - cxl_handle_rdport_errors(cxlds); - - cxl_handle_cor_ras(&cxlds->cxlmd->dev, cxlds->serial, - cxlmd->endpoint->regs.ras); - } -} -EXPORT_SYMBOL_NS_GPL(cxl_cor_error_detected, "CXL"); - static bool cxl_handle_aer(struct pci_dev *pdev) { struct aer_capability_regs aer; diff --git a/drivers/cxl/cxlpci.h b/drivers/cxl/cxlpci.h index 5534422b496c..e3388dffdd75 100644 --- a/drivers/cxl/cxlpci.h +++ b/drivers/cxl/cxlpci.h @@ -78,13 +78,11 @@ struct cxl_dev_state; void read_cdat_data(struct cxl_port *port); =20 #ifdef CONFIG_CXL_RAS -void cxl_cor_error_detected(struct pci_dev *pdev); void devm_cxl_dport_rch_ras_setup(struct cxl_dport *dport); pci_ers_result_t cxl_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t error); void devm_cxl_port_ras_setup(struct cxl_port *port); #else -static inline void cxl_cor_error_detected(struct pci_dev *pdev) { } static inline pci_ers_result_t cxl_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state) { diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c index ff741adc7c7f..c6b2966f5fda 100644 --- a/drivers/cxl/pci.c +++ b/drivers/cxl/pci.c @@ -1055,7 +1055,6 @@ static const struct pci_error_handlers pci_error_hand= lers =3D { .error_detected =3D cxl_pci_error_detected, .slot_reset =3D cxl_slot_reset, .resume =3D cxl_error_resume, - .cor_error_detected =3D cxl_cor_error_detected, .reset_done =3D cxl_reset_done, }; =20 --=20 2.34.1