From nobody Mon Feb 9 11:44:36 2026 Received: from mailgw.kylinos.cn (mailgw.kylinos.cn [124.126.103.232]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DC5BC18871F; Tue, 3 Feb 2026 02:49:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=124.126.103.232 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770086976; cv=none; b=A8BZkvquUCgl+SnNhGxagPlPwgWxA6i7F8lvuK3VcgUI3khTA49sFcI+1JihiJyNMg87AsWSYZYXcPAF/g2lRGXg1LN9tIGgIpC0ZFybiqcIxjc4ZIpBlDBnOLMKTI8P5gnfdSA12314yNS6fFb5O3l6EoFPZFZMCRb737Pl4yw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770086976; c=relaxed/simple; bh=Op9LCFQA2xmyTvyP/hR1jYGrxfgtqR91GdooQLp1EI8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=tTLAYF6zMIyDSV0wHHhS3HUZK7340fZZ7GS0gTqseq3MkK3aQLJvpV3qoS5Zq+wj2n/R8pC3uYQwv8bo9Yy3fndRJIHRyOZElwnn7QWGzMfmJi2uwIR9HLbyxaC2da6XV/pB66H20QIhxarnZxzMoft+JGSh/ZufiPUUOsLNfjE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=kylinos.cn; spf=pass smtp.mailfrom=kylinos.cn; arc=none smtp.client-ip=124.126.103.232 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=kylinos.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=kylinos.cn X-UUID: ef51ed6a00aa11f1b0f03b4cfa9209d1-20260203 X-CTIC-Tags: HR_CC_COUNT, HR_CC_DOMAIN_COUNT, HR_CC_NAME, HR_CC_NO_NAME, HR_CTE_8B HR_CTT_MISS, HR_DATE_H, HR_DATE_WKD, HR_DATE_ZONE, HR_FROM_NAME HR_SJ_DIGIT_LEN, HR_SJ_LANG, HR_SJ_LEN, HR_SJ_LETTER, HR_SJ_NOR_SYM HR_SJ_PHRASE, HR_SJ_PHRASE_LEN, HR_SJ_WS, HR_TO_COUNT, HR_TO_DOMAIN_COUNT HR_TO_NO_NAME, IP_TRUSTED, SRC_TRUSTED, DN_TRUSTED, SA_TRUSTED SA_EXISTED, SN_TRUSTED, SN_EXISTED, SPF_NOPASS, DKIM_NOPASS DMARC_NOPASS, CIE_GOOD, CIE_GOOD_SPF, GTI_FG_BS, GTI_RG_INFO GTI_C_BU, AMN_GOOD, ABX_MISS_RDNS X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.6,REQID:7edc41bc-94ef-4ebd-b746-4170f1b74fc5,IP:15,U RL:0,TC:0,Content:23,EDM:0,RT:0,SF:-5,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:33 X-CID-INFO: VERSION:1.3.6,REQID:7edc41bc-94ef-4ebd-b746-4170f1b74fc5,IP:15,URL :0,TC:0,Content:23,EDM:0,RT:0,SF:-5,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:33 X-CID-META: VersionHash:a9d874c,CLOUDID:10ddb7e2c320f27c0bac737540981091,BulkI D:260203104921KJJUSU4V,BulkQuantity:0,Recheck:0,SF:17|19|38|66|78|81|82|10 2|127|850|898,TC:nil,Content:4|15|50,EDM:-3,IP:-2,URL:0,File:nil,RT:nil,Bu lk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR: 0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_FAS,TF_CID_SPAM_FSD X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: ef51ed6a00aa11f1b0f03b4cfa9209d1-20260203 X-User: tianyaxiong@kylinos.cn Received: from localhost.localdomain [(116.128.244.171)] by mailgw.kylinos.cn (envelope-from ) (Generic MTA) with ESMTP id 261149706; Tue, 03 Feb 2026 10:49:18 +0800 From: Yaxiong Tian To: rafael@kernel.org, ricardo.neri-calderon@linux.intel.com, srinivas.pandruvada@linux.intel.com, viresh.kumar@linaro.org Cc: lenb@kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Yaxiong Tian Subject: [PATCH v2] cpufreq: intel_pstate: Enable asym capacity only when cpu smt is not possible Date: Tue, 3 Feb 2026 10:48:52 +0800 Message-Id: <20260203024852.301066-1-tianyaxiong@kylinos.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260128031521.389765-1-tianyaxiong@kylinos.cn> References: <20260128031521.389765-1-tianyaxiong@kylinos.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" According to the description in the intel_pstate.rst documentation, Capacity-Aware Scheduling and Energy-Aware Scheduling are only supported on a hybrid processor without SMT. Previously, the system used sched_smt_active() for judgment, which is not a strict condition because users can switch it on or off via /sys at any time. This could lead to incorrect driver settings in certain scenarios. For example, on a CPU that supports SMT, a user can disable SMT via the nosmt parameter to enable asym capacity, and then re-enable SMT via /sys. In such cases, some settings in the driver would no longer be correct. To address this issue, replace sched_smt_active() with cpu_smt_possible(), and only enable asym capacity when cpu smt is not possible. Fixes: 929ebc93ccaa ("cpufreq: intel_pstate: Set asymmetric CPU capacity on= hybrid systems") Signed-off-by: Yaxiong Tian --- drivers/cpufreq/intel_pstate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c index ec4abe374573..1625ec2d0d06 100644 --- a/drivers/cpufreq/intel_pstate.c +++ b/drivers/cpufreq/intel_pstate.c @@ -1161,7 +1161,7 @@ static void hybrid_init_cpu_capacity_scaling(bool ref= resh) * the capacity of SMT threads is not deterministic even approximately, * do not do that when SMT is in use. */ - if (hwp_is_hybrid && !sched_smt_active() && arch_enable_hybrid_capacity_s= cale()) { + if (hwp_is_hybrid && !cpu_smt_possible() && arch_enable_hybrid_capacity_s= cale()) { hybrid_refresh_cpu_capacity_scaling(); /* * Disabling ITMT causes sched domains to be rebuilt to disable asym --=20 2.25.1