From nobody Sun Feb 8 09:22:41 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 842C93C199C; Tue, 3 Feb 2026 16:21:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770135700; cv=none; b=une+pAgbmKHz86k7QvcSSTYe28mHV6y0I6hmZxe2zGIscwgrCQNPbpvag7rw/TaPziy6G5OhdvFwWk3X3/Jr1ChdCIilA10Oo0Jj4B3lxL6VXbXfNmcRZk6g7wrr/q1syFJAofJMramW9ZeuzPbUjlOLxeGszw4eEFAuV47yOOU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770135700; c=relaxed/simple; bh=FXR1urZyHxRMQhEV+YAE1Dupsb+CKUg3wI8EMI1En5g=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=TExD0YPARNZRg+J9cUhzFYS7tC9v/4GHDK93Nm0IFmGVLAyylT0L/1ezvlRNZ0AblPBpnIdhfzqgbP8HpByaT+v2HQv6EOIbPR2nJoH4l2hgwrLuxKjIa6o2GadBJaweA1RYuUt+/jP7jOnaqIXAiZXbX+dBXm/5kIibdV2aLAs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=IhJaT0Ou; arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="IhJaT0Ou" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id 0AC36C24383; Tue, 3 Feb 2026 16:21:42 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id BE8CC60728; Tue, 3 Feb 2026 16:21:36 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id EDB15119A8888; Tue, 3 Feb 2026 17:21:32 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1770135695; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=Iv2/16VnKv0xj7dzCIsq/6ykvwxz9Vm1Oxs1q8ZKaVA=; b=IhJaT0Ou/kPgEgJQh5skMhWgrBzndqcfICme9vUHZfia6yIm3tp6/EDpLEYNlMh4eoJaB1 +5drPdkwQT+eUDHXCS6R05Nz4zvUu+GZAPQpEGG3ivAKv/eSmbMSspsScE+MYjrqdtadAB 8RpcIglgtj9Ls+5+Slm46o7CoxwpaGbjwa3BtiT3FMeJgsa7Muty/Xa3M21tXiSeYB+xaX ETmMNTkDig4Mx1Yq7Va9LABP76/OeVuYhthcHpBQvwqUr63b1JeiBxcUwLFX6LPgAoWScE tVlti3rn0Q8Ihcxwhj901ddDkWJFPgTC/v2JHo9zxW/MD4NVN5dOUHcWERYC5g== From: "Thomas Perrot (Schneider Electric)" Date: Tue, 03 Feb 2026 17:21:10 +0100 Subject: [PATCH v3 1/5] dt-bindings: vendor-prefixes: Add AAEON vendor prefix Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260203-dev-b4-aaeon-mcu-driver-v3-1-0a19432076ac@bootlin.com> References: <20260203-dev-b4-aaeon-mcu-driver-v3-0-0a19432076ac@bootlin.com> In-Reply-To: <20260203-dev-b4-aaeon-mcu-driver-v3-0-0a19432076ac@bootlin.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Bartosz Golaszewski , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , =?utf-8?q?J=C3=A9r=C3=A9mie_Dautheribes?= , Wim Van Sebroeck , Guenter Roeck , Lee Jones Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, Thomas Petazzoni , "Thomas Perrot (Schneider Electric)" , Krzysztof Kozlowski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=972; i=thomas.perrot@bootlin.com; h=from:subject:message-id; bh=FXR1urZyHxRMQhEV+YAE1Dupsb+CKUg3wI8EMI1En5g=; b=owEB7QES/pANAwAKAZ/ACwVx/grtAcsmYgBpgiCHHJdMGQyfnwVKTPYFRXLxHw0FYtCoHkC2W uj9FJzILRCJAbMEAAEKAB0WIQSHQHfGpqMKIwOoEiGfwAsFcf4K7QUCaYIghwAKCRCfwAsFcf4K 7WvJC/9SpUNhoDdX7+9IAoTUB/v+MkNNL5RbRfufer1AeRcJ5JWN159wm3yunjcDD1XzO2ogmDE 8vwMKJ3nJOEuXYo70lspF9dT6azJ/a+P3cySfcc37Q2LTAIf3Vi471TXXt8x80UtFDr6GhSqDZG p4gfDXuv7+Ab/RMpBC8bw4ENMl6UPLy7st0WiSAJmIeUjCuDOpfGFTSPQ4aSADIH6I9VlQVqNom QSCkggI9xPez4xclj6m08AyYvDobRP6fpKia9qScRGuSpnGlhQP6+z9qt2OQb4SuHYdLhYcp0mx Iz3WR/WVriZS0Abmlq7FgxPJlt8eJSvZ/P+aKFzxvUSwTtTNeru0aDMeEoKW9drMKwAsOYTVIfg fSEMkz7qa0BIlxM1KPrURwtlq/MJEZdmMIUclF9Q5e/0tTS5HH5sLTxS5ECBmTGV8bfWIEUs5Eu 0ofRm9KHlhsAvTLvbDuzKPCy89NatJI11YlgT0zg6vE+VlbPN18BjnX3nEFgmHnA05gK4= X-Developer-Key: i=thomas.perrot@bootlin.com; a=openpgp; fpr=874077C6A6A30A2303A812219FC00B0571FE0AED X-Last-TLS-Session-Version: TLSv1.3 Add the AAEON vendor prefix to support the AAEON SRG-IMX8P MCU driver devicetree bindings. Acked-by: Krzysztof Kozlowski Signed-off-by: Thomas Perrot (Schneider Electric) --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Docum= entation/devicetree/bindings/vendor-prefixes.yaml index c7591b2aec2a74560a4f687fe7a2070ca21b0752..0f84ee93b3a8473719ee92f8c04= 6e350c4a20825 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -32,6 +32,8 @@ patternProperties: description: 8devices, UAB "^9tripod,.*": description: Shenzhen 9Tripod Innovation and Development CO., LTD. + "^aaeon,.*": + description: AAEON "^abb,.*": description: ABB "^abilis,.*": --=20 2.52.0 From nobody Sun Feb 8 09:22:41 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 047343C1992 for ; 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bh=Vx0inxEGPD8evkjWNjlTSWCY3thhzOffsgPlVfuEcmY=; b=dX9kiVdq+aWLvUkx8fsE/7T41jWA6qO4t/sAbyz/1IlZrLeLIMMrgGiWCoTLSdr1wLYwiC HRIBT+6PQ+2RZY7kB3irZ9mWpkK0iuOkfXvNc/hmoXHfC8RE5bJdfer467GOMDl3tPqeol C/iMU4/ieqU7bfukipsZdTiN1BsnifsbZt+/8uRkIsOExlQM6RNwchG1SFcKMAZBBTqDtR rdyOsvj9N5Mxi2dSk3pIBzrTBftO1Wt+l02hGSrRAUaVfNnkB54Uo50V5Df9tE4kjYqyHt EnU9Kw6xJxtvLNKI63fq/g+x7qEH0YpmSV6L/+4vSYAl6kwjRYNQ6CNZYtB8BQ== From: "Thomas Perrot (Schneider Electric)" Date: Tue, 03 Feb 2026 17:21:11 +0100 Subject: [PATCH v3 2/5] dt-bindings: mfd: Add AAEON embedded controller Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260203-dev-b4-aaeon-mcu-driver-v3-2-0a19432076ac@bootlin.com> References: <20260203-dev-b4-aaeon-mcu-driver-v3-0-0a19432076ac@bootlin.com> In-Reply-To: <20260203-dev-b4-aaeon-mcu-driver-v3-0-0a19432076ac@bootlin.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Bartosz Golaszewski , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , =?utf-8?q?J=C3=A9r=C3=A9mie_Dautheribes?= , Wim Van Sebroeck , Guenter Roeck , Lee Jones Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, Thomas Petazzoni , "Thomas Perrot (Schneider Electric)" X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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This microcontroller is found on AAEON embedded boards, it is connected via I2C and and provides a GPIO control and watchdog timer. Signed-off-by: Thomas Perrot (Schneider Electric) Reviewed-by: Conor Dooley --- .../bindings/mfd/aaeon,srg-imx8p-mcu.yaml | 67 ++++++++++++++++++= ++++ MAINTAINERS | 6 ++ 2 files changed, 73 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/aaeon,srg-imx8p-mcu.yaml= b/Documentation/devicetree/bindings/mfd/aaeon,srg-imx8p-mcu.yaml new file mode 100644 index 0000000000000000000000000000000000000000..9d109fb0d53cb2a859f5a908a35= 611394eb87807 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/aaeon,srg-imx8p-mcu.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/aaeon,srg-imx8p-mcu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: AAEON Embedded Controller + +maintainers: + - J=C3=A9r=C3=A9mie Dautheribes + - Thomas Perrot + +description: + AAEON embeds a microcontroller on Standard RISC Gateway with ARM i.MX8M = Plus + Quad-Core boards providing GPIO control and watchdog timer. + + This MCU is connected via I2C bus. + + Its GPIO controller provides 7 GPOs and 12 GPIOs. + + Its watchdog has a fixed maximum hardware heartbeat of 25 seconds and su= pports + a timeout of 240 seconds through automatic pinging. + The timeout is not programmable and cannot be changed via device tree pr= operties. + +properties: + compatible: + const: aaeon,srg-imx8p-mcu + + reg: + maxItems: 1 + + gpio-controller: true + + "#gpio-cells": + const: 2 + + gpio-line-names: + minItems: 1 + maxItems: 19 + +required: + - compatible + - reg + - gpio-controller + - "#gpio-cells" + +additionalProperties: false + +examples: + - | + i2c { + #address-cells =3D <1>; + #size-cells =3D <0>; + + aaeon_mcu: embedded-controller@62 { + compatible =3D "aaeon,srg-imx8p-mcu"; + reg =3D <0x62>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-line-names =3D "gpo-1", "gpo-2", "gpo-3", "gpo-4", + "gpo-5", "gpo-6", "gpo-7", + "gpio-1", "gpio-2", "gpio-3", "gpio-4", + "gpio-5", "gpio-6", "gpio-7", "gpio-8", + "gpio-9", "gpio-10", "gpio-11", "gpio-12"; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index c9e416ba74c64e90629c0b7d7941f879c9ac589e..ea9d55f76f3509c7f6ba6d1bc86= ca2e2e71aa954 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -186,6 +186,12 @@ W: http://www.adaptec.com/ F: Documentation/scsi/aacraid.rst F: drivers/scsi/aacraid/ =20 +AAEON SRG-IMX8P CONTROLLER MFD DRIVER +M: Thomas Perrot +R: J=C3=A9r=C3=A9mie Dautheribes +S: Maintained +F: Documentation/devicetree/bindings/mfd/aaeon,srg-imx8p-mcu.yaml + AAEON UPBOARD FPGA MFD DRIVER M: Thomas Richard S: Maintained --=20 2.52.0 From nobody Sun Feb 8 09:22:41 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 472693C199C; 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bh=9pGgY1AXtB3+/bquNYu0YC11KDwnMcvuAwORygeqiBw=; b=uxO9zjj8jMKiToMR0RtzEMAGbfLVKejGFCB745ACtXJcDUoIHsk5rsTgizaWP87oBCvKkg P7dB0pswzHJ1W5QBmgQPDysnNGa/zr0Uf91W+/InwpufEqKWLHnoOi9smMLeF1n49Qrv2M tBbNZ+r1ZyUGTEm9qoZ1SNxBYzVulPIZYUyhR9rLoAj/RLC5+oCEFTg2fjHjUjvmvrVtqc aTzq89taMREwrore8krM0fCxXg9Nl2km7Y+IFMCLAXDSmbQ+FfpqDexJOiMU8b/tcNi2h+ Nrrh9YRGzveHIsSjk4dGbKcXTI4iwTWlnhO4fUoeTY0GTZMqYU6l//D2cNIIkA== From: "Thomas Perrot (Schneider Electric)" Date: Tue, 03 Feb 2026 17:21:12 +0100 Subject: [PATCH v3 3/5] mfd: aaeon: Add SRG-IMX8P MCU driver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260203-dev-b4-aaeon-mcu-driver-v3-3-0a19432076ac@bootlin.com> References: <20260203-dev-b4-aaeon-mcu-driver-v3-0-0a19432076ac@bootlin.com> In-Reply-To: <20260203-dev-b4-aaeon-mcu-driver-v3-0-0a19432076ac@bootlin.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Bartosz Golaszewski , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , =?utf-8?q?J=C3=A9r=C3=A9mie_Dautheribes?= , Wim Van Sebroeck , Guenter Roeck , Lee Jones Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, Thomas Petazzoni , "Thomas Perrot (Schneider Electric)" X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=7217; i=thomas.perrot@bootlin.com; h=from:subject:message-id; bh=YLJOuvpWZfrp0dIHbGdNR9H/BLU+eWxUoMWIYPVsD8Q=; b=owEB7QES/pANAwAKAZ/ACwVx/grtAcsmYgBpgiCH8PeiC/MuCitGeJjLtt0ymvN894AU9vs8y A+qsAhZcZGJAbMEAAEKAB0WIQSHQHfGpqMKIwOoEiGfwAsFcf4K7QUCaYIghwAKCRCfwAsFcf4K 7TdvC/9+XhVjfUkrB3MnoV8QRMPJXFjr7K+MU8oii9i0gy572WMLuruf1xU9jyuA/OPF812etmJ 6WX3F6rWn3kubgfgvSVKVbVLlkake/j6+2xcFAH9w6JLBTwrLd4i3HeQboUdjjfE13BIc7d0IpF GDZtwq0/cZ1WZgX3fV/FWhj2AmWCaCtYAryWFhk7oIOIhLBpntJmGpDK5Ud6GNvmcTNvYD0PyRU vp2PxVMoxld96s87bnW44Mw4LyC+9iHwWRZh22HFoRwgdVgMg6VK7alxKMCm/6T5YtYGb74FoC/ dRmUSHCZr1h6WbJxR6qUDZE3Dkvu63zfQw8iZ4GXvJ8A/iEkEdQ1a4H/WPo5GN/wlF4ipUGQoyv YqNVzm7OFo0jU4S5IBxcT+gzOX6PK3KapMyAl9FrMpcooWTrTZRAMBvZKlQxDQDy+E+edJjR4yU Si+NIpKq7KxePTfy0EHUix77TPpyWhdWR3G8E9b281VImfSEqHAnucv9QiRKsyReAFU90= X-Developer-Key: i=thomas.perrot@bootlin.com; a=openpgp; fpr=874077C6A6A30A2303A812219FC00B0571FE0AED X-Last-TLS-Session-Version: TLSv1.3 Add Multi-Function Device (MFD) driver for the Aaeon SRG-IMX8P embedded controller. This driver provides the core I2C communication interface and registers child devices (GPIO and watchdog controllers). The MCU firmware version is queried during probe and logged for diagnostic purposes. All I2C transactions are serialized using a mutex to ensure proper communication with the microcontroller. Co-developed-by: J=C3=A9r=C3=A9mie Dautheribes (Schneider Electric) Signed-off-by: J=C3=A9r=C3=A9mie Dautheribes (Schneider Electric) Signed-off-by: Thomas Perrot (Schneider Electric) --- MAINTAINERS | 2 + drivers/mfd/Kconfig | 10 +++ drivers/mfd/Makefile | 2 + drivers/mfd/aaeon-mcu.c | 137 ++++++++++++++++++++++++++++++++++++++= ++++ include/linux/mfd/aaeon-mcu.h | 20 ++++++ 5 files changed, 171 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index ea9d55f76f3509c7f6ba6d1bc86ca2e2e71aa954..f91b6a1826d04bef8a0f88221f6= c8e8a3652cd77 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -191,6 +191,8 @@ M: Thomas Perrot R: J=C3=A9r=C3=A9mie Dautheribes S: Maintained F: Documentation/devicetree/bindings/mfd/aaeon,srg-imx8p-mcu.yaml +F: drivers/mfd/aaeon-mcu.c +F: include/linux/mfd/aaeon-mcu.h =20 AAEON UPBOARD FPGA MFD DRIVER M: Thomas Richard diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index aace5766b38aa5e46e32a8a7b42eea238159fbcf..7a1ceedece899faad7a03a1fe7b= 1c91b72253c05 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1574,6 +1574,16 @@ config AB8500_CORE the irq_chip parts for handling the Mixed Signal chip events. This chip embeds various other multimedia functionalities as well. =20 +config MFD_AAEON_MCU + tristate "Aaeon SRG-IMX8P MCU Driver" + depends on I2C || COMPILE_TEST + select MFD_CORE + help + Select this option to enable support for the Aaeon SRG-IMX8P + onboard microcontroller (MCU). This driver provides the core + functionality to communicate with the MCU over I2C. The MCU + provides GPIO and watchdog functionality. + config MFD_DB8500_PRCMU bool "ST-Ericsson DB8500 Power Reset Control Management Unit" depends on UX500_SOC_DB8500 diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index e75e8045c28afae975ac61d282b3b85af5440119..0bc3a10c787c55730131224fc10= 53fe35657dd71 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -304,3 +304,5 @@ obj-$(CONFIG_MFD_RSMU_SPI) +=3D rsmu_spi.o rsmu_core.o obj-$(CONFIG_MFD_UPBOARD_FPGA) +=3D upboard-fpga.o =20 obj-$(CONFIG_MFD_LOONGSON_SE) +=3D loongson-se.o + +obj-$(CONFIG_MFD_AAEON_MCU) +=3D aaeon-mcu.o diff --git a/drivers/mfd/aaeon-mcu.c b/drivers/mfd/aaeon-mcu.c new file mode 100644 index 0000000000000000000000000000000000000000..4f2420668106453549ab42888bb= fd50363bdfc45 --- /dev/null +++ b/drivers/mfd/aaeon-mcu.c @@ -0,0 +1,137 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Aaeon MCU driver + * + * Copyright (C) 2025 Bootlin + * Author: J=C3=A9r=C3=A9mie Dautheribes + * Author: Thomas Perrot + */ + +#include +#include +#include +#include +#include +#include +#include + +#define AAEON_MCU_FW_VERSION 0x76 + +/** + * struct aaeon_mcu_dev - Internal representation of the Aaeon MCU + * @dev: Pointer to kernel device structure + * @i2c_lock: Mutex to serialize I2C bus access + */ +struct aaeon_mcu_dev { + struct device *dev; + struct mutex i2c_lock; +}; + +static const struct mfd_cell aaeon_mcu_devs[] =3D { + { + .name =3D "aaeon-mcu-wdt", + }, + { + .name =3D "aaeon-mcu-gpio", + }, +}; + +static int aaeon_mcu_read_version(struct device *dev, u8 index, u8 *versio= n) +{ + u8 cmd[3] =3D { AAEON_MCU_FW_VERSION, index, 0x00 }; + + return aaeon_mcu_i2c_xfer(dev, cmd, sizeof(cmd), version, sizeof(*version= )); +} + +static int aaeon_mcu_print_fw_version(struct i2c_client *client) +{ + struct device *dev =3D &client->dev; + u8 major, minor; + int ret; + + ret =3D aaeon_mcu_read_version(dev, 0x00, &major); + if (ret) + return ret; + + ret =3D aaeon_mcu_read_version(dev, 0x01, &minor); + if (ret) + return ret; + + dev_dbg(dev, "firmware version: v%d.%d\n", major, minor); + + return 0; +} + +int aaeon_mcu_i2c_xfer(struct device *dev, + const u8 *cmd, int cmd_len, + u8 *rsp, int rsp_len) +{ + struct i2c_client *client =3D to_i2c_client(dev); + struct aaeon_mcu_dev *mcu =3D i2c_get_clientdata(client); + int ret; + + guard(mutex)(&mcu->i2c_lock); + + ret =3D i2c_master_send(client, cmd, cmd_len); + if (ret < 0) + return ret; + + ret =3D i2c_master_recv(client, rsp, rsp_len); + if (ret < 0) + return ret; + + if (ret !=3D rsp_len) { + dev_err(dev, + "i2c recv count error (expected: %d, actual: %d)\n", + rsp_len, ret); + return -EIO; + } + + return 0; +} +EXPORT_SYMBOL_GPL(aaeon_mcu_i2c_xfer); + +static int aaeon_mcu_probe(struct i2c_client *client) +{ + struct aaeon_mcu_dev *mcu; + int ret; + + mcu =3D devm_kzalloc(&client->dev, sizeof(*mcu), GFP_KERNEL); + if (!mcu) + return -ENOMEM; + + i2c_set_clientdata(client, mcu); + mcu->dev =3D &client->dev; + + ret =3D devm_mutex_init(&client->dev, &mcu->i2c_lock); + if (ret) + return ret; + + ret =3D aaeon_mcu_print_fw_version(client); + if (ret) { + dev_err(&client->dev, "unable to read firmware version\n"); + return ret; + } + + return devm_mfd_add_devices(mcu->dev, PLATFORM_DEVID_NONE, aaeon_mcu_devs, + ARRAY_SIZE(aaeon_mcu_devs), NULL, 0, NULL); +} + +static const struct of_device_id aaeon_mcu_of_match[] =3D { + { .compatible =3D "aaeon,srg-imx8p-mcu" }, + {}, +}; +MODULE_DEVICE_TABLE(of, aaeon_mcu_of_match); + +static struct i2c_driver aaeon_mcu_driver =3D { + .driver =3D { + .name =3D "aaeon_mcu", + .of_match_table =3D aaeon_mcu_of_match, + }, + .probe =3D aaeon_mcu_probe, +}; +module_i2c_driver(aaeon_mcu_driver); + +MODULE_DESCRIPTION("Aaeon MCU Driver"); +MODULE_AUTHOR("J=C3=A9r=C3=A9mie Dautheribes "); +MODULE_LICENSE("GPL"); diff --git a/include/linux/mfd/aaeon-mcu.h b/include/linux/mfd/aaeon-mcu.h new file mode 100644 index 0000000000000000000000000000000000000000..2e9f5f316f33b70c732faa85057= 6cee596455dab --- /dev/null +++ b/include/linux/mfd/aaeon-mcu.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Aaeon MCU driver definitions + * + * Copyright (C) 2025 Bootlin + * Author: J=C3=A9r=C3=A9mie Dautheribes + * Author: Thomas Perrot + */ + +#ifndef __LINUX_MFD_AAEON_MCU_H +#define __LINUX_MFD_AAEON_MCU_H + +#include +#include + +int aaeon_mcu_i2c_xfer(struct device *dev, + const u8 *cmd, int cmd_len, + u8 *rsp, int rsp_len); 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a=openpgp-sha256; l=9440; i=thomas.perrot@bootlin.com; h=from:subject:message-id; bh=SiMnw2mChknIx0Hna8OHcYpG2LGU/o0PpwHa60XJYT0=; b=owEB7QES/pANAwAKAZ/ACwVx/grtAcsmYgBpgiCH/5XtJP0EKoKRysRBGKAEea2liL1+hKlf2 6joq7Oq/0mJAbMEAAEKAB0WIQSHQHfGpqMKIwOoEiGfwAsFcf4K7QUCaYIghwAKCRCfwAsFcf4K 7QPNC/9N8wwm7rcHepiXHoPNRRx3FDU/epkqdgKBt+KdkMw7FqfOnSY4BZf4TjsAL123yJJls51 Pl0/3PKGNO4hEVnewdcRnlFmW/ziEBoS9ej5yxQ8dHVBMhj4N9HWDJS/A/vTct314Lc0RDLzvvv tRUeNS9GJwHcbUBDaFtpVCx/sk/vo6PGyOX3Gc3010f8yzv5Kuvq7c/R9hxufyopEStVPWJNY2F vSZUwOTelKP+ri+g81OVoK3vZT84E7QJ9lFHcx9mHNn7Ms9SM/Uh8gxkrTo7XrzKYKYDTqPKOVT xli1RxfGSNEWfeiXeXUXf5NAuIMiLzrEIs9DIb5xxAG59oSDC+mHFiSkDjrzeWfF8hHL3oGg9iW OguppXbSQt5jXLrHJUi7elpsLNiclE/P6rg1nROswjFQMvVE34GZD6skOE0gFSlELLP+2XwNyoy +akNTEvWfyL9F44bbZCeuCjIbCtWBvdAwbDVhwMJdpQHEwbuVzAJ+uQ3/TF1R7yM8ICw0= X-Developer-Key: i=thomas.perrot@bootlin.com; a=openpgp; fpr=874077C6A6A30A2303A812219FC00B0571FE0AED X-Last-TLS-Session-Version: TLSv1.3 Add GPIO driver for the Aaeon SRG-IMX8P embedded controller. This driver supports 7 GPO (General Purpose Output) pins and 12 GPIO pins that can be configured as inputs or outputs. The driver implements proper state management for GPO pins (which are output-only) and full direction control for GPIO pins. During probe, all pins are reset to a known state (GPOs low, GPIOs as inputs) to prevent undefined behavior across system reboots, as the MCU does not reset GPIO states on soft reboot. Co-developed-by: J=C3=A9r=C3=A9mie Dautheribes (Schneider Electric) Signed-off-by: J=C3=A9r=C3=A9mie Dautheribes (Schneider Electric) Signed-off-by: Thomas Perrot (Schneider Electric) Acked-by: Bartosz Golaszewski Reviewed-by: Linus Walleij --- MAINTAINERS | 1 + drivers/gpio/Kconfig | 10 ++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-aaeon-mcu.c | 237 ++++++++++++++++++++++++++++++++++++++= ++++ 4 files changed, 249 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index f91b6a1826d04bef8a0f88221f6c8e8a3652cd77..2538f8c4bc1482b139e18243a68= f0a21b9be3704 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -191,6 +191,7 @@ M: Thomas Perrot R: J=C3=A9r=C3=A9mie Dautheribes S: Maintained F: Documentation/devicetree/bindings/mfd/aaeon,srg-imx8p-mcu.yaml +F: drivers/gpio/gpio-aaeon-mcu.c F: drivers/mfd/aaeon-mcu.c F: include/linux/mfd/aaeon-mcu.h =20 diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index c74da29253e810b51540684b1186e8f274066b69..5500feb5e22772c0f73aac3adc8= 1e93759c29417 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -157,6 +157,16 @@ config GPIO_74XX_MMIO 8 bits: 74244 (Input), 74273 (Output) 16 bits: 741624 (Input), 7416374 (Output) =20 +config GPIO_AAEON_MCU + tristate "Aaeon MCU GPIO support" + depends on MFD_AAEON_MCU || COMPILE_TEST + select GPIO_GENERIC + help + Select this option to enable GPIO support for the Aaeon SRG-IMX8P + onboard MCU. This driver provides access to GPIO pins and GPO + (General Purpose Output) pins controlled by the microcontroller. + The driver handles both input and output configuration. + config GPIO_ALTERA tristate "Altera GPIO" select GPIOLIB_IRQCHIP diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 2421a8fd3733e0b06c2581262aaa9cd629f66c7d..1ba6318bc558743fbe5910966c2= c8fc3f792efe9 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -29,6 +29,7 @@ obj-$(CONFIG_GPIO_104_IDI_48) +=3D gpio-104-idi-48.o obj-$(CONFIG_GPIO_104_IDIO_16) +=3D gpio-104-idio-16.o obj-$(CONFIG_GPIO_74X164) +=3D gpio-74x164.o obj-$(CONFIG_GPIO_74XX_MMIO) +=3D gpio-74xx-mmio.o +obj-$(CONFIG_GPIO_AAEON_MCU) +=3D gpio-aaeon-mcu.o obj-$(CONFIG_GPIO_ADNP) +=3D gpio-adnp.o obj-$(CONFIG_GPIO_ADP5520) +=3D gpio-adp5520.o obj-$(CONFIG_GPIO_ADP5585) +=3D gpio-adp5585.o diff --git a/drivers/gpio/gpio-aaeon-mcu.c b/drivers/gpio/gpio-aaeon-mcu.c new file mode 100644 index 0000000000000000000000000000000000000000..6bbcb073c331b2c004f1b5af835= cc03f8ed79575 --- /dev/null +++ b/drivers/gpio/gpio-aaeon-mcu.c @@ -0,0 +1,237 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Aaeon MCU GPIO driver + * + * Copyright (C) 2025 Bootlin + * Author: J=C3=A9r=C3=A9mie Dautheribes + * Author: Thomas Perrot + */ + +#include +#include +#include +#include +#include +#include +#include + +#define AAEON_MCU_CONFIG_GPIO_INPUT 0x69 +#define AAEON_MCU_CONFIG_GPIO_OUTPUT 0x6F +#define AAEON_MCU_READ_GPIO 0x72 +#define AAEON_MCU_WRITE_GPIO 0x77 + +#define AAEON_MCU_CONTROL_GPO 0x6C + +#define MAX_GPIOS 12 +#define MAX_GPOS 7 + +struct aaeon_mcu_gpio { + struct gpio_chip gc; + struct device *dev; + DECLARE_BITMAP(dir_in, MAX_GPOS + MAX_GPIOS); + DECLARE_BITMAP(gpo_state, MAX_GPOS); +}; + +static int aaeon_mcu_gpio_config_input_cmd(struct aaeon_mcu_gpio *data, + unsigned int offset) +{ + u8 cmd[3], rsp; + + cmd[0] =3D AAEON_MCU_CONFIG_GPIO_INPUT; + cmd[1] =3D offset - 7; + cmd[2] =3D 0x00; + + return aaeon_mcu_i2c_xfer(data->dev, cmd, 3, &rsp, 1); +} + +static int aaeon_mcu_gpio_direction_input(struct gpio_chip *gc, unsigned i= nt offset) +{ + struct aaeon_mcu_gpio *data =3D gpiochip_get_data(gc); + int ret; + + if (offset < MAX_GPOS) { + dev_err(gc->parent, "GPIO offset (%d) must be an output GPO\n", offset); + return -EOPNOTSUPP; + } + + ret =3D aaeon_mcu_gpio_config_input_cmd(data, offset); + if (ret < 0) + return ret; + + __set_bit(offset, data->dir_in); + + return 0; +} + +static int aaeon_mcu_gpio_config_output_cmd(struct aaeon_mcu_gpio *data, + unsigned int offset, + int value) +{ + u8 cmd[3], rsp; + int ret; + + cmd[0] =3D AAEON_MCU_CONFIG_GPIO_OUTPUT; + cmd[1] =3D offset - 7; + cmd[2] =3D 0x00; + + ret =3D aaeon_mcu_i2c_xfer(data->dev, cmd, 3, &rsp, 1); + if (ret < 0) + return ret; + + cmd[0] =3D AAEON_MCU_WRITE_GPIO; + /* cmd[1] =3D offset - 7; */ + cmd[2] =3D !!value; + + return aaeon_mcu_i2c_xfer(data->dev, cmd, 3, &rsp, 1); +} + +static int aaeon_mcu_gpio_direction_output(struct gpio_chip *gc, unsigned = int offset, int value) +{ + struct aaeon_mcu_gpio *data =3D gpiochip_get_data(gc); + int ret; + + if (offset < MAX_GPOS) + return 0; + + ret =3D aaeon_mcu_gpio_config_output_cmd(data, offset, value); + if (ret < 0) + return ret; + + __clear_bit(offset, data->dir_in); + + return 0; +} + +static int aaeon_mcu_gpio_get_direction(struct gpio_chip *gc, unsigned int= offset) +{ + struct aaeon_mcu_gpio *data =3D gpiochip_get_data(gc); + + return test_bit(offset, data->dir_in) ? + GPIO_LINE_DIRECTION_IN : GPIO_LINE_DIRECTION_OUT; +} + +static int aaeon_mcu_gpio_get(struct gpio_chip *gc, unsigned int offset) +{ + struct aaeon_mcu_gpio *data =3D gpiochip_get_data(gc); + u8 cmd[3], rsp; + int ret; + + if (offset < MAX_GPOS) + return test_bit(offset, data->gpo_state); + + cmd[0] =3D AAEON_MCU_READ_GPIO; + cmd[1] =3D offset - 7; + cmd[2] =3D 0x00; + + ret =3D aaeon_mcu_i2c_xfer(data->dev, cmd, 3, &rsp, 1); + if (ret < 0) + return ret; + + return rsp; +} + +static int aaeon_mcu_gpo_set_cmd(struct aaeon_mcu_gpio *data, unsigned int= offset, int value) +{ + u8 cmd[3], rsp; + + cmd[0] =3D AAEON_MCU_CONTROL_GPO; + cmd[1] =3D offset + 1; + cmd[2] =3D !!value; + + return aaeon_mcu_i2c_xfer(data->dev, cmd, 3, &rsp, 1); +} + +static int aaeon_mcu_gpio_set_cmd(struct aaeon_mcu_gpio *data, unsigned in= t offset, int value) +{ + u8 cmd[3], rsp; + + cmd[0] =3D AAEON_MCU_WRITE_GPIO; + cmd[1] =3D offset - 7; + cmd[2] =3D !!value; + + return aaeon_mcu_i2c_xfer(data->dev, cmd, 3, &rsp, 1); +} + +static int aaeon_mcu_gpio_set(struct gpio_chip *gc, unsigned int offset, + int value) +{ + struct aaeon_mcu_gpio *data =3D gpiochip_get_data(gc); + + if (offset >=3D MAX_GPOS) + return aaeon_mcu_gpio_set_cmd(data, offset, value); + + if (aaeon_mcu_gpo_set_cmd(data, offset, value) =3D=3D 0) + __assign_bit(offset, data->gpo_state, value); + + return 0; +} + +static const struct gpio_chip aaeon_mcu_chip =3D { + .label =3D "gpio-aaeon-mcu", + .owner =3D THIS_MODULE, + .get_direction =3D aaeon_mcu_gpio_get_direction, + .direction_input =3D aaeon_mcu_gpio_direction_input, + .direction_output =3D aaeon_mcu_gpio_direction_output, + .get =3D aaeon_mcu_gpio_get, + .set =3D aaeon_mcu_gpio_set, + .base =3D -1, + .ngpio =3D MAX_GPOS + MAX_GPIOS, + .can_sleep =3D true, +}; + +static void aaeon_mcu_gpio_reset(struct aaeon_mcu_gpio *data, struct devic= e *dev) +{ + unsigned int i; + int ret; + + /* Reset all GPOs */ + for (i =3D 0; i < MAX_GPOS; i++) { + ret =3D aaeon_mcu_gpo_set_cmd(data, i, 0); + if (ret < 0) + dev_warn(dev, "Failed to reset GPO %u state: %d\n", i, ret); + __clear_bit(i, data->dir_in); + } + + /* Reset all GPIOs */ + for (i =3D MAX_GPOS; i < MAX_GPOS + MAX_GPIOS; i++) { + ret =3D aaeon_mcu_gpio_config_input_cmd(data, i); + if (ret < 0) + dev_warn(dev, "Failed to reset GPIO %u state: %d\n", i, ret); + __set_bit(i, data->dir_in); + } +} + +static int aaeon_mcu_gpio_probe(struct platform_device *pdev) +{ + struct aaeon_mcu_gpio *data; + + data =3D devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->dev =3D pdev->dev.parent; + data->gc =3D aaeon_mcu_chip; + data->gc.parent =3D data->dev; + + /* + * Reset all GPIO states to a known configuration. The MCU does not + * reset GPIO state on soft reboot, only on power cycle (hard reboot). + * Without this reset, GPIOs would retain their previous state across + * reboots, which could lead to unexpected behavior. + */ + aaeon_mcu_gpio_reset(data, &pdev->dev); + + return devm_gpiochip_add_data(&pdev->dev, &data->gc, data); +} + +static struct platform_driver aaeon_mcu_gpio_driver =3D { + .driver =3D { + .name =3D "aaeon-mcu-gpio", + }, + .probe =3D aaeon_mcu_gpio_probe, +}; +module_platform_driver(aaeon_mcu_gpio_driver); + +MODULE_DESCRIPTION("GPIO interface for Aaeon MCU"); +MODULE_AUTHOR("J=C3=A9r=C3=A9mie Dautheribes "); +MODULE_LICENSE("GPL"); --=20 2.52.0 From nobody Sun Feb 8 09:22:41 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BDC9A3D301F for ; Tue, 3 Feb 2026 16:21:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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b=hWE/18HK32EXiAxGNUZN1QLOMNQbELMO7HfZzjH6R4k/Qkq1K8+E6T44hrW4wGlMN6n//B Uc6hYKo+Xsj5/fSQbVFJ7DH22TF71Gc5SOmEn0zL+wDhy8/PYxsyXoKchF+UKPN0lAYmDo BtNSYAMQ9+0EcmdG6gWe/gcrcsQIIiM2GHWGcGwCndb+lyCxMflEADf8PizyHgrTjnqVet nJgZIalQYl5yDRxmPkEetXS6FgxAH6f902iSWkI/wz3rI8A9LEK5jiMeKsUMcim798k9dr kl4SSKoRp+QL3a/M11Gp0u0ub/9Mc/tkLRskkB3aABdI7GtM7XfFVaNhy1mczQ== From: "Thomas Perrot (Schneider Electric)" Date: Tue, 03 Feb 2026 17:21:14 +0100 Subject: [PATCH v3 5/5] watchdog: aaeon: Add watchdog driver for SRG-IMX8P MCU Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260203-dev-b4-aaeon-mcu-driver-v3-5-0a19432076ac@bootlin.com> References: <20260203-dev-b4-aaeon-mcu-driver-v3-0-0a19432076ac@bootlin.com> In-Reply-To: <20260203-dev-b4-aaeon-mcu-driver-v3-0-0a19432076ac@bootlin.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Bartosz Golaszewski , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , =?utf-8?q?J=C3=A9r=C3=A9mie_Dautheribes?= , Wim Van Sebroeck , Guenter Roeck , Lee Jones Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, Thomas Petazzoni , "Thomas Perrot (Schneider Electric)" X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=6831; i=thomas.perrot@bootlin.com; h=from:subject:message-id; bh=ciUXskn8R5Lt6f2W1d0o1EPgKNRay/wwlX1/saFLydw=; b=owEB7QES/pANAwAKAZ/ACwVx/grtAcsmYgBpgiCHvD1AXxjRnqgAt6a87ClpUKqMt5CMlkcZF YQeD6pWal6JAbMEAAEKAB0WIQSHQHfGpqMKIwOoEiGfwAsFcf4K7QUCaYIghwAKCRCfwAsFcf4K 7dRyC/0akOqDxszsPA3jXLLNIaGm3NJK8g0sTE4ntYC7mBAdbOh8QrzkXhpe+lZlHo+Gwuj6ZUW oVbv3+1yfacUMoGDbIdgTN5r39xhS2zS8OgE4GwhBqRYZEf4YEvtlIU12mEVV2k5j1zcL8nU0yW Tgg6b6+9DbtCJGB855wrZD0NRcUoXWgF8wByK8DP3N9G0D8Rlm6FFzpmYg40mtlSocgd9e0X87g MmfEqogUJk3w7j0pfXnGDLq830VtEOVlt0VelAkb5XAkhKTgUNpCvSuyw5aTXa2AV3rIfyahw/s Xi+Jw0aEjyFMmuKL8HTcjUtjTjzp73o2oQrHoUKod03848ZSXt49853Wy4Ex6Q/qsO8jplpv97f peh9XBVY+MF31pIfFNtCcX6HRD52DOqAadrh6vcsEGqLmHjeEBNXBpOksdg4Cu2/VaYJ0NZrCqx KFY3VyWMrEO3Afd/ehEL4t8j5sFurF+0lP8fV1dogG2OdBe/cg1M+yD19yKyHPLdAsWB8= X-Developer-Key: i=thomas.perrot@bootlin.com; a=openpgp; fpr=874077C6A6A30A2303A812219FC00B0571FE0AED X-Last-TLS-Session-Version: TLSv1.3 Add watchdog driver for the Aaeon SRG-IMX8P embedded controller. This driver provides system monitoring and recovery capabilities through the MCU's watchdog timer. The watchdog supports start, stop, and ping operations with a maximum hardware heartbeat of 25 seconds and a default timeout of 240 seconds. The driver assumes the watchdog is already running at probe time, as the MCU typically enables it by default. Co-developed-by: J=C3=A9r=C3=A9mie Dautheribes (Schneider Electric) Signed-off-by: J=C3=A9r=C3=A9mie Dautheribes (Schneider Electric) Signed-off-by: Thomas Perrot (Schneider Electric) --- MAINTAINERS | 1 + drivers/watchdog/Kconfig | 10 +++ drivers/watchdog/Makefile | 1 + drivers/watchdog/aaeon_mcu_wdt.c | 136 +++++++++++++++++++++++++++++++++++= ++++ 4 files changed, 148 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 2538f8c4bc1482b139e18243a68f0a21b9be3704..7b92af42c9fdc17a69a4e7a2fe5= 0f9e199c8b144 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -193,6 +193,7 @@ S: Maintained F: Documentation/devicetree/bindings/mfd/aaeon,srg-imx8p-mcu.yaml F: drivers/gpio/gpio-aaeon-mcu.c F: drivers/mfd/aaeon-mcu.c +F: drivers/watchdog/aaeon_mcu_wdt.c F: include/linux/mfd/aaeon-mcu.h =20 AAEON UPBOARD FPGA MFD DRIVER diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index d3b9df7d466b0b7215ee87b3040811d44ee53d2a..0835df4c902f059c0d61a6e8d88= 4742dd7d2f741 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -168,6 +168,16 @@ config SOFT_WATCHDOG_PRETIMEOUT watchdog. Be aware that governors might affect the watchdog because it is purely software, e.g. the panic governor will stall it! =20 +config AAEON_MCU_WATCHDOG + tristate "Aaeon MCU Watchdog" + depends on MFD_AAEON_MCU || COMPILE_TEST + select WATCHDOG_CORE + help + Select this option to enable watchdog timer support for the Aaeon + SRG-IMX8P onboard microcontroller (MCU). This driver provides + watchdog functionality through the MCU, allowing system monitoring + and automatic recovery from system hangs. + config BD957XMUF_WATCHDOG tristate "ROHM BD9576MUF and BD9573MUF PMIC Watchdog" depends on MFD_ROHM_BD957XMUF diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index ba52099b125398a32f80dad23317e223cc4af028..2deec425d3eafb6b208e061fda9= f216f4baa8ecc 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -37,6 +37,7 @@ obj-$(CONFIG_USBPCWATCHDOG) +=3D pcwd_usb.o # ALPHA Architecture =20 # ARM Architecture +obj-$(CONFIG_AAEON_MCU_WATCHDOG) +=3D aaeon_mcu_wdt.o obj-$(CONFIG_ARM_SP805_WATCHDOG) +=3D sp805_wdt.o obj-$(CONFIG_ARM_SBSA_WATCHDOG) +=3D sbsa_gwdt.o obj-$(CONFIG_ARMADA_37XX_WATCHDOG) +=3D armada_37xx_wdt.o diff --git a/drivers/watchdog/aaeon_mcu_wdt.c b/drivers/watchdog/aaeon_mcu_= wdt.c new file mode 100644 index 0000000000000000000000000000000000000000..416f3035c3226c3889682102d1d= 2453a9365b5ba --- /dev/null +++ b/drivers/watchdog/aaeon_mcu_wdt.c @@ -0,0 +1,136 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Aaeon MCU Watchdog driver + * + * Copyright (C) 2025 Bootlin + * Author: J=C3=A9r=C3=A9mie Dautheribes + * Author: Thomas Perrot + */ + +#include +#include +#include +#include + +#define AAEON_MCU_CONTROL_WDT 0x63 +#define AAEON_MCU_PING_WDT 0x73 + +#define AAEON_MCU_WDT_TIMEOUT 240 +#define AAEON_MCU_WDT_HEARTBEAT_MS 25000 + +struct aaeon_mcu_wdt { + struct watchdog_device wdt; + struct device *dev; +}; + +static int aaeon_mcu_wdt_cmd(struct device *dev, u8 opcode, u8 arg) +{ + u8 cmd[3] =3D { opcode, arg, 0x00 }; + u8 rsp; + + return aaeon_mcu_i2c_xfer(dev, cmd, sizeof(cmd), &rsp, sizeof(rsp)); +} + +static int aaeon_mcu_wdt_start(struct watchdog_device *wdt) +{ + struct aaeon_mcu_wdt *data =3D watchdog_get_drvdata(wdt); + + return aaeon_mcu_wdt_cmd(data->dev, AAEON_MCU_CONTROL_WDT, 0x01); +} + +static int aaeon_mcu_wdt_status(struct watchdog_device *wdt, bool *enabled) +{ + struct aaeon_mcu_wdt *data =3D watchdog_get_drvdata(wdt); + u8 cmd[3], rsp; + int ret; + + cmd[0] =3D AAEON_MCU_CONTROL_WDT; + cmd[1] =3D 0x02; + cmd[2] =3D 0x00; + + ret =3D aaeon_mcu_i2c_xfer(data->dev, cmd, sizeof(cmd), &rsp, sizeof(rsp)= ); + if (ret) + return ret; + + *enabled =3D rsp =3D=3D 0x01; + return 0; +} + +static int aaeon_mcu_wdt_stop(struct watchdog_device *wdt) +{ + struct aaeon_mcu_wdt *data =3D watchdog_get_drvdata(wdt); + + return aaeon_mcu_wdt_cmd(data->dev, AAEON_MCU_CONTROL_WDT, 0x00); +} + +static int aaeon_mcu_wdt_ping(struct watchdog_device *wdt) +{ + struct aaeon_mcu_wdt *data =3D watchdog_get_drvdata(wdt); + + return aaeon_mcu_wdt_cmd(data->dev, AAEON_MCU_PING_WDT, 0x00); +} + +static const struct watchdog_info aaeon_mcu_wdt_info =3D { + .identity =3D "Aaeon MCU Watchdog", + .options =3D WDIOF_KEEPALIVEPING +}; + +static const struct watchdog_ops aaeon_mcu_wdt_ops =3D { + .owner =3D THIS_MODULE, + .start =3D aaeon_mcu_wdt_start, + .stop =3D aaeon_mcu_wdt_stop, + .ping =3D aaeon_mcu_wdt_ping, +}; + +static int aaeon_mcu_wdt_probe(struct platform_device *pdev) +{ + struct device *dev =3D &pdev->dev; + struct watchdog_device *wdt; + struct aaeon_mcu_wdt *data; + bool enabled; + int ret; + + data =3D devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->dev =3D dev->parent; + + wdt =3D &data->wdt; + wdt->parent =3D dev; + wdt->info =3D &aaeon_mcu_wdt_info; + wdt->ops =3D &aaeon_mcu_wdt_ops; + /* + * The MCU firmware has a fixed hardware timeout of 25 seconds that + * cannot be changed. The watchdog core will handle automatic pinging + * to support longer timeouts. The default timeout of 240 seconds is + * chosen arbitrarily as a reasonable value; users can adjust it via + * the standard watchdog interface if needed. + */ + wdt->timeout =3D AAEON_MCU_WDT_TIMEOUT; + wdt->max_hw_heartbeat_ms =3D AAEON_MCU_WDT_HEARTBEAT_MS; + + watchdog_set_drvdata(wdt, data); + + ret =3D aaeon_mcu_wdt_status(wdt, &enabled); + if (ret) + return ret; + + if (enabled) + set_bit(WDOG_HW_RUNNING, &wdt->status); + + return devm_watchdog_register_device(dev, wdt); +} + +static struct platform_driver aaeon_mcu_wdt_driver =3D { + .driver =3D { + .name =3D "aaeon-mcu-wdt", + }, + .probe =3D aaeon_mcu_wdt_probe, +}; + +module_platform_driver(aaeon_mcu_wdt_driver); + +MODULE_DESCRIPTION("Aaeon MCU Watchdog Driver"); +MODULE_AUTHOR("J=C3=A9r=C3=A9mie Dautheribes "); +MODULE_LICENSE("GPL"); --=20 2.52.0