From nobody Tue Feb 10 01:31:03 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 865DF38BF8A for ; Mon, 2 Feb 2026 18:11:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770055875; cv=none; b=OtWWHFV/r1vkTOFCNypD/4PV20u8/Vvl+Rn9+mY8SA0OBL5OT7QZAhprvthFxF6H3ktISuw0m4er4MdiYZc9JyaAuB09ihdxFndwbbnl6JnadNwisz2/lqKQQNW8EnpF4mprsx8crIoS0kyhNoDKzR4Um7T5ozZsj5Ah+rAiym0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770055875; c=relaxed/simple; bh=DPNtWNLTVP+6P5jhcLAx/PljFfhGLnY7YS6kOhJTTnQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=PNmmnovLEAqnfdM03BdbaEEJ4Vi//EXQg5L6xgPtRrhWhmP+shwWRJhaGQ75E+EBaVEv+6mBTX1w/DFpY/HEOwdimNAuAkd6vTsaKh+YHh3GQFNIDubjMYEOuJ/SHFHJ1Bg3y9vF8V/fqrcHshGaj+hNqUoLhpUsRJJr4yw9AKU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=I4G3lYw6; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=RLyZ0hGg; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="I4G3lYw6"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="RLyZ0hGg" Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 612BAFsD3082678 for ; Mon, 2 Feb 2026 18:11:13 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=+zueoamhT95 ZEtnejExAs2CCJUW74T3ofLGNMnq2YoY=; b=I4G3lYw606NdMT2w8j/+K5Nn37l jfJ3N7EmxCYfdaKgQ082tHm8xoWRH4F4UUl3CYPnUokhA2M3VQnQtpoOe3uoWrZB j2YijPNZhjRU4wYDnwe76JTB9hamHcVhV5BrR5A8ZD0FlXp7iy0GlKC35MMjJ/KR 7H5qoPGMb91hDYl/of1ZgofcaTsKAiejb6XSY3MdBDpOF4qxuJae0wcSDjA+fac1 QtuF29kzXofCSKdOB1j8xr+klDYfu7FVuR5YxZmjo8qIflXCQ4I744m7QdhxqZtn KVhY+rGShoiLV8HtVXLmeQu6u+HcKh69jpZu17nMKgoKFMgyyPsmxJMkt4A== Received: from mail-pf1-f197.google.com (mail-pf1-f197.google.com [209.85.210.197]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4c2ttn1an1-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 02 Feb 2026 18:11:13 +0000 (GMT) Received: by mail-pf1-f197.google.com with SMTP id d2e1a72fcca58-81fdfafe6e9so2055106b3a.2 for ; Mon, 02 Feb 2026 10:11:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1770055873; x=1770660673; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+zueoamhT95ZEtnejExAs2CCJUW74T3ofLGNMnq2YoY=; b=RLyZ0hGgL9aZfbo3dARZEEIV3PC8sAl825BySTL5kYp0T+wVg4G9LJqW3+ZavycbaR efXeY4pMYY+/wLqy+eErk4LnQU4VzlzVKhMnRBV45vdR4Emv5vE3x0h4L6MYtLwD8WgV olkjE/nDM93cvr5HUPbIjOqjoherKexJIdYA44qyaw6+5jd5tdGFkOxtbnnWasd+1h0U FQ8KyaIHfV1OxsccJzVkDQpLiG151DaFs6CG8bZAKOJqwH2CVuUbh4RX+iS02jy3e20q BSwcURLbvfb5qiBEUGy639scvTQ+0TuetA7l3H+hxLjmrJOGebLs9oYQ2CHYJUGWpiuN 0oGg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1770055873; x=1770660673; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=+zueoamhT95ZEtnejExAs2CCJUW74T3ofLGNMnq2YoY=; b=J5YtR/Oaot4/kQzSgGPoC04aSU4QmHoXhB3WKpRL+NDGkyS6xJ7bLjD+sWR6XsdLmv ixX37J2+PWTEzj0AjP5uOmnzi9bHVYJQS3SVY4642tZnO+nC6VkEYHilrzPJuh/RPFiC TOTr4VZSRfI2m1VEHKa65uQfRhlEurgywYRSu4YwrfXq/AHpN8wG5+cnlDgsieJG8Nlm +Aax5Qayp/pQ//xLc8UPvxYUrxkbNE8xAhXh2aHvhfmFJ+IYiPzGsO/mz4RYR9Hkgm5w IuPAkMgpwwtdJrovP4tkgbEV+iv3tkIPeNvrd2IM7+5lMoAgAwfpVoDoOvFsNiVPR6x1 eEqg== X-Forwarded-Encrypted: i=1; AJvYcCVeeCFE0RUW4+KqWiRh0c9epWTGAON35qngETW6bbCJv8Skq0KGOkQ23zqrTRBzPyLVtYDWgNyxQSTnPPc=@vger.kernel.org X-Gm-Message-State: AOJu0Ywrs2Y6W1ihzve8IBDBAYlvsLZNdbVQRAhF8hVcl+ldzy4ZNg2v 5LJOayTfd/zU1Yw+sCqIaXVSPHhdpkmunM/y1z5DnGxhcC34nRcGP1pdjp8S6jnS/UcmBdfhw6X aSf+n/HDM0b/oPvkrJIT5iCRpk/MkqtXnsWc0sea8YxnUrBCusHqwYC0jRYNI3mGlY00= X-Gm-Gg: AZuq6aJ+JosbZSEw80u4DkEgQg8KLfmreGLCIQUBC4RpPj2vdMTX5jwaVkuZtu+HFvb d1peEXQpZWhL7hoBLc4y/aGThElMMkeiwPANPEDeIcaErnWq+QvIwLON8vtU02nrAZaiAYgm12B m6/ZLh7ipCexoW8OMYwWZJmwYH4WO06TJbmhZBc7C6wD89uD2UPrP04cx8jlJwHmYYLaVCv9Ite cxnDQxOsQznFWYQUsgMM4l2Lk5/NdaHg1yop9VpafoHJN2TcIf15aOXIerk7I4tqtac1Qw9R3Tz H+GcbIWSgCqDFTMmOjQmdDEubKSToWf/H8qJAeN7roghFS6yRt5iS1zP9mWrbrWPtUxM55PPznK Sxaw5jn8qC2tHi9uded3HW+B4UXTdHHuNBmiBC4bT05c= X-Received: by 2002:a05:6a00:a201:b0:823:1491:da10 with SMTP id d2e1a72fcca58-823ab643b92mr11767842b3a.12.1770055872584; Mon, 02 Feb 2026 10:11:12 -0800 (PST) X-Received: by 2002:a05:6a00:a201:b0:823:1491:da10 with SMTP id d2e1a72fcca58-823ab643b92mr11767801b3a.12.1770055871972; Mon, 02 Feb 2026 10:11:11 -0800 (PST) Received: from hu-ptalari-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-82379bfc712sm17476780b3a.40.2026.02.02.10.11.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Feb 2026 10:11:11 -0800 (PST) From: Praveen Talari To: Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mukesh Kumar Savaliya , Viken Dadhaniya , Bjorn Andersson , Konrad Dybcio , Praveen Talari , linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bjorn.andersson@oss.qualcomm.com, dmitry.baryshkov@oss.qualcomm.com, konrad.dybcio@oss.qualcomm.com Cc: prasad.sodagudi@oss.qualcomm.com, quic_vtanuku@quicinc.com, aniket.randive@oss.qualcomm.com, chandana.chiluveru@oss.qualcomm.com, jyothi.seerapu@oss.qualcomm.com Subject: [PATCH v4 13/13] i2c: qcom-geni: Enable I2C on SA8255p Qualcomm platforms Date: Mon, 2 Feb 2026 23:39:22 +0530 Message-Id: <20260202180922.1692428-14-praveen.talari@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260202180922.1692428-1-praveen.talari@oss.qualcomm.com> References: <20260202180922.1692428-1-praveen.talari@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=ANnNY0ku c=1 sm=1 tr=0 ts=6980e8c1 cx=c_pps a=rEQLjTOiSrHUhVqRoksmgQ==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=zgZzUwpPmSg69XYvEVoA:9 a=2VI0MkxyNR6bbpdq8BZq:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjAyMDE0MiBTYWx0ZWRfX+lXRGTFuvaWr pgxi/fI9AT3PBlEmPVXGnXcZABop7b0ulQEDwIcb8dh6JsWV9pAavqrbT7/lKmPGq3mc9XVcdeR 8c1e+pL957FmFUmXgV+WTuGcjWM4fteyCCQ//c88gSij4VkKVSUC4j+cNbfJD3DYOOq88fWzS+L Voc/oeUPoKqiqeYicwIwptDeD/+//3TsqGXwbm37lvtOpWMu1VPYDq0YZbDnnQWbIiArzCLQKy+ CfSwKnUpwrvJiCVy+jS4EgHVUehyy2aqY05A0j5ZD5A9ZAKF+uAgPuePxxjBfv6C+dlWRB7mUbI DNEkUB6Bt6pNr0dQ6XI9zCAlxuIWlp515w4FjRF+WYWRapePmtPY6P/ZXBhgb3cqZ9v/OYu+LpA P+pr89vnS/DHfecTFmkpafkyr253TMr+JFtZe0LkYue4vRhnVu2htT6oMnli+KRx3yJEXt9i3y+ xvqyGmuZrxUwWvfKCVA== X-Proofpoint-GUID: WoKuVphfsRm6vRjVGQk7f9-o_dDo42GH X-Proofpoint-ORIG-GUID: WoKuVphfsRm6vRjVGQk7f9-o_dDo42GH X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-02_05,2026-02-02_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 malwarescore=0 lowpriorityscore=0 clxscore=1015 bulkscore=0 spamscore=0 priorityscore=1501 impostorscore=0 phishscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602020142 Content-Type: text/plain; charset="utf-8" The Qualcomm automotive SA8255p SoC relies on firmware to configure platform resources, including clocks, interconnects and TLMM. The driver requests resources operations over SCMI using power and performance protocols. The SCMI power protocol enables or disables resources like clocks, interconnect paths, and TLMM (GPIOs) using runtime PM framework APIs, such as resume/suspend, to control power on/off. The SCMI performance protocol manages I2C frequency, with each frequency rate represented by a performance level. The driver uses geni_se_set_perf_opp() API to request the desired frequency rate.. As part of geni_se_set_perf_opp(), the OPP for the requested frequency is obtained using dev_pm_opp_find_freq_floor() and the performance level is set using dev_pm_opp_set_opp(). Acked-by: Viken Dadhaniya Signed-off-by: Praveen Talari --- v3->v4: - Added Acked-by tag. V1->v2: From kernel test robot: - Initialized ret to "0" in resume/suspend callbacks. Bjorn: - Used seperate APIs for the resouces enable/disable. --- drivers/i2c/busses/i2c-qcom-geni.c | 56 ++++++++++++++++++++++-------- 1 file changed, 42 insertions(+), 14 deletions(-) diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qc= om-geni.c index 8fd62d659c2a..2ad31e412b96 100644 --- a/drivers/i2c/busses/i2c-qcom-geni.c +++ b/drivers/i2c/busses/i2c-qcom-geni.c @@ -81,6 +81,10 @@ struct geni_i2c_desc { bool has_core_clk; bool no_dma_support; unsigned int tx_fifo_depth; + int (*resources_init)(struct geni_se *se); + int (*set_rate)(struct geni_se *se, unsigned long freq); + int (*power_on)(struct geni_se *se); + int (*power_off)(struct geni_se *se); }; =20 #define QCOM_I2C_MIN_NUM_OF_MSGS_MULTI_DESC 2 @@ -203,8 +207,9 @@ static int geni_i2c_clk_map_idx(struct geni_i2c_dev *gi= 2c) return -EINVAL; } =20 -static void qcom_geni_i2c_conf(struct geni_i2c_dev *gi2c) +static int qcom_geni_i2c_conf(struct geni_se *se, unsigned long freq) { + struct geni_i2c_dev *gi2c =3D dev_get_drvdata(se->dev); const struct geni_i2c_clk_fld *itr =3D gi2c->clk_fld; u32 val; =20 @@ -217,6 +222,7 @@ static void qcom_geni_i2c_conf(struct geni_i2c_dev *gi2= c) val |=3D itr->t_low_cnt << LOW_COUNTER_SHFT; val |=3D itr->t_cycle_cnt; writel_relaxed(val, gi2c->se.base + SE_I2C_SCL_COUNTERS); + return 0; } =20 static void geni_i2c_err_misc(struct geni_i2c_dev *gi2c) @@ -908,7 +914,9 @@ static int geni_i2c_xfer(struct i2c_adapter *adap, return ret; } =20 - qcom_geni_i2c_conf(gi2c); + ret =3D gi2c->dev_data->set_rate(&gi2c->se, gi2c->clk_freq_out); + if (ret) + return ret; =20 if (gi2c->gpi_mode) ret =3D geni_i2c_gpi_xfer(gi2c, msgs, num); @@ -1043,8 +1051,9 @@ static int geni_i2c_init(struct geni_i2c_dev *gi2c) return ret; } =20 -static int geni_i2c_resources_init(struct geni_i2c_dev *gi2c) +static int geni_i2c_resources_init(struct geni_se *se) { + struct geni_i2c_dev *gi2c =3D dev_get_drvdata(se->dev); int ret; =20 ret =3D geni_se_resources_init(&gi2c->se); @@ -1097,7 +1106,7 @@ static int geni_i2c_probe(struct platform_device *pde= v) spin_lock_init(&gi2c->lock); platform_set_drvdata(pdev, gi2c); =20 - ret =3D geni_i2c_resources_init(gi2c); + ret =3D gi2c->dev_data->resources_init(&gi2c->se); if (ret) return ret; =20 @@ -1156,15 +1165,17 @@ static void geni_i2c_shutdown(struct platform_devic= e *pdev) =20 static int __maybe_unused geni_i2c_runtime_suspend(struct device *dev) { - int ret; + int ret =3D 0; struct geni_i2c_dev *gi2c =3D dev_get_drvdata(dev); =20 disable_irq(gi2c->irq); =20 - ret =3D geni_se_resources_deactivate(&gi2c->se); - if (ret) { - enable_irq(gi2c->irq); - return ret; + if (gi2c->dev_data->power_off) { + ret =3D gi2c->dev_data->power_off(&gi2c->se); + if (ret) { + enable_irq(gi2c->irq); + return ret; + } } =20 gi2c->suspended =3D 1; @@ -1173,12 +1184,14 @@ static int __maybe_unused geni_i2c_runtime_suspend(= struct device *dev) =20 static int __maybe_unused geni_i2c_runtime_resume(struct device *dev) { - int ret; + int ret =3D 0; struct geni_i2c_dev *gi2c =3D dev_get_drvdata(dev); =20 - ret =3D geni_se_resources_activate(&gi2c->se); - if (ret) - return ret; + if (gi2c->dev_data->power_on) { + ret =3D gi2c->dev_data->power_on(&gi2c->se); + if (ret) + return ret; + } =20 enable_irq(gi2c->irq); gi2c->suspended =3D 0; @@ -1215,17 +1228,32 @@ static const struct dev_pm_ops geni_i2c_pm_ops =3D { NULL) }; =20 -static const struct geni_i2c_desc geni_i2c =3D {}; +static const struct geni_i2c_desc geni_i2c =3D { + .resources_init =3D geni_i2c_resources_init, + .set_rate =3D qcom_geni_i2c_conf, + .power_on =3D geni_se_resources_activate, + .power_off =3D geni_se_resources_deactivate, +}; =20 static const struct geni_i2c_desc i2c_master_hub =3D { .has_core_clk =3D true, .no_dma_support =3D true, .tx_fifo_depth =3D 16, + .resources_init =3D geni_i2c_resources_init, + .set_rate =3D qcom_geni_i2c_conf, + .power_on =3D geni_se_resources_activate, + .power_off =3D geni_se_resources_deactivate, +}; + +static const struct geni_i2c_desc sa8255p_geni_i2c =3D { + .resources_init =3D geni_se_domain_attach, + .set_rate =3D geni_se_set_perf_opp, }; =20 static const struct of_device_id geni_i2c_dt_match[] =3D { { .compatible =3D "qcom,geni-i2c", .data =3D &geni_i2c }, { .compatible =3D "qcom,geni-i2c-master-hub", .data =3D &i2c_master_hub }, + { .compatible =3D "qcom,sa8255p-geni-i2c", .data =3D &sa8255p_geni_i2c }, {} }; MODULE_DEVICE_TABLE(of, geni_i2c_dt_match); --=20 2.34.1