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For that node, driver must enable the corresponding clock(s) before accessing the registers. Add the 'clocks' property so the driver can obtain and enable the required clock(s). Only interconnects that have clock=E2=80=91gated QoS register interface use this property; it is not applicable to all interconnect nodes. Signed-off-by: Odelu Kukatla --- .../interconnect/qcom,qcs615-rpmh.yaml | 44 +++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/Documentation/devicetree/bindings/interconnect/qcom,qcs615-rpm= h.yaml b/Documentation/devicetree/bindings/interconnect/qcom,qcs615-rpmh.ya= ml index e06404828824..096a9064cc01 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,qcs615-rpmh.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,qcs615-rpmh.yaml @@ -34,6 +34,10 @@ properties: reg: maxItems: 1 =20 + clocks: + minItems: 3 + maxItems: 3 + required: - compatible =20 @@ -53,6 +57,36 @@ allOf: required: - reg =20 + - if: + properties: + compatible: + contains: + enum: + - qcom,qcs615-aggre1-noc + then: + properties: + clocks: + items: + - description: aggre UFS PHY AXI clock + - description: aggre USB2 SEC AXI clock + - description: aggre USB3 PRIM AXI clock + + - if: + properties: + compatible: + contains: + enum: + - qcom,qcs615-camnoc-virt + - qcom,qcs615-config-noc + - qcom,qcs615-dc-noc + - qcom,qcs615-gem-noc + - qcom,qcs615-mc-virt + - qcom,qcs615-mmss-noc + - qcom,qcs615-system-noc + then: + properties: + clocks: false + unevaluatedProperties: false =20 examples: @@ -69,3 +103,13 @@ examples: #interconnect-cells =3D <2>; qcom,bcm-voters =3D <&apps_bcm_voter>; }; + + aggre1_noc: interconnect@1700000 { + compatible =3D "qcom,qcs615-aggre1-noc"; + reg =3D <0x1700000 0x3f200>; + #interconnect-cells =3D <2>; + qcom,bcm-voters =3D <&apps_bcm_voter>; + clocks =3D <&gcc_aggre_ufs_phy_axi_clk>, + <&gcc_aggre_usb2_sec_axi_clk>, + <&gcc_aggre_usb3_prim_axi_clk>; + }; --=20 2.43.0