From nobody Mon Feb 9 19:06:47 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 146DB378D95; Mon, 2 Feb 2026 14:57:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770044279; cv=none; b=P1UctWrzrc5nKPFxq/aicglquClAAXCm/uctaEJXV2gHgu/RqmTAwXIdSzgZt3zGrs1PvtFNWVyrp4DYcZ2EPIsvgGQo8JkWu29zFR7bpaRu4oGCzs6qCLLzvjzrVx9ZYVH3+JQmIjgLLgqBWiTVMAeC4niq9OB1BLTpOhhzmFE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770044279; c=relaxed/simple; bh=h3KwcvIZf+fAF7t4Fbqh9aQytTahrxTAYp6WAROtuQs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=skCklJTfYxpFgYW0hQw/COYRr1TOEGMZsOmkBuDRYrB/qhXKIDX+vJpNcFJYXsY2t+JGMI6FkGcXF6EULhLG/uMJmtgVKR96QqBUvrEORr+uO43VeQdlx+59nAB/heOpsinnUOfvXl4hnU9SJ5sM8pQh/9qVE9vM+0+rQvDC//Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=i1/nOYD0; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="i1/nOYD0" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A751FC19422; Mon, 2 Feb 2026 14:57:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1770044278; bh=h3KwcvIZf+fAF7t4Fbqh9aQytTahrxTAYp6WAROtuQs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=i1/nOYD0UtpyxMQgM6kXwYrvRZQV/I/q+5c3CGLwJx4fnKg1Rr6omHa0Oi2kC6Lyq Akfudf8k5F7Twg7wDM9OFlu7T0ayWKcc7891duXmNxjG/MQI2Z4DDbcIi9g+i4G7u4 6ypdCmMIEVbWu+5RBHSjWKRv03zk8oOyq15QnPcqdqdJxqmEZ464UyFACv2rEfmraD UI7kY+qrX65fONtoWaFr5rnAcAacK6eO1gmCBi3NBjndjF7V6dBSRGqFsmGBkNR7qA eM01NuYfdXkJ22Ja5Ew2bMNU8AnYtFd8BBSM1IbhHZ0+AE3KELsdhyS1y/M6/jTw/U GS3GlG9mKbJMQ== From: Konrad Dybcio Date: Mon, 02 Feb 2026 15:57:33 +0100 Subject: [PATCH RFC 1/8] dt-bindings: Move qcom,sm8750-tcsr from clock/tcsr to mfd/tcsr Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260202-topic-8750_tcsr-v1-1-cd7e6648c64f@oss.qualcomm.com> References: <20260202-topic-8750_tcsr-v1-0-cd7e6648c64f@oss.qualcomm.com> In-Reply-To: <20260202-topic-8750_tcsr-v1-0-cd7e6648c64f@oss.qualcomm.com> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Taniya Das , Linus Walleij , Melody Olvera , Konrad Dybcio , Taniya Das , Raviteja Laggyshetty , Jishnu Prakash Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Mukesh Ojha , Konrad Dybcio X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1770044267; l=2158; i=konrad.dybcio@oss.qualcomm.com; s=20230215; h=from:subject:message-id; bh=6UGWxjygTyV7CtJDaBjoqaAeJVbZk3fw7xKoKC2F9+c=; b=etIMkAFeNnzu8gMWFFUm7IyTEGCWfmXsKi/yPoI4PRHRe+wVj99wkx+F4zDHr1cCsv0tBRndP uorxezcsFZWBh8fhiXbW+OESAAye/Hnomvf8VSYqasvt36HSlDW95aL X-Developer-Key: i=konrad.dybcio@oss.qualcomm.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio The TCSR block is described in two places: clock/qcom,sm8550-tcsr.yaml and mfd/qcom,tcsr.yaml. The former refers to the version of the block containing various gate clocks, downstream from the main system refclk. The latter refers to a version lacking that, instead only providing various general tunables. The clock gates on SM8750 specifically (unlike a generation preceding and following it) do NOT live in TCSR, but in the TLMM (pinmux/cfg IP) register space instead. Move it to the mfd/tcsr binding to represent that. Signed-off-by: Konrad Dybcio --- Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml | 2 -- Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml | 1 + 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml = b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml index 784fef830681..8da8f44fc8a5 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml @@ -18,7 +18,6 @@ description: | - include/dt-bindings/clock/qcom,glymur-tcsr.h - include/dt-bindings/clock/qcom,sm8550-tcsr.h - include/dt-bindings/clock/qcom,sm8650-tcsr.h - - include/dt-bindings/clock/qcom,sm8750-tcsr.h =20 properties: compatible: @@ -30,7 +29,6 @@ properties: - qcom,sar2130p-tcsr - qcom,sm8550-tcsr - qcom,sm8650-tcsr - - qcom,sm8750-tcsr - qcom,x1e80100-tcsr - const: syscon =20 diff --git a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml b/Documen= tation/devicetree/bindings/mfd/qcom,tcsr.yaml index 14ae3f00ef7e..1a1fa2b79476 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml @@ -39,6 +39,7 @@ properties: - qcom,sm8250-tcsr - qcom,sm8350-tcsr - qcom,sm8450-tcsr + - qcom,sm8750-tcsr - qcom,tcsr-apq8064 - qcom,tcsr-apq8084 - qcom,tcsr-ipq5018 --=20 2.52.0