From nobody Mon Feb 9 13:01:31 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 754C5325700 for ; Sun, 1 Feb 2026 10:02:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769940131; cv=none; b=DmZkakTGtlk5xSYurj8pPSYL2WkxOYh6znnxK9pzhRQBGDZY5wkZMBWwFDFv2HoWbwIQU1z5D4S8vgo84Xr2fdzLd0x6Mj6mWv0u4MbkSbEHLBacjXiVdey54bz/VYbjxJZYAXyVS3f5ldDUJegEFzNUAc2ODlReGQmioYqx6Bc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769940131; c=relaxed/simple; bh=BsqaeXT2hKoVqXVBpt/mpdSPNs1OQfQWAPoVkcW5YgY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=dYa23d4hEkPsQGKx6aC7uBxqycSxwt4DgJ5IIGIATY+yje9lOu8J1zai/FExCCnZxvLDD8uYd5ZKXFvB7Pq24+ihFk2LUOJP6uYTabQMYk3XyaPAqAgtu6MEcspfcv7EPy2NKuXiuGWTb8FImgZTRAtGVMeSIux1LvcKBZ5Vx8c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=YPh79S5L; arc=none smtp.client-ip=198.175.65.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="YPh79S5L" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1769940130; x=1801476130; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=BsqaeXT2hKoVqXVBpt/mpdSPNs1OQfQWAPoVkcW5YgY=; b=YPh79S5L0F+XHy6Q+8RuvgCyME8wEW0XwhopWbP7hpcli1/31t3ItU0S gkRD/lHFUEYvi14wixtg4cWb0mR0xaEOrZqjN2k9bk5vXcPbzhryEAmq3 sbRhK27osY9AAy2pxSHqR7BuVi8Iwds0lA/KIi3jV89fkxf1hxT/W/2wA zqBxzP1BuQREPbHhUCToRIuUq3OGTlSSS0vLmdw10ZZWyfdU2pgxt1+O2 WtQU2HLjIm8v3tVkUvcxh48uWrOuKC0hTnA3uHaOSGrrm0blsBlHynq3X NmhtDOuak8GZIevNFy2Y1VgbWqEdEBTZ/BaGXuAqOzPOWXjQ4uqmXSfvY Q==; X-CSE-ConnectionGUID: nyhEMPvnQYW1UIPbvQCxXA== X-CSE-MsgGUID: TSSnNsguRKOvSv5rkdy81g== X-IronPort-AV: E=McAfee;i="6800,10657,11688"; a="93780115" X-IronPort-AV: E=Sophos;i="6.21,266,1763452800"; d="scan'208";a="93780115" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Feb 2026 02:02:10 -0800 X-CSE-ConnectionGUID: bfLWGk88TRifw1Yz3ZuvRA== X-CSE-MsgGUID: AZjtMp7uT/y+rAqps2LU+A== X-ExtLoop1: 1 Received: from sannilnx-dsk.jer.intel.com ([10.12.231.107]) by fmviesa003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Feb 2026 02:02:08 -0800 From: Alexander Usyskin To: Greg Kroah-Hartman Cc: Menachem Adin , Alexander Usyskin , linux-kernel@vger.kernel.org, Andy Shevchenko Subject: [char-misc-next 4/7] mei: trace: print return value of pci_cfg_read Date: Sun, 1 Feb 2026 11:43:55 +0200 Message-ID: <20260201094358.1440593-5-alexander.usyskin@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260201094358.1440593-1-alexander.usyskin@intel.com> References: <20260201094358.1440593-1-alexander.usyskin@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Extend debug capabilities. Add return value print in the trace_mei_pci_cfg_read(). Reviewed-by: Andy Shevchenko Signed-off-by: Alexander Usyskin --- drivers/misc/mei/hw-me.c | 15 +++++++++------ drivers/misc/mei/hw-txe.c | 2 +- drivers/misc/mei/mei-trace.h | 10 ++++++---- drivers/misc/mei/pci-me.c | 2 +- 4 files changed, 17 insertions(+), 12 deletions(-) diff --git a/drivers/misc/mei/hw-me.c b/drivers/misc/mei/hw-me.c index c0d4a02d9cae..72a7cfb2989f 100644 --- a/drivers/misc/mei/hw-me.c +++ b/drivers/misc/mei/hw-me.c @@ -1505,10 +1505,11 @@ static bool mei_me_fw_type_nm(const struct pci_dev = *pdev) { u32 reg; unsigned int devfn; + int ret; =20 devfn =3D PCI_DEVFN(PCI_SLOT(pdev->devfn), 0); - pci_bus_read_config_dword(pdev->bus, devfn, PCI_CFG_HFS_2, ®); - trace_mei_pci_cfg_read(&pdev->dev, "PCI_CFG_HFS_2", PCI_CFG_HFS_2, reg); + ret =3D pci_bus_read_config_dword(pdev->bus, devfn, PCI_CFG_HFS_2, ®); + trace_mei_pci_cfg_read(&pdev->dev, "PCI_CFG_HFS_2", PCI_CFG_HFS_2, reg, r= et); /* make sure that bit 9 (NM) is up and bit 10 (DM) is down */ return (reg & 0x600) =3D=3D 0x200; } @@ -1531,10 +1532,11 @@ static bool mei_me_fw_type_sps_4(const struct pci_d= ev *pdev) { u32 reg; unsigned int devfn; + int ret; =20 devfn =3D PCI_DEVFN(PCI_SLOT(pdev->devfn), 0); - pci_bus_read_config_dword(pdev->bus, devfn, PCI_CFG_HFS_1, ®); - trace_mei_pci_cfg_read(&pdev->dev, "PCI_CFG_HFS_1", PCI_CFG_HFS_1, reg); + ret =3D pci_bus_read_config_dword(pdev->bus, devfn, PCI_CFG_HFS_1, ®); + trace_mei_pci_cfg_read(&pdev->dev, "PCI_CFG_HFS_1", PCI_CFG_HFS_1, reg, r= et); return (reg & PCI_CFG_HFS_1_OPMODE_MSK) =3D=3D PCI_CFG_HFS_1_OPMODE_SPS; } =20 @@ -1556,10 +1558,11 @@ static bool mei_me_fw_type_sps_ign(const struct pci= _dev *pdev) u32 reg; u32 fw_type; unsigned int devfn; + int ret; =20 devfn =3D PCI_DEVFN(PCI_SLOT(pdev->devfn), 0); - pci_bus_read_config_dword(pdev->bus, devfn, PCI_CFG_HFS_3, ®); - trace_mei_pci_cfg_read(&pdev->dev, "PCI_CFG_HFS_3", PCI_CFG_HFS_3, reg); + ret =3D pci_bus_read_config_dword(pdev->bus, devfn, PCI_CFG_HFS_3, ®); + trace_mei_pci_cfg_read(&pdev->dev, "PCI_CFG_HFS_3", PCI_CFG_HFS_3, reg, r= et); fw_type =3D (reg & PCI_CFG_HFS_3_FW_SKU_MSK); =20 dev_dbg(&pdev->dev, "fw type is %d\n", fw_type); diff --git a/drivers/misc/mei/hw-txe.c b/drivers/misc/mei/hw-txe.c index e4688c391027..008cb1ede56c 100644 --- a/drivers/misc/mei/hw-txe.c +++ b/drivers/misc/mei/hw-txe.c @@ -651,7 +651,7 @@ static int mei_txe_fw_status(struct mei_device *dev, &fw_status->status[i]); trace_mei_pci_cfg_read(&dev->dev, "PCI_CFG_HSF_X", fw_src->status[i], - fw_status->status[i]); + fw_status->status[i], ret); if (ret) return ret; } diff --git a/drivers/misc/mei/mei-trace.h b/drivers/misc/mei/mei-trace.h index 24fa321d88bd..fa5224e5353a 100644 --- a/drivers/misc/mei/mei-trace.h +++ b/drivers/misc/mei/mei-trace.h @@ -55,22 +55,24 @@ TRACE_EVENT(mei_reg_write, ); =20 TRACE_EVENT(mei_pci_cfg_read, - TP_PROTO(const struct device *dev, const char *reg, u32 offs, u32 val), - TP_ARGS(dev, reg, offs, val), + TP_PROTO(const struct device *dev, const char *reg, u32 offs, u32 val, in= t ret), + TP_ARGS(dev, reg, offs, val, ret), TP_STRUCT__entry( __string(dev, dev_name(dev)) __string(reg, reg) __field(u32, offs) __field(u32, val) + __field(int, ret) ), TP_fast_assign( __assign_str(dev); __assign_str(reg); __entry->offs =3D offs; __entry->val =3D val; + __entry->ret =3D ret; ), - TP_printk("[%s] pci cfg read %s:[%#x] =3D %#x", - __get_str(dev), __get_str(reg), __entry->offs, __entry->val) + TP_printk("[%s] pci cfg read %s:[%#x] =3D %#x, ret =3D %d", + __get_str(dev), __get_str(reg), __entry->offs, __entry->val, __entry->= ret) ); =20 #endif /* _MEI_TRACE_H_ */ diff --git a/drivers/misc/mei/pci-me.c b/drivers/misc/mei/pci-me.c index b4c9526857bb..a75773cc8fb7 100644 --- a/drivers/misc/mei/pci-me.c +++ b/drivers/misc/mei/pci-me.c @@ -152,7 +152,7 @@ static int mei_me_read_fws(const struct mei_device *dev= , int where, const char * int ret; =20 ret =3D pci_read_config_dword(pdev, where, val); - trace_mei_pci_cfg_read(&dev->dev, name, where, *val); + trace_mei_pci_cfg_read(&dev->dev, name, where, *val, ret); return ret; } =20 --=20 2.43.0