From nobody Mon Feb 9 00:00:55 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9102E3246F9 for ; Sun, 1 Feb 2026 10:02:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769940130; cv=none; b=e+1wSdutltO5xDhH4IV95wAokajjlvdtOYHuFhyL4z2gJo7Wphwa6Z8DJFP2jn+hRQw20vRVQn7snQNYtM/f/w9k+8FRTLENvd3eie/jL5DipCz+gBIscQY4VdRQCc4U8RmLKSgPqFWMqL2mpJu3Pxx8zB35AzKYTM6oR5YJKdg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769940130; c=relaxed/simple; bh=gCuIxY1DkWLqdDN3oyUqeOjbl7q+EXBXaWTor4Rl41Q=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=d6MhZuGs8XcCHTDspkomAHKgRtMyggM7rssmBARTwPg4ll46f77Zk1ZzKCbwsqgDGHpBpvdPpqqhAJ4cFyyivC88rt43EFGKwIikfIM3jlnhXRcbYUlfme7OX3lzCs6/KX9zaigW+bc3PU6Rdt3/1EqZRtINexdtLa9dubk1pT4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=R6f3r2/l; arc=none smtp.client-ip=198.175.65.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="R6f3r2/l" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1769940128; x=1801476128; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=gCuIxY1DkWLqdDN3oyUqeOjbl7q+EXBXaWTor4Rl41Q=; b=R6f3r2/lrefeXLby3omb+cp9sehxiGfTB839A4OpuSJEnfWMSND3CMOs GfAHcHsWXDFJELFfhDwik4+3LuGaaUfJbaFhawcuIBiFB7hSdjBloAj5P 4AHaLKDHWAHfWlLJZaK7i3nsV2kAQK5HHp83V9ni7N+9ViPVVbSavEhrp oxWKmsF6ZIZIiRwIWj1EWLlNnNfNGhoMJNnzA/sNQTkgObxOqlauJ31VD i2UC2qV7dV8EucMUQM2vG3o857q4AMwrmccXR9hnRxpyP/LaBZFlb7jh0 8QLXC/GwmtQsZ58dSBbm5kh3ThkHPaLtihORvLhT16vZnhL1lJUtRb0Zk w==; X-CSE-ConnectionGUID: MCpeWL6LQIOPPt3w5mlDHg== X-CSE-MsgGUID: oWolkciORiCo8Wy36rrzng== X-IronPort-AV: E=McAfee;i="6800,10657,11688"; a="93780113" X-IronPort-AV: E=Sophos;i="6.21,266,1763452800"; d="scan'208";a="93780113" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Feb 2026 02:02:08 -0800 X-CSE-ConnectionGUID: rqtx/39wRE2B71G43WLsYQ== X-CSE-MsgGUID: G1584KEQTfeK4+7hmZlJyw== X-ExtLoop1: 1 Received: from sannilnx-dsk.jer.intel.com ([10.12.231.107]) by fmviesa003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Feb 2026 02:02:06 -0800 From: Alexander Usyskin To: Greg Kroah-Hartman Cc: Menachem Adin , Alexander Usyskin , linux-kernel@vger.kernel.org, Mika Westerberg Subject: [char-misc-next 3/7] mei: me: move trace into firmware status read Date: Sun, 1 Feb 2026 11:43:54 +0200 Message-ID: <20260201094358.1440593-4-alexander.usyskin@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260201094358.1440593-1-alexander.usyskin@intel.com> References: <20260201094358.1440593-1-alexander.usyskin@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move register trace near it actual read in the firmware status callback and make it adhere to the actual read type. Reviewed-by: Mika Westerberg Signed-off-by: Alexander Usyskin --- drivers/misc/mei/gsc-me.c | 3 ++- drivers/misc/mei/hw-me.c | 11 +++-------- drivers/misc/mei/hw-me.h | 2 +- drivers/misc/mei/pci-me.c | 8 ++++++-- 4 files changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/misc/mei/gsc-me.c b/drivers/misc/mei/gsc-me.c index 93cba090ea08..73d5beeb9c34 100644 --- a/drivers/misc/mei/gsc-me.c +++ b/drivers/misc/mei/gsc-me.c @@ -23,11 +23,12 @@ =20 #define MEI_GSC_RPM_TIMEOUT 500 =20 -static int mei_gsc_read_hfs(const struct mei_device *dev, int where, u32 *= val) +static int mei_gsc_read_hfs(const struct mei_device *dev, int where, const= char *name, u32 *val) { struct mei_me_hw *hw =3D to_me_hw(dev); =20 *val =3D ioread32(hw->mem_addr + where + 0xC00); + trace_mei_reg_read(&dev->dev, name, where, *val); =20 return 0; } diff --git a/drivers/misc/mei/hw-me.c b/drivers/misc/mei/hw-me.c index d4612c659784..c0d4a02d9cae 100644 --- a/drivers/misc/mei/hw-me.c +++ b/drivers/misc/mei/hw-me.c @@ -215,11 +215,8 @@ static int mei_me_fw_status(struct mei_device *dev, =20 fw_status->count =3D fw_src->count; for (i =3D 0; i < fw_src->count && i < MEI_FW_STATUS_MAX; i++) { - ret =3D hw->read_fws(dev, fw_src->status[i], + ret =3D hw->read_fws(dev, fw_src->status[i], "PCI_CFG_HFS_X", &fw_status->status[i]); - trace_mei_pci_cfg_read(&dev->dev, "PCI_CFG_HFS_X", - fw_src->status[i], - fw_status->status[i]); if (ret) return ret; } @@ -250,8 +247,7 @@ static int mei_me_hw_config(struct mei_device *dev) hw->hbuf_depth =3D (hcsr & H_CBD) >> 24; =20 reg =3D 0; - hw->read_fws(dev, PCI_CFG_HFS_1, ®); - trace_mei_pci_cfg_read(&dev->dev, "PCI_CFG_HFS_1", PCI_CFG_HFS_1, reg); + hw->read_fws(dev, PCI_CFG_HFS_1, "PCI_CFG_HFS_1", ®); hw->d0i3_supported =3D ((reg & PCI_CFG_HFS_1_D0I3_MSK) =3D=3D PCI_CFG_HFS_1_D0I3_MSK); =20 @@ -446,8 +442,7 @@ static void mei_gsc_pxp_check(struct mei_device *dev) if (!kind_is_gsc(dev) && !kind_is_gscfi(dev)) return; =20 - hw->read_fws(dev, PCI_CFG_HFS_5, &fwsts5); - trace_mei_pci_cfg_read(&dev->dev, "PCI_CFG_HFS_5", PCI_CFG_HFS_5, fwsts5); + hw->read_fws(dev, PCI_CFG_HFS_5, "PCI_CFG_HFS_5", &fwsts5); =20 if ((fwsts5 & GSC_CFG_HFS_5_BOOT_TYPE_MSK) =3D=3D GSC_CFG_HFS_5_BOOT_TYPE= _PXP) { if (dev->gsc_reset_to_pxp =3D=3D MEI_DEV_RESET_TO_PXP_DEFAULT) diff --git a/drivers/misc/mei/hw-me.h b/drivers/misc/mei/hw-me.h index 843ec2497b52..9df5899d2602 100644 --- a/drivers/misc/mei/hw-me.h +++ b/drivers/misc/mei/hw-me.h @@ -56,7 +56,7 @@ struct mei_me_hw { enum mei_pg_state pg_state; bool d0i3_supported; u8 hbuf_depth; - int (*read_fws)(const struct mei_device *dev, int where, u32 *val); + int (*read_fws)(const struct mei_device *dev, int where, const char *name= , u32 *val); /* polling */ struct task_struct *polling_thread; wait_queue_head_t wait_active; diff --git a/drivers/misc/mei/pci-me.c b/drivers/misc/mei/pci-me.c index fe5d5aee074c..b4c9526857bb 100644 --- a/drivers/misc/mei/pci-me.c +++ b/drivers/misc/mei/pci-me.c @@ -23,6 +23,7 @@ #include "client.h" #include "hw-me-regs.h" #include "hw-me.h" +#include "mei-trace.h" =20 /* mei_pci_tbl - PCI Device ID Table */ static const struct pci_device_id mei_me_pci_tbl[] =3D { @@ -145,11 +146,14 @@ static inline void mei_me_set_pm_domain(struct mei_de= vice *dev) {} static inline void mei_me_unset_pm_domain(struct mei_device *dev) {} #endif /* CONFIG_PM */ =20 -static int mei_me_read_fws(const struct mei_device *dev, int where, u32 *v= al) +static int mei_me_read_fws(const struct mei_device *dev, int where, const = char *name, u32 *val) { struct pci_dev *pdev =3D to_pci_dev(dev->parent); + int ret; =20 - return pci_read_config_dword(pdev, where, val); + ret =3D pci_read_config_dword(pdev, where, val); + trace_mei_pci_cfg_read(&dev->dev, name, where, *val); + return ret; } =20 /** --=20 2.43.0