From nobody Sat Feb 7 13:46:02 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2B17630F7EA; Sat, 31 Jan 2026 17:29:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769880578; cv=none; b=brAqbTUsvaNfwNSbU8D+pMsSiXCLcqc5/4u7xQWVXpwdNkDX/1kdPikZrkneOhcdTYQbbBY544jufW57WgM8WTkN3RhcXk0swqaULfPPhpenhfc/+KyiTk1XgApJEHfI2m1B2o2DoKhLH0g5cXx1MpsR6iz80gSjHPe5qANjW5A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769880578; c=relaxed/simple; bh=111sFrCMC2KX1L0YRhT+g514MKW2WAswAFDFNAO9Ogs=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=J4eUfuQQb9dQXwwCtZwrJ8cBdNeKsftN3c5iRXdDDP9Sk3lG46hl1dP2btjW1ubMF5BWvJORZjLgR2KSBdHB8X17ka1Akyx2tjpniCvywXsulCP22igdVFs6SI7FdwcqnB7d1cNp32T54eZpzrTIoSQgxCICoZ6Lt2gpH/F1VIo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=gghjNzsj; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="gghjNzsj" Received: by smtp.kernel.org (Postfix) with ESMTPSA id EFB42C4CEF1; Sat, 31 Jan 2026 17:29:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1769880577; bh=111sFrCMC2KX1L0YRhT+g514MKW2WAswAFDFNAO9Ogs=; h=From:To:Cc:Subject:Date:From; b=gghjNzsjYKgZh/eoZdyiIw3GR+7agi7OsItOZfP3v01hFQBOgL9Ta/aLVPVun/w6t FILuwcaTiEe24IO/L96ls+S8sfu8hPJh1vFby5BbiAJo9C7pd+ABwpH/atwvTCqNNu CMSFVe8by5ONiVzCvaPT4KoIEkohVz9JQwlD+KzwrKBW/jqEUg6wyP0Zh5xSn9ghwc TwnoGTgNLBwkpLKLCBGUZHpag1EhcGakKpXzwu31w/8cOCOZTr8py1/eYg9mUVk70+ pzd40HYKtL0GuqWVP2T9haPorpvKtM8sz81dJbXSauGjPcp9DkSrCDF3pAXy98Obml 8VvVb9Hciw+ZQ== From: Dinh Nguyen To: Eugeniy.Paltsev@synopsys.com, vkoul@kernel.org Cc: dinguyen@kernel.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Khairul Anuar Romli , Rob Herring Subject: [PATCH] dt-bindings: dma: snps,dw-axi-dmac: add dma-coherent property Date: Sat, 31 Jan 2026 11:28:56 -0600 Message-ID: <20260131172856.29227-1-dinguyen@kernel.org> X-Mailer: git-send-email 2.42.0.411.g813d9a9188 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Khairul Anuar Romli The Synopsys DesignWare AXI DMA Controller on Agilex5, the controller operates on a cache-coherent AXI interface, where DMA transactions are automatically kept coherent with the CPU caches. In previous generations SoC (Stratix10 and Agilex) the interconnect was non-coherent, hence there is no need for dma-coherent property to be presence. In Agilex 5, the architecture has changed. It introduced a coherent interconnect that supports cache-coherent DMA. Signed-off-by: Khairul Anuar Romli Reviewed-by: Rob Herring (Arm) Signed-off-by: Dinh Nguyen --- Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml b/= Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml index 216cda21c538..e12a48a12ea4 100644 --- a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml +++ b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml @@ -68,6 +68,8 @@ properties: =20 dma-noncoherent: true =20 + dma-coherent: true + resets: minItems: 1 maxItems: 2 --=20 2.42.0.411.g813d9a9188