From nobody Mon Feb 9 19:04:58 2026 Received: from smtp87.ord1d.emailsrvr.com (smtp87.ord1d.emailsrvr.com [184.106.54.87]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4768F37FF79 for ; Fri, 30 Jan 2026 17:05:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=184.106.54.87 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769792712; cv=none; b=Hp0QOheY8Wp38NIk9OidXKND6wU98D2tZf7vFP2lH6Gy7qvzVUzHeoa159DcaC+0tW1AWfr/ii/0D4QW+vwNIq/+B1bHrQoLUJNc6ipJ2RS0N4Exd/EC8jL/Fbz1J/fAk21wRGWBS68y3aNgN6nviIHQBrotFoLeZAQlZ4Aoyn8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769792712; c=relaxed/simple; bh=YErWSHZK9FACt2U+YMq201b1VDVnCTcwpZjmz3Wxgtw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=KY8me7zIDpPhuQ0j+yYZNYr0zXcO6i14B1QhwPApKr//sPYb2CbztjFLLgWJchN8269o1XmHKYRdonmzT8sMgzx4RXnMuCN2CWnWG6ReTgK8rymeWQqgTQgN4XEJSZrfEHt0s0iZKAzNbUPgZfLvG1E+PCzXUgiFqBd9cLM6j18= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=mev.co.uk; spf=pass smtp.mailfrom=mev.co.uk; dkim=pass (1024-bit key) header.d=mev.co.uk header.i=@mev.co.uk header.b=tU9BqrLZ; arc=none smtp.client-ip=184.106.54.87 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=mev.co.uk Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mev.co.uk Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mev.co.uk header.i=@mev.co.uk header.b="tU9BqrLZ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=mev.co.uk; s=20221208-6x11dpa4; t=1769792710; bh=YErWSHZK9FACt2U+YMq201b1VDVnCTcwpZjmz3Wxgtw=; h=From:To:Subject:Date:From; b=tU9BqrLZ0Dm6na1jOGhdsmlVWi1UwjC5JbHDeYJoRTrXNUbT0uj9OTU8amvPlH+Tq 5oAayx4vLR6TYcBG2waXvwQS9PEj0Vy2DaMZAbqo0VnEuk3zC/b3b7c0kjxLsCaOR6 vp2e86wvD6Cf6yPHYf8W1lL85AEg5jk9eTO0t88M= X-Auth-ID: abbotti@mev.co.uk Received: by smtp19.relay.ord1d.emailsrvr.com (Authenticated sender: abbotti-AT-mev.co.uk) with ESMTPSA id DF612601DE; Fri, 30 Jan 2026 12:05:09 -0500 (EST) From: Ian Abbott To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , Ian Abbott , H Hartley Sweeten Subject: [PATCH 36/46] comedi: pcl812: Add sanity checks for I/O base address Date: Fri, 30 Jan 2026 16:48:01 +0000 Message-ID: <20260130170416.49994-37-abbotti@mev.co.uk> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260130170416.49994-1-abbotti@mev.co.uk> References: <20260130170416.49994-1-abbotti@mev.co.uk> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Classification-ID: 429d5722-7f90-4557-8586-08913fa85e9e-37-1 Content-Type: text/plain; charset="utf-8" The "pcl812" driver uses an admin-supplied configuration option (`it->options[0]`) to configure the I/O port base address of various analog/digital I/O ISA boards from Advantech, ADLINK, and ICP DAS. It currently allows any base address to be configured but the hardware devices only support base addresses (configured by on-board DIP switches) from 0 or 0x200 (depending on the model) to 0x3F0 on 16-byte boundaries. Store the minimum supported I/O base addresses in the static board information array elements and add a sanity check to ensure the device is not configured at an unsupported base address. Signed-off-by: Ian Abbott --- drivers/comedi/drivers/pcl812.c | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/drivers/comedi/drivers/pcl812.c b/drivers/comedi/drivers/pcl81= 2.c index abca61a72cf7..98b75792c09b 100644 --- a/drivers/comedi/drivers/pcl812.c +++ b/drivers/comedi/drivers/pcl812.c @@ -331,6 +331,7 @@ enum pcl812_boardtype { struct pcl812_board { const char *name; enum pcl812_boardtype board_type; + unsigned short min_io_start; int n_aichan; int n_aochan; unsigned int ai_ns_min; @@ -346,6 +347,7 @@ static const struct pcl812_board boardtypes[] =3D { { .name =3D "pcl812", .board_type =3D BOARD_PCL812, + .min_io_start =3D 0, .n_aichan =3D 16, .n_aochan =3D 2, .ai_ns_min =3D 33000, @@ -355,6 +357,7 @@ static const struct pcl812_board boardtypes[] =3D { .has_dio =3D 1, }, { .name =3D "pcl812pg", + .min_io_start =3D 0, .board_type =3D BOARD_PCL812PG, .n_aichan =3D 16, .n_aochan =3D 2, @@ -366,6 +369,7 @@ static const struct pcl812_board boardtypes[] =3D { }, { .name =3D "acl8112pg", .board_type =3D BOARD_PCL812PG, + .min_io_start =3D 0x200, .n_aichan =3D 16, .n_aochan =3D 2, .ai_ns_min =3D 10000, @@ -376,6 +380,7 @@ static const struct pcl812_board boardtypes[] =3D { }, { .name =3D "acl8112dg", .board_type =3D BOARD_ACL8112, + .min_io_start =3D 0x200, .n_aichan =3D 16, /* 8 differential */ .n_aochan =3D 2, .ai_ns_min =3D 10000, @@ -387,6 +392,7 @@ static const struct pcl812_board boardtypes[] =3D { }, { .name =3D "acl8112hg", .board_type =3D BOARD_ACL8112, + .min_io_start =3D 0x200, .n_aichan =3D 16, /* 8 differential */ .n_aochan =3D 2, .ai_ns_min =3D 10000, @@ -398,6 +404,7 @@ static const struct pcl812_board boardtypes[] =3D { }, { .name =3D "a821pgl", .board_type =3D BOARD_A821, + .min_io_start =3D 0, .n_aichan =3D 16, /* 8 differential */ .n_aochan =3D 1, .ai_ns_min =3D 10000, @@ -407,6 +414,7 @@ static const struct pcl812_board boardtypes[] =3D { }, { .name =3D "a821pglnda", .board_type =3D BOARD_A821, + .min_io_start =3D 0, .n_aichan =3D 16, /* 8 differential */ .ai_ns_min =3D 10000, .rangelist_ai =3D &range_pcl813b_ai, @@ -414,6 +422,7 @@ static const struct pcl812_board boardtypes[] =3D { }, { .name =3D "a821pgh", .board_type =3D BOARD_A821, + .min_io_start =3D 0, .n_aichan =3D 16, /* 8 differential */ .n_aochan =3D 1, .ai_ns_min =3D 10000, @@ -423,6 +432,7 @@ static const struct pcl812_board boardtypes[] =3D { }, { .name =3D "a822pgl", .board_type =3D BOARD_ACL8112, + .min_io_start =3D 0, .n_aichan =3D 16, /* 8 differential */ .n_aochan =3D 2, .ai_ns_min =3D 10000, @@ -433,6 +443,7 @@ static const struct pcl812_board boardtypes[] =3D { }, { .name =3D "a822pgh", .board_type =3D BOARD_ACL8112, + .min_io_start =3D 0, .n_aichan =3D 16, /* 8 differential */ .n_aochan =3D 2, .ai_ns_min =3D 10000, @@ -443,6 +454,7 @@ static const struct pcl812_board boardtypes[] =3D { }, { .name =3D "a823pgl", .board_type =3D BOARD_ACL8112, + .min_io_start =3D 0, .n_aichan =3D 16, /* 8 differential */ .n_aochan =3D 2, .ai_ns_min =3D 8000, @@ -453,6 +465,7 @@ static const struct pcl812_board boardtypes[] =3D { }, { .name =3D "a823pgh", .board_type =3D BOARD_ACL8112, + .min_io_start =3D 0, .n_aichan =3D 16, /* 8 differential */ .n_aochan =3D 2, .ai_ns_min =3D 8000, @@ -463,26 +476,31 @@ static const struct pcl812_board boardtypes[] =3D { }, { .name =3D "pcl813", .board_type =3D BOARD_PCL813, + .min_io_start =3D 0, .n_aichan =3D 32, .rangelist_ai =3D &range_pcl813b_ai, }, { .name =3D "pcl813b", .board_type =3D BOARD_PCL813B, + .min_io_start =3D 0, .n_aichan =3D 32, .rangelist_ai =3D &range_pcl813b_ai, }, { .name =3D "acl8113", .board_type =3D BOARD_ACL8113, + .min_io_start =3D 0x200, .n_aichan =3D 32, .rangelist_ai =3D &range_acl8113_1_ai, }, { .name =3D "iso813", .board_type =3D BOARD_ISO813, + .min_io_start =3D 0, .n_aichan =3D 32, .rangelist_ai =3D &range_iso813_1_ai, }, { .name =3D "acl8216", .board_type =3D BOARD_ACL8216, + .min_io_start =3D 0x200, .n_aichan =3D 16, /* 8 differential */ .n_aochan =3D 2, .ai_ns_min =3D 10000, @@ -495,6 +513,7 @@ static const struct pcl812_board boardtypes[] =3D { }, { .name =3D "a826pg", .board_type =3D BOARD_ACL8216, + .min_io_start =3D 0, .n_aichan =3D 16, /* 8 differential */ .n_aochan =3D 2, .ai_ns_min =3D 10000, @@ -1138,7 +1157,8 @@ static int pcl812_attach(struct comedi_device *dev, s= truct comedi_devconfig *it) if (!devpriv) return -ENOMEM; =20 - ret =3D comedi_request_region(dev, it->options[0], 0x10); + ret =3D comedi_check_request_region(dev, it->options[0], 0x10, + board->min_io_start, 0x3ff, 16); if (ret) return ret; =20 --=20 2.51.0