From nobody Tue Feb 10 05:27:15 2026 Received: from smtp83.ord1d.emailsrvr.com (smtp83.ord1d.emailsrvr.com [184.106.54.83]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4C4BF3559F2 for ; Fri, 30 Jan 2026 17:05:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=184.106.54.83 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769792709; cv=none; b=Uqs0XYEN/hnJY0Koeghu9JoDoaPxnXBy9edJIPrd7p2hLhxVio5jgIJmPAR8nV2Gau1AqRPuL1FcM25gTdlfFQelkkFFWILLjp5f/b9K4XS3N6kJkriLrf3v3DJaR0/C3PdP4kgibIErfEjbtpVb3/M6y6b3M7LN8B6zJM/0wQA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769792709; c=relaxed/simple; bh=aikxMto30aKxnQ2fcJ0Z+x32eDcOY9pJFTrxrqSgj8g=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Vv1Fdp0WdTqLPWwwK42bVOIQQAE4QOZZAKIvwhSfnkDf1wdLSAzB+E/UATtTJoQgeqUEsw8JGBxbGaTKllVBr+z6+kZWjq+xxHu3nYq48eh7InFY2whfwjvQMA2vFdNkkCshuzzSr5QIcweXR25mgfkYKFPsWWKV2+uslIBpOtA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=mev.co.uk; spf=pass smtp.mailfrom=mev.co.uk; dkim=pass (1024-bit key) header.d=mev.co.uk header.i=@mev.co.uk header.b=pGEZsFKw; arc=none smtp.client-ip=184.106.54.83 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=mev.co.uk Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mev.co.uk Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mev.co.uk header.i=@mev.co.uk header.b="pGEZsFKw" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=mev.co.uk; s=20221208-6x11dpa4; t=1769792707; bh=aikxMto30aKxnQ2fcJ0Z+x32eDcOY9pJFTrxrqSgj8g=; h=From:To:Subject:Date:From; b=pGEZsFKwMcYKPNmk9MyHEvMdT10t4DEwwNZfgnkUg2n3Nz5WHnL+bjxIE9lq+mPPk WZfzqt0dUvIufV+EemcFqPPvwy8bmBPWOkEYA0V/VzyqVvls8bxSlIoPwC0TGE61O+ Sf4AY3dxHDR+V2ZB6XQzM3FFAaS94rzvaFKCYGt4= X-Auth-ID: abbotti@mev.co.uk Received: by smtp19.relay.ord1d.emailsrvr.com (Authenticated sender: abbotti-AT-mev.co.uk) with ESMTPSA id C647A602BD; Fri, 30 Jan 2026 12:05:06 -0500 (EST) From: Ian Abbott To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , Ian Abbott , H Hartley Sweeten Subject: [PATCH 33/46] comedi: pcl724: Add sanity checks for I/O base address Date: Fri, 30 Jan 2026 16:47:58 +0000 Message-ID: <20260130170416.49994-34-abbotti@mev.co.uk> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260130170416.49994-1-abbotti@mev.co.uk> References: <20260130170416.49994-1-abbotti@mev.co.uk> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Classification-ID: 429d5722-7f90-4557-8586-08913fa85e9e-34-1 Content-Type: text/plain; charset="utf-8" The "pcl724" driver uses an admin-supplied configuration option (`it->options[0]`) to configure the I/O port base address of various 8255 chip-based digital I/O ISA boards from Advantech, ADLINK, WinSystems, and Diamond Systems. It currently allows any base address to be configured but the hardware only supports base addresses (configured by on-board DIP switches or jumpers) in various ranges, and on various alignment boundaries, depending on the model. Store the minimum and maximum supported I/O address ranges in the static board information array elements (the required alignment is already stored in the `io_range` member), and add a sanity check to ensure the device is not configured at an unsupported base address. Signed-off-by: Ian Abbott --- drivers/comedi/drivers/pcl724.c | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/drivers/comedi/drivers/pcl724.c b/drivers/comedi/drivers/pcl72= 4.c index 00474710b81f..9707d0c89304 100644 --- a/drivers/comedi/drivers/pcl724.c +++ b/drivers/comedi/drivers/pcl724.c @@ -31,6 +31,8 @@ struct pcl724_board { const char *name; unsigned int io_range; + unsigned int min_io_start; + unsigned int max_io_end; unsigned int can_have96:1; unsigned int is_pet48:1; int numofports; @@ -40,37 +42,53 @@ static const struct pcl724_board boardtypes[] =3D { { .name =3D "pcl724", .io_range =3D 0x04, + .min_io_start =3D 0x200, + .max_io_end =3D 0x3ff, .numofports =3D 1, /* 24 DIO channels */ }, { .name =3D "pcl722", .io_range =3D 0x20, + .min_io_start =3D 0x200, + .max_io_end =3D 0x3ff, .can_have96 =3D 1, .numofports =3D 6, /* 144 (or 96) DIO channels */ }, { .name =3D "pcl731", .io_range =3D 0x08, + .min_io_start =3D 0, + .max_io_end =3D 0x3ff, .numofports =3D 2, /* 48 DIO channels */ }, { .name =3D "acl7122", .io_range =3D 0x20, + .min_io_start =3D 0x200, + .max_io_end =3D 0x3ff, .can_have96 =3D 1, .numofports =3D 6, /* 144 (or 96) DIO channels */ }, { .name =3D "acl7124", .io_range =3D 0x04, + .min_io_start =3D 0x200, + .max_io_end =3D 0x3ff, .numofports =3D 1, /* 24 DIO channels */ }, { .name =3D "pet48dio", .io_range =3D 0x02, + .min_io_start =3D 0, + .max_io_end =3D 0x3ff, .is_pet48 =3D 1, .numofports =3D 2, /* 48 DIO channels */ }, { .name =3D "pcmio48", .io_range =3D 0x08, + .min_io_start =3D 0x100, + .max_io_end =3D 0x17f, .numofports =3D 2, /* 48 DIO channels */ }, { .name =3D "onyx-mm-dio", .io_range =3D 0x10, + .min_io_start =3D 0, + .max_io_end =3D 0x3ff, .numofports =3D 2, /* 48 DIO channels */ }, }; @@ -112,7 +130,9 @@ static int pcl724_attach(struct comedi_device *dev, n_subdevices =3D 4; } =20 - ret =3D comedi_request_region(dev, it->options[0], iorange); + ret =3D comedi_check_request_region(dev, it->options[0], iorange, + board->min_io_start, + board->max_io_end, iorange); if (ret) return ret; =20 --=20 2.51.0