From nobody Mon Feb 9 07:31:59 2026 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 4FACC2EC0A3; Wed, 28 Jan 2026 21:52:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769637163; cv=none; b=l7NY+LFjs9vVEbAMiDv/Qrfpd/Qm1dihTIFVBoOIVJDHGXRaURW4oj+ElCdcwo5wEVDVbMP2B8LDvhiM7mHJ2bG9XYZQM1mOW9LcPF7TgirxvZjmiiuScd5wLMFIg/oSDqdy4IbY4nktLTz7L9O7KOp6WAZpUua0n39s9rvy6d4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769637163; c=relaxed/simple; bh=jnJMzLc1I79LAa7AGEwtS4d5b7aIHGIqVNJ48Y9+KtE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=hScFIB3gAHDC8recOhL7GmLATMj9Y8VNJMhlX2f+2UCUYi5jAJ1WpihKt4qHs4hqN7zAynbS6rKY4DsA3MWX/oASMIMIj5VeMR9H9NwEEUrIyY7fE2sH9jT9YNyp0yZde33hPH0IZZJ3upLR6+oA5VzBW4bfKSiv4oUQL+dEnxM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: MoubSkylT86Ab4fM6LEA5A== X-CSE-MsgGUID: 3aPy9+SDTHKooAQNk6/fNg== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 29 Jan 2026 06:52:31 +0900 Received: from demon-pc.localdomain (unknown [10.226.92.19]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id D0B3540C0B84; Thu, 29 Jan 2026 06:52:27 +0900 (JST) From: Cosmin Tanislav To: Fabrizio Castro , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm Cc: linux-spi@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Cosmin Tanislav Subject: [PATCH v3 1/3] dt-bindings: spi: renesas,rzv2h-rspi: allow multiple DMAs Date: Wed, 28 Jan 2026 23:51:30 +0200 Message-ID: <20260128215132.1353381-2-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260128215132.1353381-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20260128215132.1353381-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" All supported SoCs have multiple DMA controllers that can be used with the RSPI peripheral. The current bindings only allow a single pair of RX and TX DMAs. The DMA core allows specifying multiple DMAs with the same name, and it will pick the first available one. There is an exception in the base dt-schema rules specifically for allowing this behavior (dtschema/schemas/dma/dma.yaml). dma-names: anyOf: - uniqueItems: true - items: # Hack around Renesas bindings which repeat entries to support # multiple possible DMA providers enum: [rx, tx] Allow multiple DMAs to have the same name and only restrict the possible names of the DMA channels, not their count. For RZ/T2H and RZ/N2H SoCs, limit the number of DMA channels to 6, as they have 3 DMA controllers. For RZ/V2H and RZ/V2N SoCs, limit the number of DMA channels to 10, as they have 5 DMA controllers. Signed-off-by: Cosmin Tanislav --- V3: * impose proper maxItems for each device * impose maxItems for dmas property V2: * new patch .../bindings/spi/renesas,rzv2h-rspi.yaml | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml = b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml index a588b112e11e..cf8b733b766d 100644 --- a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml +++ b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml @@ -58,12 +58,16 @@ properties: - const: tresetn =20 dmas: - maxItems: 2 + minItems: 2 + maxItems: 10 =20 dma-names: + minItems: 2 + maxItems: 10 items: - - const: rx - - const: tx + enum: + - rx + - tx =20 power-domains: maxItems: 1 @@ -121,6 +125,12 @@ allOf: resets: false reset-names: false =20 + dmas: + maxItems: 6 + + dma-names: + maxItems: 6 + unevaluatedProperties: false =20 examples: --=20 2.52.0 From nobody Mon Feb 9 07:31:59 2026 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id F2A6E338925; Wed, 28 Jan 2026 21:52:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769637166; cv=none; b=Ie4SbOUzkFcX8YzoZAsLVoNzcyBgjOVO6UBuM4FpX1y0cObKgJrYF4uggtvbBZ3JiYB1LRs4eQDTmecb5VrPgcFm/kdNNMhHihU3F1JLjc5Ao/bYLRk7okqnxCLP9+1MF9l+sbEEQ3cMV8Sn8zlWCMAwPveLt6eeAinYhWGcPZM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769637166; c=relaxed/simple; bh=p45FhIOPq/qep+pt6ysojP4K2PfFPQ2/qQkqRPTw1Ew=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=GQTeYgG8X477TSqi1IPRbWFHxExCofX8GtkETmQXOx6stBNePRrVKDqFsbqOMXuOy0LjvAsc2hku8SgVv5RRWzq4UX8Bx9/7Drk1/UGMTuWkv6k3+weeBXQr9thSP5m3Tgw5fw/L25/2hGFB2v7xu0Rfe4nHAkuGdUaPJe7gTCU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: TxMLTiH+RwyeOwNCalY64A== X-CSE-MsgGUID: CcpxWbMFRfe6E2lTNleUHQ== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 29 Jan 2026 06:52:36 +0900 Received: from demon-pc.localdomain (unknown [10.226.92.19]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id C8E3540C0B68; Thu, 29 Jan 2026 06:52:32 +0900 (JST) From: Cosmin Tanislav To: Fabrizio Castro , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm Cc: linux-spi@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Cosmin Tanislav Subject: [PATCH v3 2/3] arm64: dts: renesas: r9a09g077: wire up DMA support for SPI Date: Wed, 28 Jan 2026 23:51:31 +0200 Message-ID: <20260128215132.1353381-3-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260128215132.1353381-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20260128215132.1353381-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" RZ/T2H (R9A09G077) has three DMA controllers that can be used by peripherals like SPI to offload data transfers from the CPU. Wire up the DMA channels for the SPI peripherals. Signed-off-by: Cosmin Tanislav Reviewed-by: Geert Uytterhoeven --- V3: * no changes V2: * wire up all DMA controllers arch/arm64/boot/dts/renesas/r9a09g077.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi b/arch/arm64/boot/d= ts/renesas/r9a09g077.dtsi index 14d7fb6f8952..0e44b01a56c7 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi @@ -200,6 +200,10 @@ rspi0: spi@80007000 { clocks =3D <&cpg CPG_CORE R9A09G077_CLK_PCLKM>, <&cpg CPG_MOD 104>; clock-names =3D "pclk", "pclkspi"; + dmas =3D <&dmac0 0x267a>, <&dmac0 0x267b>, + <&dmac1 0x267a>, <&dmac1 0x267b>, + <&dmac2 0x267a>, <&dmac2 0x267b>; + dma-names =3D "rx", "tx", "rx", "tx", "rx", "tx"; power-domains =3D <&cpg>; #address-cells =3D <1>; #size-cells =3D <0>; @@ -218,6 +222,10 @@ rspi1: spi@80007400 { clocks =3D <&cpg CPG_CORE R9A09G077_CLK_PCLKM>, <&cpg CPG_MOD 105>; clock-names =3D "pclk", "pclkspi"; + dmas =3D <&dmac0 0x267f>, <&dmac0 0x2680>, + <&dmac1 0x267f>, <&dmac1 0x2680>, + <&dmac2 0x267f>, <&dmac2 0x2680>; + dma-names =3D "rx", "tx", "rx", "tx", "rx", "tx"; power-domains =3D <&cpg>; #address-cells =3D <1>; #size-cells =3D <0>; @@ -236,6 +244,10 @@ rspi2: spi@80007800 { clocks =3D <&cpg CPG_CORE R9A09G077_CLK_PCLKM>, <&cpg CPG_MOD 106>; clock-names =3D "pclk", "pclkspi"; + dmas =3D <&dmac0 0x2684>, <&dmac0 0x2685>, + <&dmac1 0x2684>, <&dmac1 0x2685>, + <&dmac2 0x2684>, <&dmac2 0x2685>; + dma-names =3D "rx", "tx", "rx", "tx", "rx", "tx"; power-domains =3D <&cpg>; #address-cells =3D <1>; #size-cells =3D <0>; @@ -254,6 +266,10 @@ rspi3: spi@81007000 { clocks =3D <&cpg CPG_CORE R9A09G077_CLK_PCLKM>, <&cpg CPG_MOD 602>; clock-names =3D "pclk", "pclkspi"; + dmas =3D <&dmac0 0x2689>, <&dmac0 0x268a>, + <&dmac1 0x2689>, <&dmac1 0x268a>, + <&dmac2 0x2689>, <&dmac2 0x268a>; + dma-names =3D "rx", "tx", "rx", "tx", "rx", "tx"; power-domains =3D <&cpg>; #address-cells =3D <1>; #size-cells =3D <0>; --=20 2.52.0 From nobody Mon Feb 9 07:31:59 2026 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B221B33B6CD; Wed, 28 Jan 2026 21:52:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769637165; cv=none; b=RhGpMOcjkVcTY8BgKsJ/XhfRu40PeO/oxaPtr/Roq6Y2Dac1G6cx4dbTaTV/BytdEk8XrzwK7xp6FL6trFZOMr+1Z7KS2RI+NfH13EUbo8+rTynwiA6pgJV2QQ5NXL4xW4/x8zNsKW6n1FFM6Xodfv5JQYYUtJBefmKEIrTZhLA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769637165; c=relaxed/simple; bh=uTrULJ8aJSpXyvMsV9/PAe8y/ntDL0VojKifbduqPtM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=fciv2w+ue2IDBktcjgapR5kmgSwKFTTHXjJCyILuR7kGM7V7jzvc3+Oeac6gaYeHNWD0oPCn2+lqdTPoTbBaS926W2xSEyWPCoBN6HNvEei8S9889AT3OYACipk+1A//4UgcUucvP7kW8ybK0ag19rpfCHTSWZZN7X56dNLlbh0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: 21J3LKGLRsGVKfy72+xo8Q== X-CSE-MsgGUID: ZTQ8BbJbQKqpVPX3rGn8xA== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 29 Jan 2026 06:52:41 +0900 Received: from demon-pc.localdomain (unknown [10.226.92.19]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id BDCA940C0B68; Thu, 29 Jan 2026 06:52:37 +0900 (JST) From: Cosmin Tanislav To: Fabrizio Castro , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm Cc: linux-spi@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Cosmin Tanislav Subject: [PATCH v3 3/3] arm64: dts: renesas: r9a09g087: wire up DMA support for SPI Date: Wed, 28 Jan 2026 23:51:32 +0200 Message-ID: <20260128215132.1353381-4-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260128215132.1353381-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20260128215132.1353381-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" RZ/N2H (R9A09G087) has three DMA controllers that can be used by peripherals like SPI to offload data transfers from the CPU. Wire up the DMA channels for the SPI peripherals. Signed-off-by: Cosmin Tanislav Reviewed-by: Geert Uytterhoeven --- V3: * no changes V2: * wire up all DMA controllers arch/arm64/boot/dts/renesas/r9a09g087.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi b/arch/arm64/boot/d= ts/renesas/r9a09g087.dtsi index 4a1339561332..7d1c669ad262 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g087.dtsi @@ -200,6 +200,10 @@ rspi0: spi@80007000 { clocks =3D <&cpg CPG_CORE R9A09G087_CLK_PCLKM>, <&cpg CPG_MOD 104>; clock-names =3D "pclk", "pclkspi"; + dmas =3D <&dmac0 0x267a>, <&dmac0 0x267b>, + <&dmac1 0x267a>, <&dmac1 0x267b>, + <&dmac2 0x267a>, <&dmac2 0x267b>; + dma-names =3D "rx", "tx", "rx", "tx", "rx", "tx"; power-domains =3D <&cpg>; #address-cells =3D <1>; #size-cells =3D <0>; @@ -218,6 +222,10 @@ rspi1: spi@80007400 { clocks =3D <&cpg CPG_CORE R9A09G087_CLK_PCLKM>, <&cpg CPG_MOD 105>; clock-names =3D "pclk", "pclkspi"; + dmas =3D <&dmac0 0x267f>, <&dmac0 0x2680>, + <&dmac1 0x267f>, <&dmac1 0x2680>, + <&dmac2 0x267f>, <&dmac2 0x2680>; + dma-names =3D "rx", "tx", "rx", "tx", "rx", "tx"; power-domains =3D <&cpg>; #address-cells =3D <1>; #size-cells =3D <0>; @@ -236,6 +244,10 @@ rspi2: spi@80007800 { clocks =3D <&cpg CPG_CORE R9A09G087_CLK_PCLKM>, <&cpg CPG_MOD 106>; clock-names =3D "pclk", "pclkspi"; + dmas =3D <&dmac0 0x2684>, <&dmac0 0x2685>, + <&dmac1 0x2684>, <&dmac1 0x2685>, + <&dmac2 0x2684>, <&dmac2 0x2685>; + dma-names =3D "rx", "tx", "rx", "tx", "rx", "tx"; power-domains =3D <&cpg>; #address-cells =3D <1>; #size-cells =3D <0>; @@ -254,6 +266,10 @@ rspi3: spi@81007000 { clocks =3D <&cpg CPG_CORE R9A09G087_CLK_PCLKM>, <&cpg CPG_MOD 602>; clock-names =3D "pclk", "pclkspi"; + dmas =3D <&dmac0 0x2689>, <&dmac0 0x268a>, + <&dmac1 0x2689>, <&dmac1 0x268a>, + <&dmac2 0x2689>, <&dmac2 0x268a>; + dma-names =3D "rx", "tx", "rx", "tx", "rx", "tx"; power-domains =3D <&cpg>; #address-cells =3D <1>; #size-cells =3D <0>; --=20 2.52.0