From nobody Mon Feb 9 16:02:23 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6680935B12D for ; Wed, 28 Jan 2026 17:26:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769621181; cv=none; b=pODsr7qVTO3tpDlB1Oe1OsIusOLYp1z7PkkYc5r1KHzJWU/CCcQGR0XapeKlmfvKuRTZbmxxMfuylNgVTtaDiUJBK4ezx1wZ6HYZtPNg0EFb0bQI5d5MxS3OIHeCeZfbKICeBZNorN0Zxs08+4zBWFFNYhsUvTvb9ThrwxInIy4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769621181; c=relaxed/simple; bh=AYlKWiDpPbO73UzlfaqmMIQSIX1hoio3H6459eEfPvw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=SQC1TAVhSmY5uM6JjfS978GMkQkB+2Y6u+USqhMvv/GyAixmYmDxBjUT0+MyD2obc+oudbPlAJHJ6oabWJ3PsVYc7jDBoxzX7cNjGrNua5XPL2kTkLr5GPpjJkmr+12QpZzBoJlfECSpXTO2VNvjrjCiAajfZff+NT6aOEwygNM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com; spf=pass smtp.mailfrom=ideasonboard.com; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b=S1gXkUyI; arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="S1gXkUyI" Received: from [127.0.1.1] (91-158-153-178.elisa-laajakaista.fi [91.158.153.178]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 233972821; Wed, 28 Jan 2026 18:25:31 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1769621131; bh=AYlKWiDpPbO73UzlfaqmMIQSIX1hoio3H6459eEfPvw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=S1gXkUyIVy4n3nrZEQkEbWmz+CJSUbuPCU46WncjNZsZNN2dTC8sX7i/ygzb1s62n 6/afdC+eUk8oMxvoGwOUDZRLklNsD8WuJJdcBS/tZ1Mj2KqzezQb4z+YbiQyYqeT7t xXFBKbdTpHvNes2xH1sD60m8d7ZWXBy0fNKWo3YY= From: Tomi Valkeinen Date: Wed, 28 Jan 2026 19:25:34 +0200 Subject: [PATCH v8 09/11] drm: xlnx: zynqmp: Add support for Y8 and Y10_P32 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260128-xilinx-formats-v8-9-9ea8adb70269@ideasonboard.com> References: <20260128-xilinx-formats-v8-0-9ea8adb70269@ideasonboard.com> In-Reply-To: <20260128-xilinx-formats-v8-0-9ea8adb70269@ideasonboard.com> To: Vishal Sagar , Anatoliy Klymenko , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Laurent Pinchart , Michal Simek Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Geert Uytterhoeven , Dmitry Baryshkov , Pekka Paalanen , Tomi Valkeinen X-Mailer: b4 0.15-dev-c25d1 X-Developer-Signature: v=1; a=openpgp-sha256; l=2076; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=AYlKWiDpPbO73UzlfaqmMIQSIX1hoio3H6459eEfPvw=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBpekaljaQNA/MLeOCdWogjGdrvn7IfdWtYDIuuu ZDgACJXhFyJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCaXpGpQAKCRD6PaqMvJYe 9UM+D/9bOXUaigE21y4xhb69TmgQ3Nd2zk/Y2EFmtky/Geh0GhEYw+pVIjCl9vhpH8UHpmTITQt HXopMyOIlJhv8qrFu81cC9Y3WAjDsD453vUCYef3G1GUuYKPaZaOdtMWnUj9/gyvaABhKp47jk3 JOUwvOWaWyJ8QeyB8uCfH+dRrd+yyPQzA9DikjT1uIHICi4GOo81jDqtT2MAlc6I9pmaOqO//Rl CxkKyEOxzzIaPmQ2cx7KEa7Sukrk//JhAdqfVwlDSBYTgBZfAlRC19Ojh1rjMLcFaokjDSRpk/x C4IUJ7OxXkiKIfL5jrOVGQu6I4foLps+cHUH/uXIXjpu8F1THoP7tzuz6xBeAt5jXSynW33ZGCr fm7fR0v1E6c8DvnzEVj3kjSoAezQ2KK3eYp5HhfXHQJ4v0uru/ILbTQ3JWc2Bw1AkCfvFVjgNsr XkwhAKgHR7w8Dtv5/n63o8HyOCtkmAh9NMxzyjrfIl1PLXilSpVMMVNt4AbZRuwq7s60/HS5Qmh 6NvQpOIez4Vuss5QDJvH2tp8sqxIrdt8lxUlsjKn6bsTNeiRBIrjThzqNGegIPzBXmdgdJ3VDSH MKn9oFwlg3jZehwzJWEXarA4GhXn5HLq4zo6+SyprFEMfHXg2O9nFDDYUsSvdu3cow5GKWCOhz8 irYXP7beBuaMVPQ== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 Add support for Y8 and Y10_P32 formats. We also need to add new csc matrices for the y-only formats. Reviewed-by: Vishal Sagar Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/xlnx/zynqmp_disp.c | 27 ++++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/xlnx/zynqmp_disp.c b/drivers/gpu/drm/xlnx/zynq= mp_disp.c index 1dc77f2e4262..57bb6d1dd10a 100644 --- a/drivers/gpu/drm/xlnx/zynqmp_disp.c +++ b/drivers/gpu/drm/xlnx/zynqmp_disp.c @@ -307,6 +307,16 @@ static const struct zynqmp_disp_format avbuf_vid_fmts[= ] =3D { .buf_fmt =3D ZYNQMP_DISP_AV_BUF_FMT_NL_VID_YV16CI_10, .swap =3D false, .sf =3D scaling_factors_101010, + }, { + .drm_fmt =3D DRM_FORMAT_Y8, + .buf_fmt =3D ZYNQMP_DISP_AV_BUF_FMT_NL_VID_MONO, + .swap =3D false, + .sf =3D scaling_factors_888, + }, { + .drm_fmt =3D DRM_FORMAT_Y10_P32, + .buf_fmt =3D ZYNQMP_DISP_AV_BUF_FMT_NL_VID_YONLY_10, + .swap =3D false, + .sf =3D scaling_factors_101010, }, }; =20 @@ -697,6 +707,17 @@ static const u32 csc_sdtv_to_rgb_offsets[] =3D { 0x0, 0x1800, 0x1800 }; =20 +/* In Y-only mode the single Y channel is on the third column */ +static const u16 csc_sdtv_to_rgb_yonly_matrix[] =3D { + 0x0, 0x0, 0x1000, + 0x0, 0x0, 0x1000, + 0x0, 0x0, 0x1000, +}; + +static const u32 csc_sdtv_to_rgb_yonly_offsets[] =3D { + 0x0, 0x0, 0x0 +}; + /** * zynqmp_disp_blend_set_output_format - Set the output format of the blen= der * @disp: Display controller @@ -846,7 +867,11 @@ static void zynqmp_disp_blend_layer_enable(struct zynq= mp_disp *disp, ZYNQMP_DISP_V_BLEND_LAYER_CONTROL(layer->id), val); =20 - if (layer->drm_fmt->is_yuv) { + if (layer->drm_fmt->format =3D=3D DRM_FORMAT_Y8 || + layer->drm_fmt->format =3D=3D DRM_FORMAT_Y10_P32) { + coeffs =3D csc_sdtv_to_rgb_yonly_matrix; + offsets =3D csc_sdtv_to_rgb_yonly_offsets; + } else if (layer->drm_fmt->is_yuv) { coeffs =3D csc_sdtv_to_rgb_matrix; offsets =3D csc_sdtv_to_rgb_offsets; } else { --=20 2.43.0