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These connectors are exposed as the Power Sequencing devices as they often support multiple interfaces like PCIe/SATA, USB/UART to the host machine and each interfaces could be driven by different client drivers at the same time. This driver handles the PCIe interface of these connectors. It first checks for the presence of the graph port in the Root Port node with the help of of_graph_is_present() API, if present, it acquires/poweres ON the corresponding pwrseq device. Once the pwrseq device is powered ON, the driver will skip parsing the Root Port/Slot resources and registers with the pwrctrl framework. Reviewed-by: Bartosz Golaszewski Signed-off-by: Manivannan Sadhasivam --- drivers/pci/pwrctrl/Kconfig | 1 + drivers/pci/pwrctrl/slot.c | 31 +++++++++++++++++++++++++++---- 2 files changed, 28 insertions(+), 4 deletions(-) diff --git a/drivers/pci/pwrctrl/Kconfig b/drivers/pci/pwrctrl/Kconfig index e0f999f299bb..cd3aa15bad00 100644 --- a/drivers/pci/pwrctrl/Kconfig +++ b/drivers/pci/pwrctrl/Kconfig @@ -13,6 +13,7 @@ config PCI_PWRCTRL_PWRSEQ =20 config PCI_PWRCTRL_SLOT tristate "PCI Power Control driver for PCI slots" + select POWER_SEQUENCING select PCI_PWRCTRL help Say Y here to enable the PCI Power Control driver to control the power diff --git a/drivers/pci/pwrctrl/slot.c b/drivers/pci/pwrctrl/slot.c index 44eccbca793c..082af81efe25 100644 --- a/drivers/pci/pwrctrl/slot.c +++ b/drivers/pci/pwrctrl/slot.c @@ -8,8 +8,10 @@ #include #include #include +#include #include #include +#include #include #include =20 @@ -18,6 +20,7 @@ struct slot_pwrctrl { struct regulator_bulk_data *supplies; int num_supplies; struct clk *clk; + struct pwrseq_desc *pwrseq; }; =20 static int slot_pwrctrl_power_on(struct pci_pwrctrl *pwrctrl) @@ -26,6 +29,11 @@ static int slot_pwrctrl_power_on(struct pci_pwrctrl *pwr= ctrl) struct slot_pwrctrl, pwrctrl); int ret; =20 + if (slot->pwrseq) { + pwrseq_power_on(slot->pwrseq); + return 0; + } + ret =3D regulator_bulk_enable(slot->num_supplies, slot->supplies); if (ret < 0) { dev_err(slot->pwrctrl.dev, "Failed to enable slot regulators\n"); @@ -40,6 +48,11 @@ static int slot_pwrctrl_power_off(struct pci_pwrctrl *pw= rctrl) struct slot_pwrctrl *slot =3D container_of(pwrctrl, struct slot_pwrctrl, pwrctrl); =20 + if (slot->pwrseq) { + pwrseq_power_off(slot->pwrseq); + return 0; + } + regulator_bulk_disable(slot->num_supplies, slot->supplies); clk_disable_unprepare(slot->clk); =20 @@ -64,6 +77,15 @@ static int slot_pwrctrl_probe(struct platform_device *pd= ev) if (!slot) return -ENOMEM; =20 + if (of_graph_is_present(dev_of_node(dev))) { + slot->pwrseq =3D devm_pwrseq_get(dev, "pcie"); + if (IS_ERR(slot->pwrseq)) + return dev_err_probe(dev, PTR_ERR(slot->pwrseq), + "Failed to get the power sequencer\n"); + + goto skip_resources; + } + ret =3D of_regulator_bulk_get_all(dev, dev_of_node(dev), &slot->supplies); if (ret < 0) { @@ -73,19 +95,20 @@ static int slot_pwrctrl_probe(struct platform_device *p= dev) =20 slot->num_supplies =3D ret; =20 - ret =3D devm_add_action_or_reset(dev, devm_slot_pwrctrl_release, slot); - if (ret) - return ret; - slot->clk =3D devm_clk_get_optional(dev, NULL); if (IS_ERR(slot->clk)) { return dev_err_probe(dev, PTR_ERR(slot->clk), "Failed to enable slot clock\n"); } =20 +skip_resources: slot->pwrctrl.power_on =3D slot_pwrctrl_power_on; slot->pwrctrl.power_off =3D slot_pwrctrl_power_off; =20 + ret =3D devm_add_action_or_reset(dev, devm_slot_pwrctrl_release, slot); + if (ret) + return ret; + pci_pwrctrl_init(&slot->pwrctrl, dev); =20 ret =3D devm_pci_pwrctrl_device_set_ready(dev, &slot->pwrctrl); --=20 2.51.0