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Tue, 27 Jan 2026 23:58:08 -0800 (PST) Received: from LAPTOP-872M7T80.localdomain ([223.181.119.57]) by smtp.googlemail.com with ESMTPSA id 98e67ed59e1d1-353f61e0230sm4637149a91.11.2026.01.27.23.58.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Jan 2026 23:58:08 -0800 (PST) From: Akhila YS Date: Wed, 28 Jan 2026 07:58:00 +0000 Subject: [PATCH v2] dt-bindings: mtd: mxic,multi-itfc-v009-nand-controller: convert to DT schema Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260128-mxic-nand-v2-1-6f0cf94f2fd7@gmail.com> X-B4-Tracking: v=1; b=H4sIAIfBeWkC/03MSwrCMBSF4a2UOzaS3DaNOHIf0kHIo71gUkkkV Er2biwIDv/D4dshu0Quw7XbIblCmdbYAk8dmEXH2TGyrQE5jlwgsrCRYVFHy9SA4tILlI730P7 P5Dxth3WfWi+UX2t6H3QR3/WnjH9KEUwwKZX1g+bWa3Wbg6bH2awBplrrB4bQS+qiAAAA X-Change-ID: 20260122-mxic-nand-742183125e03 To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mason Yang Cc: linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Akhila YS X-Mailer: b4 0.14.3 Convert Macronix Raw NAND Controller Device Tree binding to DT Schema. Signed-off-by: Akhila YS --- Changes in v2: - Add "Mason Yang" as maintainer. - Link to v1: https://lore.kernel.org/r/20260126-mxic-nand-v1-1-557df4a0dfa= 7@gmail.com --- .../mtd/mxic,multi-itfc-v009-nand-controller.yaml | 78 ++++++++++++++++++= ++++ .../devicetree/bindings/mtd/mxic-nand.txt | 36 ---------- 2 files changed, 78 insertions(+), 36 deletions(-) diff --git a/Documentation/devicetree/bindings/mtd/mxic,multi-itfc-v009-nan= d-controller.yaml b/Documentation/devicetree/bindings/mtd/mxic,multi-itfc-v= 009-nand-controller.yaml new file mode 100644 index 000000000000..97fe6681cc8c --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/mxic,multi-itfc-v009-nand-contr= oller.yaml @@ -0,0 +1,78 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause + +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/mxic,multi-itfc-v009-nand-controlle= r.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Macronix Raw NAND Controller + +maintainers: + - Mason Yang + +description: + The Macronix Multi-Interface Raw NAND Controller is a versatile flash + memory controller for embedding in SoCs, capable of interfacing with + various NAND devices. It requires dedicated clock inputs for core, data + transmit, and delayed transmit paths along with register space and an + interrupt line for operation. + +allOf: + - $ref: nand-controller.yaml# + +properties: + compatible: + const: mxic,multi-itfc-v009-nand-controller + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + clocks: + minItems: 3 + maxItems: 3 + + clock-names: + items: + - const: ps + - const: send + - const: send_dly + +required: + - compatible + - reg + - interrupts + - "#address-cells" + - "#size-cells" + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include + nand-controller@43c30000 { + compatible =3D "mxic,multi-itfc-v009-nand-controller"; + reg =3D <0x43c30000 0x10000>; + #address-cells =3D <1>; + #size-cells =3D <0>; + interrupts =3D ; + clocks =3D <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>; + clock-names =3D "ps", "send", "send_dly"; + + nand@0 { + reg =3D <0>; + nand-ecc-mode =3D "soft"; + nand-ecc-algo =3D "bch"; + }; + }; +... diff --git a/Documentation/devicetree/bindings/mtd/mxic-nand.txt b/Document= ation/devicetree/bindings/mtd/mxic-nand.txt deleted file mode 100644 index 46c55295a3e6..000000000000 --- a/Documentation/devicetree/bindings/mtd/mxic-nand.txt +++ /dev/null @@ -1,36 +0,0 @@ -Macronix Raw NAND Controller Device Tree Bindings -------------------------------------------------- - -Required properties: -- compatible: should be "mxic,multi-itfc-v009-nand-controller" -- reg: should contain 1 entry for the registers -- #address-cells: should be set to 1 -- #size-cells: should be set to 0 -- interrupts: interrupt line connected to this raw NAND controller -- clock-names: should contain "ps", "send" and "send_dly" -- clocks: should contain 3 phandles for the "ps", "send" and - "send_dly" clocks - -Children nodes: -- children nodes represent the available NAND chips. - -See Documentation/devicetree/bindings/mtd/nand-controller.yaml -for more details on generic bindings. - -Example: - - nand: nand-controller@43c30000 { - compatible =3D "mxic,multi-itfc-v009-nand-controller"; - reg =3D <0x43c30000 0x10000>; - #address-cells =3D <1>; - #size-cells =3D <0>; - interrupts =3D ; - clocks =3D <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>; - clock-names =3D "send", "send_dly", "ps"; - - nand@0 { - reg =3D <0>; - nand-ecc-mode =3D "soft"; - nand-ecc-algo =3D "bch"; - }; - }; --- base-commit: cc3aa43b44bdb43dfbac0fcb51c56594a11338a8 change-id: 20260122-mxic-nand-742183125e03 Best regards, --=20 Akhila YS