From nobody Mon Feb 9 02:07:48 2026 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 56A8436EAA5; Tue, 27 Jan 2026 20:18:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769545094; cv=none; b=kPtfnDGZC+sCsJNTyda+OZkBzzVFdoK0B/rvOUZP+teiNr8bCgNjSj2O+gRW4gVU6xZzWIajOzCf5afxB8YQCvmcAV5gHUkMThSWeCkPvHZ054xVJKhD+bc9QEz9Pf9BYHV/+TT37A3rPKrS6s69dGxIm6lWbQ/TH8/wpvZr3eE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769545094; c=relaxed/simple; bh=9bzRqNgGoRSfRoR8GFXGmzZC7gQcS2HubfedC6x4rLQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ooUcJFnW4GRxCIh4Q+Qr2HWtxYAEkl6hxz/p3IpdK+1FJC6P9Gd9lbvfngA0UKDc271svUPQ6MIFh7S+dGTOA/AmoxePWy0kxQiD32luoN5qNa8VmAuD8J9V8iNv8AJAj2+cO7N76kuZg/DR3Ds3C3QeGTHNty08kpRs6ADItlo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: O1w3u154SbmRHOUqNqnBlA== X-CSE-MsgGUID: p+H2HziGSa2e9oWqWHvw/A== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 28 Jan 2026 05:18:07 +0900 Received: from demon-pc.localdomain (unknown [10.226.93.69]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id AC65F4087502; Wed, 28 Jan 2026 05:18:03 +0900 (JST) From: Cosmin Tanislav To: Fabrizio Castro , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm Cc: linux-spi@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Cosmin Tanislav Subject: [PATCH v2 1/3] dt-bindings: spi: renesas,rzv2h-rspi: allow multiple DMAs Date: Tue, 27 Jan 2026 22:17:04 +0200 Message-ID: <20260127201706.616374-2-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260127201706.616374-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20260127201706.616374-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Renesas RZ/T2H and RZ/N2H SoCs have multiple DMA controllers that can be used with the RSPI peripheral. The current bindings only allow a single pair of RX and TX DMAs. Allow multiple DMAs by only restricting the possible names of the DMA channels. All '.*-names$' properties must conform to the string-array.yaml meta-schema, which requires both minItems and maxItems properties to be present before the items can be a schema. Otherwise, the items need to be an array. Declare a generous maxItems of 32, which should be enough for 16 DMA controllers, so that we don't have to update this value ever again, even if currently the maximum number of DMA controllers on a Renesas SoC is 5. Signed-off-by: Cosmin Tanislav --- V2: * new patch .../devicetree/bindings/spi/renesas,rzv2h-rspi.yaml | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml = b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml index a588b112e11e..383e97f0dabd 100644 --- a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml +++ b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml @@ -57,13 +57,15 @@ properties: - const: presetn - const: tresetn =20 - dmas: - maxItems: 2 + dmas: true =20 dma-names: + minItems: 2 + maxItems: 32 items: - - const: rx - - const: tx + enum: + - rx + - tx =20 power-domains: maxItems: 1 --=20 2.52.0 From nobody Mon Feb 9 02:07:48 2026 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 352B0265CC2; Tue, 27 Jan 2026 20:18:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769545101; cv=none; b=Wl3xpzeTa5oNRwONH4FDieD60UJ2Y7SM4faKo6pIPqpP/T01VB/yqLM4RiLaRib3gP154o03yHTGBjFGnFXC2iHelbGeSCH28k0RJ2dPqNeIQFL3C5m+HFx0gowld3Ua4lCEnn2THE/3Sw229pZ7eGPrRHH9yqcBB5j6i4n6Igw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769545101; c=relaxed/simple; bh=vqM/AQoYvDn10JpUAvxzI5uTGLi1XLccpPDYZLLj7Q4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Ym81mN7sEW+fiOyniYsQYUi5T1aNyKeLTd8cIBYdeQf/4Z/xUZJ3gwr/VihlkjzDPRXLkSxzrW8aep3aTaOK55zflP0o2kQtU8RsLlFoIGkJ7zjUY/ngWjT9eNCveZrORJOCgyaqQ86fXFHvdB9jb6sWpcuTfRyQE+oPIWP9Yi4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: Sy30TNNERDC3npRWBWs+rg== X-CSE-MsgGUID: P7IvSMygReGxHnthAJNOrw== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 28 Jan 2026 05:18:12 +0900 Received: from demon-pc.localdomain (unknown [10.226.93.69]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 6C98840869DB; Wed, 28 Jan 2026 05:18:08 +0900 (JST) From: Cosmin Tanislav To: Fabrizio Castro , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm Cc: linux-spi@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Cosmin Tanislav Subject: [PATCH v2 2/3] arm64: dts: renesas: r9a09g077: wire up DMA support for SPI Date: Tue, 27 Jan 2026 22:17:05 +0200 Message-ID: <20260127201706.616374-3-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260127201706.616374-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20260127201706.616374-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" RZ/T2H (R9A09G077) has three DMA controllers that can be used by peripherals like SPI to offload data transfers from the CPU. Wire up the DMA channels for the SPI peripherals. Signed-off-by: Cosmin Tanislav Reviewed-by: Geert Uytterhoeven --- V2: * wire up all DMA controllers arch/arm64/boot/dts/renesas/r9a09g077.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi b/arch/arm64/boot/d= ts/renesas/r9a09g077.dtsi index 14d7fb6f8952..0e44b01a56c7 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi @@ -200,6 +200,10 @@ rspi0: spi@80007000 { clocks =3D <&cpg CPG_CORE R9A09G077_CLK_PCLKM>, <&cpg CPG_MOD 104>; clock-names =3D "pclk", "pclkspi"; + dmas =3D <&dmac0 0x267a>, <&dmac0 0x267b>, + <&dmac1 0x267a>, <&dmac1 0x267b>, + <&dmac2 0x267a>, <&dmac2 0x267b>; + dma-names =3D "rx", "tx", "rx", "tx", "rx", "tx"; power-domains =3D <&cpg>; #address-cells =3D <1>; #size-cells =3D <0>; @@ -218,6 +222,10 @@ rspi1: spi@80007400 { clocks =3D <&cpg CPG_CORE R9A09G077_CLK_PCLKM>, <&cpg CPG_MOD 105>; clock-names =3D "pclk", "pclkspi"; + dmas =3D <&dmac0 0x267f>, <&dmac0 0x2680>, + <&dmac1 0x267f>, <&dmac1 0x2680>, + <&dmac2 0x267f>, <&dmac2 0x2680>; + dma-names =3D "rx", "tx", "rx", "tx", "rx", "tx"; power-domains =3D <&cpg>; #address-cells =3D <1>; #size-cells =3D <0>; @@ -236,6 +244,10 @@ rspi2: spi@80007800 { clocks =3D <&cpg CPG_CORE R9A09G077_CLK_PCLKM>, <&cpg CPG_MOD 106>; clock-names =3D "pclk", "pclkspi"; + dmas =3D <&dmac0 0x2684>, <&dmac0 0x2685>, + <&dmac1 0x2684>, <&dmac1 0x2685>, + <&dmac2 0x2684>, <&dmac2 0x2685>; + dma-names =3D "rx", "tx", "rx", "tx", "rx", "tx"; power-domains =3D <&cpg>; #address-cells =3D <1>; #size-cells =3D <0>; @@ -254,6 +266,10 @@ rspi3: spi@81007000 { clocks =3D <&cpg CPG_CORE R9A09G077_CLK_PCLKM>, <&cpg CPG_MOD 602>; clock-names =3D "pclk", "pclkspi"; + dmas =3D <&dmac0 0x2689>, <&dmac0 0x268a>, + <&dmac1 0x2689>, <&dmac1 0x268a>, + <&dmac2 0x2689>, <&dmac2 0x268a>; + dma-names =3D "rx", "tx", "rx", "tx", "rx", "tx"; power-domains =3D <&cpg>; #address-cells =3D <1>; #size-cells =3D <0>; --=20 2.52.0 From nobody Mon Feb 9 02:07:48 2026 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id C001236EA9C; Tue, 27 Jan 2026 20:18:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769545104; cv=none; b=XUT6sEvnUY8nzsKFzp4sNMW1IIM53I290FZ3ZKsrhrOuDKTdLJch/7TiRrlZzf1/lw+BNJFIpMUap4rk0rPw+ZV4GoNbpqw6a/seuIdIhqxmmhatbRhEUdBiI1c3VjPYswkHMNI1zEZZWqrQ5Kyj/N5iNCFgqXgJKtNtJAF+EbE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769545104; c=relaxed/simple; bh=+iWjfmvsvSOespILsWRHwJCyWJhyy5bKPQjBs10MRK0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=e3K6apga7OkyZjLthQPJ0OcYtW5djHwRXi+cSWe2yuovyM+kKyCU1/TM096o/erq0Ssza9rXa9zoWpgp0ctVY7cv3K8y+gfgEgOIVmsgL9uUpEIB2i5WpmTrcqfkNtrZyrgb4nKODuiFLUqljpBCwhoyPe03/EPInqtuyEz4OWw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: dUHLVLuATp2E5deY37JyNw== X-CSE-MsgGUID: cOgkzrIXQh2ELtGCXDfT9A== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 28 Jan 2026 05:18:16 +0900 Received: from demon-pc.localdomain (unknown [10.226.93.69]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 36B9F40869DB; Wed, 28 Jan 2026 05:18:12 +0900 (JST) From: Cosmin Tanislav To: Fabrizio Castro , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm Cc: linux-spi@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Cosmin Tanislav Subject: [PATCH v2 3/3] arm64: dts: renesas: r9a09g087: wire up DMA support for SPI Date: Tue, 27 Jan 2026 22:17:06 +0200 Message-ID: <20260127201706.616374-4-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260127201706.616374-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20260127201706.616374-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" RZ/N2H (R9A09G087) has three DMA controllers that can be used by peripherals like SPI to offload data transfers from the CPU. Wire up the DMA channels for the SPI peripherals. Signed-off-by: Cosmin Tanislav Reviewed-by: Geert Uytterhoeven --- V2: * wire up all DMA controllers arch/arm64/boot/dts/renesas/r9a09g087.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi b/arch/arm64/boot/d= ts/renesas/r9a09g087.dtsi index 4a1339561332..7d1c669ad262 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g087.dtsi @@ -200,6 +200,10 @@ rspi0: spi@80007000 { clocks =3D <&cpg CPG_CORE R9A09G087_CLK_PCLKM>, <&cpg CPG_MOD 104>; clock-names =3D "pclk", "pclkspi"; + dmas =3D <&dmac0 0x267a>, <&dmac0 0x267b>, + <&dmac1 0x267a>, <&dmac1 0x267b>, + <&dmac2 0x267a>, <&dmac2 0x267b>; + dma-names =3D "rx", "tx", "rx", "tx", "rx", "tx"; power-domains =3D <&cpg>; #address-cells =3D <1>; #size-cells =3D <0>; @@ -218,6 +222,10 @@ rspi1: spi@80007400 { clocks =3D <&cpg CPG_CORE R9A09G087_CLK_PCLKM>, <&cpg CPG_MOD 105>; clock-names =3D "pclk", "pclkspi"; + dmas =3D <&dmac0 0x267f>, <&dmac0 0x2680>, + <&dmac1 0x267f>, <&dmac1 0x2680>, + <&dmac2 0x267f>, <&dmac2 0x2680>; + dma-names =3D "rx", "tx", "rx", "tx", "rx", "tx"; power-domains =3D <&cpg>; #address-cells =3D <1>; #size-cells =3D <0>; @@ -236,6 +244,10 @@ rspi2: spi@80007800 { clocks =3D <&cpg CPG_CORE R9A09G087_CLK_PCLKM>, <&cpg CPG_MOD 106>; clock-names =3D "pclk", "pclkspi"; + dmas =3D <&dmac0 0x2684>, <&dmac0 0x2685>, + <&dmac1 0x2684>, <&dmac1 0x2685>, + <&dmac2 0x2684>, <&dmac2 0x2685>; + dma-names =3D "rx", "tx", "rx", "tx", "rx", "tx"; power-domains =3D <&cpg>; #address-cells =3D <1>; #size-cells =3D <0>; @@ -254,6 +266,10 @@ rspi3: spi@81007000 { clocks =3D <&cpg CPG_CORE R9A09G087_CLK_PCLKM>, <&cpg CPG_MOD 602>; clock-names =3D "pclk", "pclkspi"; + dmas =3D <&dmac0 0x2689>, <&dmac0 0x268a>, + <&dmac1 0x2689>, <&dmac1 0x268a>, + <&dmac2 0x2689>, <&dmac2 0x268a>; + dma-names =3D "rx", "tx", "rx", "tx", "rx", "tx"; power-domains =3D <&cpg>; #address-cells =3D <1>; #size-cells =3D <0>; --=20 2.52.0