From nobody Mon Feb 9 15:25:37 2026 Received: from mail-dl1-f73.google.com (mail-dl1-f73.google.com [74.125.82.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7E10036920E for ; Tue, 27 Jan 2026 18:46:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.125.82.73 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769539571; cv=none; b=TXDYBJvYu7hB6ZpW1TFNRHPuO0Z/ENb+KyiLkgCD8AhUimmzeuVDppN32sVWNAdlY1K/EpXyBhws3Q2G+P0ED8K07u79+rBJxBQ54ETrOCqSzA0i8o9IPIKyCG1w0v2v5GO7ETCPYQCJ41aNgCNaNHmTFCFpvmVh0G0ThnaG5TI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769539571; c=relaxed/simple; bh=jxPbqZjiKeqXjVKXPNpmd0p+gzDjnPXntJAsQ5FCjdo=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Content-Type; b=qJXfiGHK+c8Bbn7W/G52o6jHLiM1YcgAsIdRTQMiLPGvsbG+Mz5dqFebb25TjSI2r6eezLhSq1b0nhE4B2FVae8ElRyB0t47SnL/FkpThWiKhpJQqDw256ru11479nDwd7qFdDU7qFCxxqj7ZMKSAa6UlZSw9xLMMVB0ETW8jRw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--irogers.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=sVuDQXTQ; arc=none smtp.client-ip=74.125.82.73 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--irogers.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="sVuDQXTQ" Received: by mail-dl1-f73.google.com with SMTP id a92af1059eb24-1248da4d2d6so4567222c88.0 for ; Tue, 27 Jan 2026 10:46:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1769539569; x=1770144369; darn=vger.kernel.org; h=to:from:subject:message-id:references:mime-version:in-reply-to:date :from:to:cc:subject:date:message-id:reply-to; bh=fORtvInl785vwPPesserRrCS7Xt/2I1SnOVTrAyhACY=; b=sVuDQXTQRYC1r2YsgmVfokEQie5/rMlefWY/GO11YlORSyza/MyjwsUbJay8YubLZy bPhTrEZ3dwkhRRMpZWYtWSp+EfoPte0zw1f+SWHikMXXtqEY5tZkHwUfG3wf9mymFfF7 uxIZSMtGwRChXxADi8QbvGO5sqOqygGxUQ51yqnkYi05ZEmdt1LaVzUDWT7uE5tN3hJc DZ/VgYigcQas99gtxfCWsthJpDe7v9alg8n9HcxRM+rvy210PZT+rtGrMq5oiBmaF6ko F1ha6pmTubxURxIB8j6Q4KFz+dE1moMBYizWqeUftryEa1vv8EU54zBteNgmFntK6fBE J4Uw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1769539569; x=1770144369; h=to:from:subject:message-id:references:mime-version:in-reply-to:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=fORtvInl785vwPPesserRrCS7Xt/2I1SnOVTrAyhACY=; b=Z5vcMAZ7vUBqZGfR2J3t11J4NnDBYeMo6fT3U4pW7Le7tO5WeLdoJdUY+WS+M39LiX BoDvg/lNegrJwmyQTnNKD+jbBW5eByler6ym/S5rMdhSmKSVl+rvr6pwfaRPTRUqvgJJ DWDx5G8v2S+Y7dt8+0K061sZuFjJQUqzg7AFYxWEBp0+zaXepbBUSOi2LK+jnUXGYJDb NqulojcES4XP18jPwUCpSBCcfeoDX6O+Dmsw+no9sjLL/AjdIj3fC0eVoVI4G2aMXyxA fKw6m18KME6XE0gYLV4Xx6yjI4BNvdmhHsY5Fl2fe1WjBMl5lmN2j5EhQYSHOnvgrlPO 3GZg== X-Forwarded-Encrypted: i=1; AJvYcCV6nyiDzftpQcwCm2B4W4T3KDUKP9Yhj71Kfvwgv4rJKwPLiVAb57fWesLQ7aFf9nCYEav2R0+YCsxyDuY=@vger.kernel.org X-Gm-Message-State: AOJu0YzeOzPPB58krS7E/rto/FgGNs8xv1NRH/sAlYr01VQfuJurVXrZ FhSCpW+b6dtxtt677pdGIIGid2pfwA98kU3Vx7qE1JD7SV6BgjflcyQizt4HpgCcpUqEsazzj0Q YADtACZa2nw== X-Received: from dlg33.prod.google.com ([2002:a05:7022:7a1:b0:11d:cf4c:62ab]) (user=irogers job=prod-delivery.src-stubby-dispatcher) by 2002:a05:7022:6b99:b0:11b:a36d:a7f7 with SMTP id a92af1059eb24-124a009996amr1475905c88.16.1769539568559; Tue, 27 Jan 2026 10:46:08 -0800 (PST) Date: Tue, 27 Jan 2026 10:44:53 -0800 In-Reply-To: <20260127184506.3059493-1-irogers@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260127184506.3059493-1-irogers@google.com> X-Mailer: git-send-email 2.52.0.457.g6b5491de43-goog Message-ID: <20260127184506.3059493-23-irogers@google.com> Subject: [PATCH v11 22/35] perf jevents: Add load store breakdown metrics ldst for Intel From: Ian Rogers To: Adrian Hunter , Alexander Shishkin , Arnaldo Carvalho de Melo , Benjamin Gray , Caleb Biggers , Edward Baker , Ian Rogers , Ingo Molnar , James Clark , Jing Zhang , Jiri Olsa , John Garry , Leo Yan , Namhyung Kim , Perry Taylor , Peter Zijlstra , Sandipan Das , Thomas Falcon , Weilin Wang , Xu Yang , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Give breakdown of number of instructions. Use the counter mask (cmask) to show the number of cycles taken to retire the instructions. Tested-by: Thomas Falcon Signed-off-by: Ian Rogers --- tools/perf/pmu-events/intel_metrics.py | 87 +++++++++++++++++++++++++- 1 file changed, 86 insertions(+), 1 deletion(-) diff --git a/tools/perf/pmu-events/intel_metrics.py b/tools/perf/pmu-events= /intel_metrics.py index d190d97f4aff..19a284b4c520 100755 --- a/tools/perf/pmu-events/intel_metrics.py +++ b/tools/perf/pmu-events/intel_metrics.py @@ -8,7 +8,7 @@ import re from typing import Optional from metric import (d_ratio, has_event, max, CheckPmu, Event, JsonEncodeMe= tric, JsonEncodeMetricGroupDescriptions, Literal, LoadEvents, - Metric, MetricGroup, MetricRef, Select) + Metric, MetricConstraint, MetricGroup, MetricRef, Sele= ct) =20 # Global command line arguments. _args =3D None @@ -525,6 +525,90 @@ def IntelSwpf() -> Optional[MetricGroup]: ], description=3D"Software prefetch instruction breakdown") =20 =20 +def IntelLdSt() -> Optional[MetricGroup]: + if _args.model in [ + "bonnell", + "nehalemep", + "nehalemex", + "westmereep-dp", + "westmereep-sp", + "westmereex", + ]: + return None + LDST_LD =3D Event("MEM_INST_RETIRED.ALL_LOADS", "MEM_UOPS_RETIRED.ALL_= LOADS") + LDST_ST =3D Event("MEM_INST_RETIRED.ALL_STORES", + "MEM_UOPS_RETIRED.ALL_STORES") + LDST_LDC1 =3D Event(f"{LDST_LD.name}/cmask=3D1/") + LDST_STC1 =3D Event(f"{LDST_ST.name}/cmask=3D1/") + LDST_LDC2 =3D Event(f"{LDST_LD.name}/cmask=3D2/") + LDST_STC2 =3D Event(f"{LDST_ST.name}/cmask=3D2/") + LDST_LDC3 =3D Event(f"{LDST_LD.name}/cmask=3D3/") + LDST_STC3 =3D Event(f"{LDST_ST.name}/cmask=3D3/") + ins =3D Event("instructions") + LDST_CYC =3D Event("CPU_CLK_UNHALTED.THREAD", + "CPU_CLK_UNHALTED.CORE_P", + "CPU_CLK_UNHALTED.THREAD_P") + LDST_PRE =3D None + try: + LDST_PRE =3D Event("LOAD_HIT_PREFETCH.SWPF", "LOAD_HIT_PRE.SW_PF") + except: + pass + LDST_AT =3D None + try: + LDST_AT =3D Event("MEM_INST_RETIRED.LOCK_LOADS") + except: + pass + cyc =3D LDST_CYC + + ld_rate =3D d_ratio(LDST_LD, interval_sec) + st_rate =3D d_ratio(LDST_ST, interval_sec) + pf_rate =3D d_ratio(LDST_PRE, interval_sec) if LDST_PRE else None + at_rate =3D d_ratio(LDST_AT, interval_sec) if LDST_AT else None + + ldst_ret_constraint =3D MetricConstraint.GROUPED_EVENTS + if LDST_LD.name =3D=3D "MEM_UOPS_RETIRED.ALL_LOADS": + ldst_ret_constraint =3D MetricConstraint.NO_GROUP_EVENTS_NMI + + return MetricGroup("lpm_ldst", [ + MetricGroup("lpm_ldst_total", [ + Metric("lpm_ldst_total_loads", "Load/store instructions total = loads", + ld_rate, "loads"), + Metric("lpm_ldst_total_stores", "Load/store instructions total= stores", + st_rate, "stores"), + ]), + MetricGroup("lpm_ldst_prcnt", [ + Metric("lpm_ldst_prcnt_loads", "Percent of all instructions th= at are loads", + d_ratio(LDST_LD, ins), "100%"), + Metric("lpm_ldst_prcnt_stores", "Percent of all instructions t= hat are stores", + d_ratio(LDST_ST, ins), "100%"), + ]), + MetricGroup("lpm_ldst_ret_lds", [ + Metric("lpm_ldst_ret_lds_1", "Retired loads in 1 cycle", + d_ratio(max(LDST_LDC1 - LDST_LDC2, 0), cyc), "100%", + constraint=3Dldst_ret_constraint), + Metric("lpm_ldst_ret_lds_2", "Retired loads in 2 cycles", + d_ratio(max(LDST_LDC2 - LDST_LDC3, 0), cyc), "100%", + constraint=3Dldst_ret_constraint), + Metric("lpm_ldst_ret_lds_3", "Retired loads in 3 or more cycle= s", + d_ratio(LDST_LDC3, cyc), "100%"), + ]), + MetricGroup("lpm_ldst_ret_sts", [ + Metric("lpm_ldst_ret_sts_1", "Retired stores in 1 cycle", + d_ratio(max(LDST_STC1 - LDST_STC2, 0), cyc), "100%", + constraint=3Dldst_ret_constraint), + Metric("lpm_ldst_ret_sts_2", "Retired stores in 2 cycles", + d_ratio(max(LDST_STC2 - LDST_STC3, 0), cyc), "100%", + constraint=3Dldst_ret_constraint), + Metric("lpm_ldst_ret_sts_3", "Retired stores in 3 more cycles", + d_ratio(LDST_STC3, cyc), "100%"), + ]), + Metric("lpm_ldst_ld_hit_swpf", "Load hit software prefetches per s= econd", + pf_rate, "swpf/s") if pf_rate else None, + Metric("lpm_ldst_atomic_lds", "Atomic loads per second", + at_rate, "loads/s") if at_rate else None, + ], description=3D"Breakdown of load/store instructions") + + def main() -> None: global _args =20 @@ -556,6 +640,7 @@ def main() -> None: Tsx(), IntelBr(), IntelL2(), + IntelLdSt(), IntelPorts(), IntelSwpf(), ]) --=20 2.52.0.457.g6b5491de43-goog