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Tue, 27 Jan 2026 01:57:43 -0800 (PST) From: Neil Armstrong Date: Tue, 27 Jan 2026 10:57:29 +0100 Subject: [PATCH v2 2/7] pci: pwrctrl: add PCI pwrctrl driver for the UPD720201/UPD720202 USB 3.0 xHCI Host Controller Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260127-topic-sm8650-ayaneo-pocket-s2-base-v2-2-c55ec1b5d8bf@linaro.org> References: <20260127-topic-sm8650-ayaneo-pocket-s2-base-v2-0-c55ec1b5d8bf@linaro.org> In-Reply-To: <20260127-topic-sm8650-ayaneo-pocket-s2-base-v2-0-c55ec1b5d8bf@linaro.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Greg Kroah-Hartman , Geert Uytterhoeven , Magnus Damm , Bartosz Golaszewski , Manivannan Sadhasivam , Bjorn Helgaas Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-usb@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-pci@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Add support fo the Renesas UPD720201/UPD720202 USB 3.0 xHCI Host Controller power control which connects over PCIe and requires specific power supplies to start up. Signed-off-by: Neil Armstrong Reviewed-by: Bartosz Golaszewski --- drivers/pci/pwrctrl/Kconfig | 10 ++++ drivers/pci/pwrctrl/Makefile | 2 + drivers/pci/pwrctrl/pci-pwrctrl-upd720201.c | 88 +++++++++++++++++++++++++= ++++ 3 files changed, 100 insertions(+) diff --git a/drivers/pci/pwrctrl/Kconfig b/drivers/pci/pwrctrl/Kconfig index e0f999f299bb..5a94e60d0d3e 100644 --- a/drivers/pci/pwrctrl/Kconfig +++ b/drivers/pci/pwrctrl/Kconfig @@ -11,6 +11,16 @@ config PCI_PWRCTRL_PWRSEQ select POWER_SEQUENCING select PCI_PWRCTRL =20 +config PCI_PWRCTRL_UPD720201 + tristate "PCI Power Control driver for the UPD720201 USB3 Host Controller" + select PCI_PWRCTRL + help + Say Y here to enable the PCI Power Control driver of the UPD720201 + USB3 Host Controller. + + The voltage regulators powering the rails of the PCI slots + are expected to be defined in the devicetree node of the PCI device. + config PCI_PWRCTRL_SLOT tristate "PCI Power Control driver for PCI slots" select PCI_PWRCTRL diff --git a/drivers/pci/pwrctrl/Makefile b/drivers/pci/pwrctrl/Makefile index 13b02282106c..a99f85de8a3d 100644 --- a/drivers/pci/pwrctrl/Makefile +++ b/drivers/pci/pwrctrl/Makefile @@ -5,6 +5,8 @@ pci-pwrctrl-core-y :=3D core.o =20 obj-$(CONFIG_PCI_PWRCTRL_PWRSEQ) +=3D pci-pwrctrl-pwrseq.o =20 +obj-$(CONFIG_PCI_PWRCTRL_UPD720201) +=3D pci-pwrctrl-upd720201.o + obj-$(CONFIG_PCI_PWRCTRL_SLOT) +=3D pci-pwrctrl-slot.o pci-pwrctrl-slot-y :=3D slot.o =20 diff --git a/drivers/pci/pwrctrl/pci-pwrctrl-upd720201.c b/drivers/pci/pwrc= trl/pci-pwrctrl-upd720201.c new file mode 100644 index 000000000000..db96bbb69c21 --- /dev/null +++ b/drivers/pci/pwrctrl/pci-pwrctrl-upd720201.c @@ -0,0 +1,88 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Based on upd720201.c: + * Copyright (C) 2024 Linaro Ltd. + * Author: Manivannan Sadhasivam + */ + +#include +#include +#include +#include +#include +#include +#include + +struct pci_pwrctrl_upd720201_data { + struct pci_pwrctrl ctx; + struct regulator_bulk_data *supplies; + int num_supplies; +}; + +static void devm_pci_pwrctrl_upd720201_power_off(void *data) +{ + struct pci_pwrctrl_upd720201_data *upd720201 =3D data; + + regulator_bulk_disable(upd720201->num_supplies, upd720201->supplies); + regulator_bulk_free(upd720201->num_supplies, upd720201->supplies); +} + +static int pci_pwrctrl_upd720201_probe(struct platform_device *pdev) +{ + struct pci_pwrctrl_upd720201_data *upd720201; + struct device *dev =3D &pdev->dev; + int ret; + + upd720201 =3D devm_kzalloc(dev, sizeof(*upd720201), GFP_KERNEL); + if (!upd720201) + return -ENOMEM; + + ret =3D of_regulator_bulk_get_all(dev, dev_of_node(dev), + &upd720201->supplies); + if (ret < 0) { + dev_err_probe(dev, ret, "Failed to get upd720201 regulators\n"); + return ret; + } + + upd720201->num_supplies =3D ret; + ret =3D regulator_bulk_enable(upd720201->num_supplies, upd720201->supplie= s); + if (ret < 0) { + dev_err_probe(dev, ret, "Failed to enable upd720201 regulators\n"); + regulator_bulk_free(upd720201->num_supplies, upd720201->supplies); + return ret; + } + + ret =3D devm_add_action_or_reset(dev, devm_pci_pwrctrl_upd720201_power_of= f, + upd720201); + if (ret) + return ret; + + pci_pwrctrl_init(&upd720201->ctx, dev); + + ret =3D devm_pci_pwrctrl_device_set_ready(dev, &upd720201->ctx); + if (ret) + return dev_err_probe(dev, ret, "Failed to register pwrctrl driver\n"); + + return 0; +} + +static const struct of_device_id pci_pwrctrl_upd720201_of_match[] =3D { + { + .compatible =3D "pci1912,0014", + }, + { } +}; +MODULE_DEVICE_TABLE(of, pci_pwrctrl_upd720201_of_match); + +static struct platform_driver pci_pwrctrl_upd720201_driver =3D { + .driver =3D { + .name =3D "pci-pwrctrl-upd720201", + .of_match_table =3D pci_pwrctrl_upd720201_of_match, + }, + .probe =3D pci_pwrctrl_upd720201_probe, +}; +module_platform_driver(pci_pwrctrl_upd720201_driver); + +MODULE_AUTHOR("Neil Armstrong "); +MODULE_DESCRIPTION("PCI Power Control driver for UPD720201 USB3 Host Contr= oller"); +MODULE_LICENSE("GPL"); --=20 2.34.1