From nobody Mon Feb 9 22:39:03 2026 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B312435F8C5 for ; Tue, 27 Jan 2026 14:40:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769524819; cv=none; b=Btas3o9xkAF3zBcScS4mRy8gX1ok5d6EZVfRyq+xNS2q6ZFL/JphXOWWre+0NX8VxZ4NhBM9RNjPhMWz5p+oyFf21pwlronQtdF7wjU+JM4iNA8782cAjQqP9fwCdocoCaxo8eEWVi8polnNOGEOrPGIhY8XiMkbVu6uSKI1I3M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769524819; c=relaxed/simple; bh=DyomiX0gnvea6msBK8tQG5M3tCc+c31/ZoGYJN66V30=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=KCziBrRyk/CG2dphHPHOVu5hPQ+UaLilrnHspLcOWOEs7yr9bvtG7FX1qfEfRq59M5ZlcvezrfwXKKHC0mYWpH16kEpf3i3UtO4dupugAvrOuJMkrywn9JeKJ4l86O5iS+p2nsms5e661W8B49HxAoX+oKcpc30VMzisN152NH0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de; spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.201.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from ptz.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::77] helo=peter.mobile.pengutronix.de) by metis.whiteo.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1vkkEp-0007YT-9B; Tue, 27 Jan 2026 15:40:15 +0100 From: =?utf-8?q?Sven_P=C3=BCschel?= Date: Tue, 27 Jan 2026 15:39:19 +0100 Subject: [PATCH v3 10/27] media: rockchip: rga: move hw specific parts to a dedicated struct Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260127-spu-rga3-v3-10-77b273067beb@pengutronix.de> References: <20260127-spu-rga3-v3-0-77b273067beb@pengutronix.de> In-Reply-To: <20260127-spu-rga3-v3-0-77b273067beb@pengutronix.de> To: Jacob Chen , Ezequiel Garcia , Mauro Carvalho Chehab , Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kernel@pengutronix.de, =?utf-8?q?Sven_P=C3=BCschel?= , Nicolas Dufresne X-Mailer: b4 0.14.3 X-SA-Exim-Connect-IP: 2a0a:edc0:0:900:1d::77 X-SA-Exim-Mail-From: s.pueschel@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org In preparation for the RGA3 unit, move RGA2 specific parts from rga.c to rga-hw.c and create a struct to reference the RGA2 specific functions and formats. This also allows to remove the rga-hw.h reference from the include list of the rga driver. Also document the command finish interrupt with a dedicated define. Reviewed-by: Nicolas Dufresne Signed-off-by: Sven P=C3=BCschel --- drivers/media/platform/rockchip/rga/rga-hw.c | 166 ++++++++++++++++++++- drivers/media/platform/rockchip/rga/rga-hw.h | 5 +- drivers/media/platform/rockchip/rga/rga.c | 211 +++++------------------= ---- drivers/media/platform/rockchip/rga/rga.h | 23 ++- 4 files changed, 227 insertions(+), 178 deletions(-) diff --git a/drivers/media/platform/rockchip/rga/rga-hw.c b/drivers/media/p= latform/rockchip/rga/rga-hw.c index f1d5237472941..c0218a71fee04 100644 --- a/drivers/media/platform/rockchip/rga/rga-hw.c +++ b/drivers/media/platform/rockchip/rga/rga-hw.c @@ -437,8 +437,8 @@ static void rga_cmd_set(struct rga_ctx *ctx, PAGE_SIZE, DMA_BIDIRECTIONAL); } =20 -void rga_hw_start(struct rockchip_rga *rga, - struct rga_vb_buffer *src, struct rga_vb_buffer *dst) +static void rga_hw_start(struct rockchip_rga *rga, + struct rga_vb_buffer *src, struct rga_vb_buffer *dst) { struct rga_ctx *ctx =3D rga->curr; =20 @@ -452,3 +452,165 @@ void rga_hw_start(struct rockchip_rga *rga, =20 rga_write(rga, RGA_CMD_CTRL, 0x1); } + +static bool rga_handle_irq(struct rockchip_rga *rga) +{ + int intr; + + intr =3D rga_read(rga, RGA_INT) & 0xf; + + rga_mod(rga, RGA_INT, intr << 4, 0xf << 4); + + return intr & RGA_INT_COMMAND_FINISHED; +} + +static void rga_get_version(struct rockchip_rga *rga) +{ + rga->version.major =3D (rga_read(rga, RGA_VERSION_INFO) >> 24) & 0xFF; + rga->version.minor =3D (rga_read(rga, RGA_VERSION_INFO) >> 20) & 0x0F; +} + +static struct rga_fmt formats[] =3D { + { + .fourcc =3D V4L2_PIX_FMT_ARGB32, + .color_swap =3D RGA_COLOR_ALPHA_SWAP, + .hw_format =3D RGA_COLOR_FMT_ABGR8888, + .depth =3D 32, + .y_div =3D 1, + .x_div =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_ABGR32, + .color_swap =3D RGA_COLOR_RB_SWAP, + .hw_format =3D RGA_COLOR_FMT_ABGR8888, + .depth =3D 32, + .y_div =3D 1, + .x_div =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_XBGR32, + .color_swap =3D RGA_COLOR_RB_SWAP, + .hw_format =3D RGA_COLOR_FMT_XBGR8888, + .depth =3D 32, + .y_div =3D 1, + .x_div =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_RGB24, + .color_swap =3D RGA_COLOR_NONE_SWAP, + .hw_format =3D RGA_COLOR_FMT_RGB888, + .depth =3D 24, + .y_div =3D 1, + .x_div =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_BGR24, + .color_swap =3D RGA_COLOR_RB_SWAP, + .hw_format =3D RGA_COLOR_FMT_RGB888, + .depth =3D 24, + .y_div =3D 1, + .x_div =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_ARGB444, + .color_swap =3D RGA_COLOR_RB_SWAP, + .hw_format =3D RGA_COLOR_FMT_ABGR4444, + .depth =3D 16, + .y_div =3D 1, + .x_div =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_ARGB555, + .color_swap =3D RGA_COLOR_RB_SWAP, + .hw_format =3D RGA_COLOR_FMT_ABGR1555, + .depth =3D 16, + .y_div =3D 1, + .x_div =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_RGB565, + .color_swap =3D RGA_COLOR_RB_SWAP, + .hw_format =3D RGA_COLOR_FMT_BGR565, + .depth =3D 16, + .y_div =3D 1, + .x_div =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_NV21, + .color_swap =3D RGA_COLOR_UV_SWAP, + .hw_format =3D RGA_COLOR_FMT_YUV420SP, + .depth =3D 12, + .y_div =3D 2, + .x_div =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_NV61, + .color_swap =3D RGA_COLOR_UV_SWAP, + .hw_format =3D RGA_COLOR_FMT_YUV422SP, + .depth =3D 16, + .y_div =3D 1, + .x_div =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_NV12, + .color_swap =3D RGA_COLOR_NONE_SWAP, + .hw_format =3D RGA_COLOR_FMT_YUV420SP, + .depth =3D 12, + .y_div =3D 2, + .x_div =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_NV12M, + .color_swap =3D RGA_COLOR_NONE_SWAP, + .hw_format =3D RGA_COLOR_FMT_YUV420SP, + .depth =3D 12, + .y_div =3D 2, + .x_div =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_NV16, + .color_swap =3D RGA_COLOR_NONE_SWAP, + .hw_format =3D RGA_COLOR_FMT_YUV422SP, + .depth =3D 16, + .y_div =3D 1, + .x_div =3D 1, + }, + { + .fourcc =3D V4L2_PIX_FMT_YUV420, + .color_swap =3D RGA_COLOR_NONE_SWAP, + .hw_format =3D RGA_COLOR_FMT_YUV420P, + .depth =3D 12, + .y_div =3D 2, + .x_div =3D 2, + }, + { + .fourcc =3D V4L2_PIX_FMT_YUV422P, + .color_swap =3D RGA_COLOR_NONE_SWAP, + .hw_format =3D RGA_COLOR_FMT_YUV422P, + .depth =3D 16, + .y_div =3D 1, + .x_div =3D 2, + }, + { + .fourcc =3D V4L2_PIX_FMT_YVU420, + .color_swap =3D RGA_COLOR_UV_SWAP, + .hw_format =3D RGA_COLOR_FMT_YUV420P, + .depth =3D 12, + .y_div =3D 2, + .x_div =3D 2, + }, +}; + +const struct rga_hw rga2_hw =3D { + .formats =3D formats, + .num_formats =3D ARRAY_SIZE(formats), + .cmdbuf_size =3D RGA_CMDBUF_SIZE, + .min_width =3D MIN_WIDTH, + .max_width =3D MAX_WIDTH, + .min_height =3D MIN_HEIGHT, + .max_height =3D MAX_HEIGHT, + + .start =3D rga_hw_start, + .handle_irq =3D rga_handle_irq, + .get_version =3D rga_get_version, +}; diff --git a/drivers/media/platform/rockchip/rga/rga-hw.h b/drivers/media/p= latform/rockchip/rga/rga-hw.h index cc6bd7f5b0300..f4752aa823051 100644 --- a/drivers/media/platform/rockchip/rga/rga-hw.h +++ b/drivers/media/platform/rockchip/rga/rga-hw.h @@ -15,9 +15,6 @@ #define MIN_WIDTH 34 #define MIN_HEIGHT 34 =20 -#define DEFAULT_WIDTH 100 -#define DEFAULT_HEIGHT 100 - #define RGA_TIMEOUT 500 =20 /* Registers address */ @@ -178,6 +175,8 @@ #define RGA_ALPHA_COLOR_NORMAL 0 #define RGA_ALPHA_COLOR_MULTIPLY_CAL 1 =20 +#define RGA_INT_COMMAND_FINISHED 4 + /* Registers union */ union rga_mode_ctrl { unsigned int val; diff --git a/drivers/media/platform/rockchip/rga/rga.c b/drivers/media/plat= form/rockchip/rga/rga.c index cf9d5702598fa..21a3c6cd38dbc 100644 --- a/drivers/media/platform/rockchip/rga/rga.c +++ b/drivers/media/platform/rockchip/rga/rga.c @@ -25,7 +25,6 @@ #include #include =20 -#include "rga-hw.h" #include "rga.h" =20 static int debug; @@ -47,7 +46,7 @@ static void device_run(void *prv) =20 dst =3D v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); =20 - rga_hw_start(rga, vb_to_rga(src), vb_to_rga(dst)); + rga->hw->start(rga, vb_to_rga(src), vb_to_rga(dst)); =20 spin_unlock_irqrestore(&rga->ctrl_lock, flags); } @@ -55,13 +54,8 @@ static void device_run(void *prv) static irqreturn_t rga_isr(int irq, void *prv) { struct rockchip_rga *rga =3D prv; - int intr; =20 - intr =3D rga_read(rga, RGA_INT) & 0xf; - - rga_mod(rga, RGA_INT, intr << 4, 0xf << 4); - - if (intr & 0x04) { + if (rga->hw->handle_irq(rga)) { struct vb2_v4l2_buffer *src, *dst; struct rga_ctx *ctx =3D rga->curr; =20 @@ -184,158 +178,17 @@ static int rga_setup_ctrls(struct rga_ctx *ctx) return 0; } =20 -static struct rga_fmt formats[] =3D { - { - .fourcc =3D V4L2_PIX_FMT_ARGB32, - .color_swap =3D RGA_COLOR_ALPHA_SWAP, - .hw_format =3D RGA_COLOR_FMT_ABGR8888, - .depth =3D 32, - .y_div =3D 1, - .x_div =3D 1, - }, - { - .fourcc =3D V4L2_PIX_FMT_ABGR32, - .color_swap =3D RGA_COLOR_RB_SWAP, - .hw_format =3D RGA_COLOR_FMT_ABGR8888, - .depth =3D 32, - .y_div =3D 1, - .x_div =3D 1, - }, - { - .fourcc =3D V4L2_PIX_FMT_XBGR32, - .color_swap =3D RGA_COLOR_RB_SWAP, - .hw_format =3D RGA_COLOR_FMT_XBGR8888, - .depth =3D 32, - .y_div =3D 1, - .x_div =3D 1, - }, - { - .fourcc =3D V4L2_PIX_FMT_RGB24, - .color_swap =3D RGA_COLOR_NONE_SWAP, - .hw_format =3D RGA_COLOR_FMT_RGB888, - .depth =3D 24, - .y_div =3D 1, - .x_div =3D 1, - }, - { - .fourcc =3D V4L2_PIX_FMT_BGR24, - .color_swap =3D RGA_COLOR_RB_SWAP, - .hw_format =3D RGA_COLOR_FMT_RGB888, - .depth =3D 24, - .y_div =3D 1, - .x_div =3D 1, - }, - { - .fourcc =3D V4L2_PIX_FMT_ARGB444, - .color_swap =3D RGA_COLOR_RB_SWAP, - .hw_format =3D RGA_COLOR_FMT_ABGR4444, - .depth =3D 16, - .y_div =3D 1, - .x_div =3D 1, - }, - { - .fourcc =3D V4L2_PIX_FMT_ARGB555, - .color_swap =3D RGA_COLOR_RB_SWAP, - .hw_format =3D RGA_COLOR_FMT_ABGR1555, - .depth =3D 16, - .y_div =3D 1, - .x_div =3D 1, - }, - { - .fourcc =3D V4L2_PIX_FMT_RGB565, - .color_swap =3D RGA_COLOR_RB_SWAP, - .hw_format =3D RGA_COLOR_FMT_BGR565, - .depth =3D 16, - .y_div =3D 1, - .x_div =3D 1, - }, - { - .fourcc =3D V4L2_PIX_FMT_NV21, - .color_swap =3D RGA_COLOR_UV_SWAP, - .hw_format =3D RGA_COLOR_FMT_YUV420SP, - .depth =3D 12, - .y_div =3D 2, - .x_div =3D 1, - }, - { - .fourcc =3D V4L2_PIX_FMT_NV61, - .color_swap =3D RGA_COLOR_UV_SWAP, - .hw_format =3D RGA_COLOR_FMT_YUV422SP, - .depth =3D 16, - .y_div =3D 1, - .x_div =3D 1, - }, - { - .fourcc =3D V4L2_PIX_FMT_NV12, - .color_swap =3D RGA_COLOR_NONE_SWAP, - .hw_format =3D RGA_COLOR_FMT_YUV420SP, - .depth =3D 12, - .y_div =3D 2, - .x_div =3D 1, - }, - { - .fourcc =3D V4L2_PIX_FMT_NV12M, - .color_swap =3D RGA_COLOR_NONE_SWAP, - .hw_format =3D RGA_COLOR_FMT_YUV420SP, - .depth =3D 12, - .y_div =3D 2, - .x_div =3D 1, - }, - { - .fourcc =3D V4L2_PIX_FMT_NV16, - .color_swap =3D RGA_COLOR_NONE_SWAP, - .hw_format =3D RGA_COLOR_FMT_YUV422SP, - .depth =3D 16, - .y_div =3D 1, - .x_div =3D 1, - }, - { - .fourcc =3D V4L2_PIX_FMT_YUV420, - .color_swap =3D RGA_COLOR_NONE_SWAP, - .hw_format =3D RGA_COLOR_FMT_YUV420P, - .depth =3D 12, - .y_div =3D 2, - .x_div =3D 2, - }, - { - .fourcc =3D V4L2_PIX_FMT_YUV422P, - .color_swap =3D RGA_COLOR_NONE_SWAP, - .hw_format =3D RGA_COLOR_FMT_YUV422P, - .depth =3D 16, - .y_div =3D 1, - .x_div =3D 2, - }, - { - .fourcc =3D V4L2_PIX_FMT_YVU420, - .color_swap =3D RGA_COLOR_UV_SWAP, - .hw_format =3D RGA_COLOR_FMT_YUV420P, - .depth =3D 12, - .y_div =3D 2, - .x_div =3D 2, - }, -}; - -#define NUM_FORMATS ARRAY_SIZE(formats) - -static struct rga_fmt *rga_fmt_find(u32 pixelformat) +static struct rga_fmt *rga_fmt_find(struct rockchip_rga *rga, u32 pixelfor= mat) { unsigned int i; =20 - for (i =3D 0; i < NUM_FORMATS; i++) { - if (formats[i].fourcc =3D=3D pixelformat) - return &formats[i]; + for (i =3D 0; i < rga->hw->num_formats; i++) { + if (rga->hw->formats[i].fourcc =3D=3D pixelformat) + return &rga->hw->formats[i]; } return NULL; } =20 -static struct rga_frame def_frame =3D { - .crop.left =3D 0, - .crop.top =3D 0, - .crop.width =3D DEFAULT_WIDTH, - .crop.height =3D DEFAULT_HEIGHT, - .fmt =3D &formats[0], -}; - struct rga_frame *rga_get_frame(struct rga_ctx *ctx, enum v4l2_buf_type ty= pe) { if (V4L2_TYPE_IS_OUTPUT(type)) @@ -350,6 +203,18 @@ static int rga_open(struct file *file) struct rockchip_rga *rga =3D video_drvdata(file); struct rga_ctx *ctx =3D NULL; int ret =3D 0; + u32 def_width =3D clamp(DEFAULT_WIDTH, rga->hw->min_width, rga->hw->max_w= idth); + u32 def_height =3D clamp(DEFAULT_HEIGHT, rga->hw->min_height, rga->hw->ma= x_height); + struct rga_frame def_frame =3D { + .crop.left =3D 0, + .crop.top =3D 0, + .crop.width =3D def_width, + .crop.height =3D def_height, + .fmt =3D &rga->hw->formats[0], + }; + + def_frame.stride =3D (def_width * def_frame.fmt->depth) >> 3; + def_frame.size =3D def_frame.stride * def_height; =20 ctx =3D kzalloc(sizeof(*ctx), GFP_KERNEL); if (!ctx) @@ -360,9 +225,9 @@ static int rga_open(struct file *file) ctx->out =3D def_frame; =20 v4l2_fill_pixfmt_mp(&ctx->in.pix, - ctx->in.fmt->fourcc, DEFAULT_WIDTH, DEFAULT_HEIGHT); + ctx->in.fmt->fourcc, def_width, def_height); v4l2_fill_pixfmt_mp(&ctx->out.pix, - ctx->out.fmt->fourcc, DEFAULT_WIDTH, DEFAULT_HEIGHT); + ctx->out.fmt->fourcc, def_width, def_height); =20 if (mutex_lock_interruptible(&rga->mutex)) { kfree(ctx); @@ -429,12 +294,13 @@ vidioc_querycap(struct file *file, void *priv, struct= v4l2_capability *cap) =20 static int vidioc_enum_fmt(struct file *file, void *priv, struct v4l2_fmtd= esc *f) { + struct rockchip_rga *rga =3D video_drvdata(file); struct rga_fmt *fmt; =20 - if (f->index >=3D NUM_FORMATS) + if (f->index >=3D rga->hw->num_formats) return -EINVAL; =20 - fmt =3D &formats[f->index]; + fmt =3D &rga->hw->formats[f->index]; f->pixelformat =3D fmt->fourcc; =20 if (f->type !=3D V4L2_BUF_TYPE_VIDEO_CAPTURE && @@ -469,6 +335,7 @@ static int vidioc_try_fmt(struct file *file, void *priv= , struct v4l2_format *f) { struct v4l2_pix_format_mplane *pix_fmt =3D &f->fmt.pix_mp; struct rga_ctx *ctx =3D file_to_rga_ctx(file); + const struct rga_hw *hw =3D ctx->rga->hw; struct rga_fmt *fmt; =20 if (V4L2_TYPE_IS_CAPTURE(f->type)) { @@ -487,14 +354,14 @@ static int vidioc_try_fmt(struct file *file, void *pr= iv, struct v4l2_format *f) pix_fmt->xfer_func =3D frm->pix.xfer_func; } =20 - fmt =3D rga_fmt_find(pix_fmt->pixelformat); + fmt =3D rga_fmt_find(ctx->rga, pix_fmt->pixelformat); if (!fmt) - fmt =3D &formats[0]; + fmt =3D &hw->formats[0]; =20 pix_fmt->width =3D clamp(pix_fmt->width, - (u32)MIN_WIDTH, (u32)MAX_WIDTH); + hw->min_width, hw->max_width); pix_fmt->height =3D clamp(pix_fmt->height, - (u32)MIN_HEIGHT, (u32)MAX_HEIGHT); + hw->min_height, hw->max_height); =20 v4l2_fill_pixfmt_mp(pix_fmt, fmt->fourcc, pix_fmt->width, pix_fmt->height= ); pix_fmt->field =3D V4L2_FIELD_NONE; @@ -529,7 +396,7 @@ static int vidioc_s_fmt(struct file *file, void *priv, = struct v4l2_format *f) frm->size =3D 0; for (i =3D 0; i < pix_fmt->num_planes; i++) frm->size +=3D pix_fmt->plane_fmt[i].sizeimage; - frm->fmt =3D rga_fmt_find(pix_fmt->pixelformat); + frm->fmt =3D rga_fmt_find(rga, pix_fmt->pixelformat); frm->stride =3D pix_fmt->plane_fmt[0].bytesperline; =20 /* @@ -660,7 +527,7 @@ static int vidioc_s_selection(struct file *file, void *= priv, =20 if (s->r.left + s->r.width > f->pix.width || s->r.top + s->r.height > f->pix.height || - s->r.width < MIN_WIDTH || s->r.height < MIN_HEIGHT) { + s->r.width < rga->hw->min_width || s->r.height < rga->hw->min_height)= { v4l2_dbg(debug, 1, &rga->v4l2_dev, "unsupported crop value.\n"); return -EINVAL; } @@ -770,6 +637,10 @@ static int rga_probe(struct platform_device *pdev) if (!rga) return -ENOMEM; =20 + rga->hw =3D of_device_get_match_data(&pdev->dev); + if (!rga->hw) + return dev_err_probe(&pdev->dev, -ENODEV, "failed to get match data\n"); + rga->dev =3D &pdev->dev; spin_lock_init(&rga->ctrl_lock); mutex_init(&rga->mutex); @@ -833,8 +704,7 @@ static int rga_probe(struct platform_device *pdev) if (ret < 0) goto rel_m2m; =20 - rga->version.major =3D (rga_read(rga, RGA_VERSION_INFO) >> 24) & 0xFF; - rga->version.minor =3D (rga_read(rga, RGA_VERSION_INFO) >> 20) & 0x0F; + rga->hw->get_version(rga); =20 v4l2_info(&rga->v4l2_dev, "HW Version: 0x%02x.%02x\n", rga->version.major, rga->version.minor); @@ -842,7 +712,7 @@ static int rga_probe(struct platform_device *pdev) pm_runtime_put(rga->dev); =20 /* Create CMD buffer */ - rga->cmdbuf_virt =3D dma_alloc_attrs(rga->dev, RGA_CMDBUF_SIZE, + rga->cmdbuf_virt =3D dma_alloc_attrs(rga->dev, rga->hw->cmdbuf_size, &rga->cmdbuf_phy, GFP_KERNEL, DMA_ATTR_WRITE_COMBINE); if (!rga->cmdbuf_virt) { @@ -850,9 +720,6 @@ static int rga_probe(struct platform_device *pdev) goto rel_m2m; } =20 - def_frame.stride =3D (DEFAULT_WIDTH * def_frame.fmt->depth) >> 3; - def_frame.size =3D def_frame.stride * DEFAULT_HEIGHT; - ret =3D video_register_device(vfd, VFL_TYPE_VIDEO, -1); if (ret) { v4l2_err(&rga->v4l2_dev, "Failed to register video device\n"); @@ -865,7 +732,7 @@ static int rga_probe(struct platform_device *pdev) return 0; =20 free_dma: - dma_free_attrs(rga->dev, RGA_CMDBUF_SIZE, rga->cmdbuf_virt, + dma_free_attrs(rga->dev, rga->hw->cmdbuf_size, rga->cmdbuf_virt, rga->cmdbuf_phy, DMA_ATTR_WRITE_COMBINE); rel_m2m: v4l2_m2m_release(rga->m2m_dev); @@ -883,7 +750,7 @@ static void rga_remove(struct platform_device *pdev) { struct rockchip_rga *rga =3D platform_get_drvdata(pdev); =20 - dma_free_attrs(rga->dev, RGA_CMDBUF_SIZE, rga->cmdbuf_virt, + dma_free_attrs(rga->dev, rga->hw->cmdbuf_size, rga->cmdbuf_virt, rga->cmdbuf_phy, DMA_ATTR_WRITE_COMBINE); =20 v4l2_info(&rga->v4l2_dev, "Removing\n"); @@ -919,9 +786,11 @@ static const struct dev_pm_ops rga_pm =3D { static const struct of_device_id rockchip_rga_match[] =3D { { .compatible =3D "rockchip,rk3288-rga", + .data =3D &rga2_hw, }, { .compatible =3D "rockchip,rk3399-rga", + .data =3D &rga2_hw, }, {}, }; diff --git a/drivers/media/platform/rockchip/rga/rga.h b/drivers/media/plat= form/rockchip/rga/rga.h index c4a3905a48f0d..640e510285341 100644 --- a/drivers/media/platform/rockchip/rga/rga.h +++ b/drivers/media/platform/rockchip/rga/rga.h @@ -14,6 +14,9 @@ =20 #define RGA_NAME "rockchip-rga" =20 +#define DEFAULT_WIDTH 100 +#define DEFAULT_HEIGHT 100 + struct rga_fmt { u32 fourcc; int depth; @@ -68,6 +71,8 @@ static inline struct rga_ctx *file_to_rga_ctx(struct file= *filp) return container_of(file_to_v4l2_fh(filp), struct rga_ctx, fh); } =20 +struct rga_hw; + struct rockchip_rga { struct v4l2_device v4l2_dev; struct v4l2_m2m_dev *m2m_dev; @@ -88,6 +93,8 @@ struct rockchip_rga { struct rga_ctx *curr; dma_addr_t cmdbuf_phy; void *cmdbuf_virt; + + const struct rga_hw *hw; }; =20 struct rga_addr_offset { @@ -138,7 +145,19 @@ static inline void rga_mod(struct rockchip_rga *rga, u= 32 reg, u32 val, u32 mask) rga_write(rga, reg, temp); }; =20 -void rga_hw_start(struct rockchip_rga *rga, - struct rga_vb_buffer *src, struct rga_vb_buffer *dst); +struct rga_hw { + struct rga_fmt *formats; + u32 num_formats; + size_t cmdbuf_size; + u32 min_width, min_height; + u32 max_width, max_height; + + void (*start)(struct rockchip_rga *rga, + struct rga_vb_buffer *src, struct rga_vb_buffer *dst); + bool (*handle_irq)(struct rockchip_rga *rga); + void (*get_version)(struct rockchip_rga *rga); +}; + +extern const struct rga_hw rga2_hw; =20 #endif --=20 2.52.0