From nobody Sat Feb 7 05:01:29 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CF60336214C; Tue, 27 Jan 2026 17:09:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769533782; cv=none; b=jnnFxpgJnQEY8L6kvcLWY44k9bCKzutQ2x/V3CPbBYKCGSld/LHdOFuH3onnaildLucuRjnEzXtK2khSm4nGDQtO3PCtWaEUsK3y1fV+kCR3jR4yeG91+Z+j+748WHhsbRfsqr7tiwvnOieUlqaEHbMSOQO6kAE/TGSPHnm2C4E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769533782; c=relaxed/simple; bh=QXUiS85EIUUd867FAX8BQt+rIZ5D4JQIHmers4hf4as=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=V168/YJFTsBkmOfSUOqyyeLYyhyScjK5V5Rf8tSV8X0yf/muE0xu84F9FozU4vi9YrSJM6DWJf06Nu/1ydmhVyA0/d7G2BYSY6BIRT+e4c98d2EnLNtsStKgbzgEvRi007Ii96VHlkemmkRAkkeK0+WADgPoRuHTSSXpmvpRbSE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=UA8NiG/2; arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="UA8NiG/2" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id 6D221C211C8; Tue, 27 Jan 2026 17:09:41 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 4A6A7606F5; Tue, 27 Jan 2026 17:09:39 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id EDBB4119A8697; Tue, 27 Jan 2026 18:09:35 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1769533777; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=PcFyLKn28tM/nd0u7JbcHwSmBDJOiHSl2uY1fJ6Cd+w=; b=UA8NiG/2mFd7o8K88FkQdpuWfkiXQ0P5MQUNTAyPGh7CLIeCg44o8FZI0+bMR9IDUELhJ+ FF+XKhRM1WxcG2TVjJBal1AYMtSMKi2S7dVKoYaW9kJzxnAD97ObnRBXzDrsq02c8YXkdF eXqHB4MBF6R3XJFs7ord1o+kO9LV5UWUvjews19v1UdY1Gp5zbqT6L4uwkmRu0iJo/K7eL ZWr5dZoUs5hP46vXiHJFKp/yjXEl2NYBwQbQJvhuG6oDNG5jqV83ATROuLVmNfxwJaaxji ZyLhbSCsz38lOTfFGG4zxN0K2uRWazs9L0Y2gaIrw2nawYvcfj2xY1NzzC3k+Q== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Tue, 27 Jan 2026 18:09:29 +0100 Subject: [PATCH v6 1/8] dt-bindings: soc: mobileye: OLB is an Ethernet PHY provider on EyeQ5 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260127-macb-phy-v6-1-cdd840588188@bootlin.com> References: <20260127-macb-phy-v6-0-cdd840588188@bootlin.com> In-Reply-To: <20260127-macb-phy-v6-0-cdd840588188@bootlin.com> To: Vladimir Kondratiev , =?utf-8?q?Gr=C3=A9gory_Clement?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Kishon Vijay Abraham I , Michael Turquette , Stephen Boyd , Philipp Zabel , Thomas Bogendoerfer , Neil Armstrong Cc: linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-clk@vger.kernel.org, =?utf-8?q?Beno=C3=AEt_Monin?= , Tawfik Bayouk , Thomas Petazzoni , Luca Ceresoli , =?utf-8?q?Th=C3=A9o_Lebrun?= , Conor Dooley X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 OLB on EyeQ5 ("mobileye,eyeq5-olb" compatible) is now declared as a generic PHY provider. Under the hood, it provides Ethernet RGMII/SGMII PHY support for both MAC instances. Acked-by: Conor Dooley Signed-off-by: Th=C3=A9o Lebrun --- .../devicetree/bindings/soc/mobileye/mobileye,eyeq5-olb.yaml | 7 +++= +++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/soc/mobileye/mobileye,eyeq5-= olb.yaml b/Documentation/devicetree/bindings/soc/mobileye/mobileye,eyeq5-ol= b.yaml index 6d11472ba5a7..56401d76a9b5 100644 --- a/Documentation/devicetree/bindings/soc/mobileye/mobileye,eyeq5-olb.yaml +++ b/Documentation/devicetree/bindings/soc/mobileye/mobileye,eyeq5-olb.yaml @@ -51,6 +51,9 @@ properties: clock-names: const: ref =20 + '#phy-cells': + const: 1 + patternProperties: '-pins?$': type: object @@ -310,7 +313,7 @@ allOf: properties: '#reset-cells': false =20 - # Only EyeQ5 has pinctrl in OLB. + # Only EyeQ5 has pinctrl and PHY in OLB. - if: not: properties: @@ -320,6 +323,8 @@ allOf: then: patternProperties: '-pins?$': false + properties: + '#phy-cells': false =20 examples: - | --=20 2.52.0 From nobody Sat Feb 7 05:01:29 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EE80134F48C; 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bh=w1odAlmEkx+GduKelnjex71vq0A+kOfMC2EKAhxZ2Dk=; b=dhbVaD2N4fMAcH5gjf2sNIhFQahpWNk3cJY1d11xExAXjrKgUTUF72o6LKv2b13D27/92I MGRqnmEc/xAgEvvbjchv38L/0h2n0l7udPRKWQS+W//Bej0OJ+I7uN66kihlU4uvILRAjE ADCAstHbQA7jdTI0R6rcjx+X0ntFmsP5WD0vR3TL2Te173+0uqn7GgicKxx+h3X33JVUu9 j+4IctmT1WpssDKErjCCqHnWVPUUbiBnDth2bgQU9K4lkB6OVWsYzdQ4WYTh0T+B0kBFX3 HuQoBP9J9ablpodhsYGSQ/eT2IkJcmAkZkrAGAetH4tmCYgA6GrjmYXeat1byQ== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Tue, 27 Jan 2026 18:09:30 +0100 Subject: [PATCH v6 2/8] phy: sort Kconfig and Makefile Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260127-macb-phy-v6-2-cdd840588188@bootlin.com> References: <20260127-macb-phy-v6-0-cdd840588188@bootlin.com> In-Reply-To: <20260127-macb-phy-v6-0-cdd840588188@bootlin.com> To: Vladimir Kondratiev , =?utf-8?q?Gr=C3=A9gory_Clement?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Kishon Vijay Abraham I , Michael Turquette , Stephen Boyd , Philipp Zabel , Thomas Bogendoerfer , Neil Armstrong Cc: linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-clk@vger.kernel.org, =?utf-8?q?Beno=C3=AEt_Monin?= , Tawfik Bayouk , Thomas Petazzoni , Luca Ceresoli , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Neither Kconfig nor Makefile are sorted; reorder them. $ diff -U100 <(grep ^config drivers/phy/Kconfig) \ <(grep ^config drivers/phy/Kconfig | sort) $ diff -U100 <(grep ^obj-\\$ drivers/phy/Makefile) \ <(grep ^obj-\\$ drivers/phy/Makefile | sort) Signed-off-by: Th=C3=A9o Lebrun Reviewed-by: Luca Ceresoli --- drivers/phy/Kconfig | 62 ++++++++++++++++++++++++++----------------------= ---- drivers/phy/Makefile | 6 ++--- 2 files changed, 34 insertions(+), 34 deletions(-) diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index 678dd0452f0a..4f1b1d7f5d20 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -25,6 +25,26 @@ config GENERIC_PHY_MIPI_DPHY Provides a number of helpers a core functions for MIPI D-PHY drivers to us. =20 +config PHY_AIROHA_PCIE + tristate "Airoha PCIe-PHY Driver" + depends on ARCH_AIROHA || COMPILE_TEST + depends on OF + select GENERIC_PHY + help + Say Y here to add support for Airoha PCIe PHY driver. + This driver create the basic PHY instance and provides initialize + callback for PCIe GEN3 port. + +config PHY_CAN_TRANSCEIVER + tristate "CAN transceiver PHY" + select GENERIC_PHY + select MULTIPLEXER + help + This option enables support for CAN transceivers as a PHY. This + driver provides function for putting the transceivers in various + functional modes using gpios and sets the attribute max link + rate, for CAN drivers. + config PHY_LPC18XX_USB_OTG tristate "NXP LPC18xx/43xx SoC USB OTG PHY driver" depends on OF && (ARCH_LPC18XX || COMPILE_TEST) @@ -36,6 +56,17 @@ config PHY_LPC18XX_USB_OTG This driver is need for USB0 support on LPC18xx/43xx and takes care of enabling and clock setup. =20 +config PHY_NXP_PTN3222 + tristate "NXP PTN3222 1-port eUSB2 to USB2 redriver" + depends on I2C + depends on OF + select GENERIC_PHY + help + Enable this to support NXP PTN3222 1-port eUSB2 to USB2 Redriver. + This redriver performs translation between eUSB2 and USB2 signalling + schemes. It supports all three USB 2.0 data rates: Low Speed, Full + Speed and High Speed. + config PHY_PISTACHIO_USB tristate "IMG Pistachio USB2.0 PHY driver" depends on MIPS || COMPILE_TEST @@ -70,37 +101,6 @@ config USB_LGM_PHY interface to interact with USB GEN-II and USB 3.x PHY that is part of the Intel network SOC. =20 -config PHY_CAN_TRANSCEIVER - tristate "CAN transceiver PHY" - select GENERIC_PHY - select MULTIPLEXER - help - This option enables support for CAN transceivers as a PHY. This - driver provides function for putting the transceivers in various - functional modes using gpios and sets the attribute max link - rate, for CAN drivers. - -config PHY_AIROHA_PCIE - tristate "Airoha PCIe-PHY Driver" - depends on ARCH_AIROHA || COMPILE_TEST - depends on OF - select GENERIC_PHY - help - Say Y here to add support for Airoha PCIe PHY driver. - This driver create the basic PHY instance and provides initialize - callback for PCIe GEN3 port. - -config PHY_NXP_PTN3222 - tristate "NXP PTN3222 1-port eUSB2 to USB2 redriver" - depends on I2C - depends on OF - select GENERIC_PHY - help - Enable this to support NXP PTN3222 1-port eUSB2 to USB2 Redriver. - This redriver performs translation between eUSB2 and USB2 signalling - schemes. It supports all three USB 2.0 data rates: Low Speed, Full - Speed and High Speed. - source "drivers/phy/allwinner/Kconfig" source "drivers/phy/amlogic/Kconfig" source "drivers/phy/broadcom/Kconfig" diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index bfb27fb5a494..9943d742571d 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -5,14 +5,14 @@ =20 obj-$(CONFIG_GENERIC_PHY) +=3D phy-core.o obj-$(CONFIG_GENERIC_PHY_MIPI_DPHY) +=3D phy-core-mipi-dphy.o +obj-$(CONFIG_PHY_AIROHA_PCIE) +=3D phy-airoha-pcie.o obj-$(CONFIG_PHY_CAN_TRANSCEIVER) +=3D phy-can-transceiver.o obj-$(CONFIG_PHY_LPC18XX_USB_OTG) +=3D phy-lpc18xx-usb-otg.o -obj-$(CONFIG_PHY_XGENE) +=3D phy-xgene.o +obj-$(CONFIG_PHY_NXP_PTN3222) +=3D phy-nxp-ptn3222.o obj-$(CONFIG_PHY_PISTACHIO_USB) +=3D phy-pistachio-usb.o obj-$(CONFIG_PHY_SNPS_EUSB2) +=3D phy-snps-eusb2.o +obj-$(CONFIG_PHY_XGENE) +=3D phy-xgene.o obj-$(CONFIG_USB_LGM_PHY) +=3D phy-lgm-usb.o -obj-$(CONFIG_PHY_AIROHA_PCIE) +=3D phy-airoha-pcie.o -obj-$(CONFIG_PHY_NXP_PTN3222) +=3D phy-nxp-ptn3222.o obj-y +=3D allwinner/ \ amlogic/ \ broadcom/ \ --=20 2.52.0 From nobody Sat Feb 7 05:01:29 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6CF3A364053; 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bh=8/dj6WVrA/K0Ux2DBBmMXk7vM2U3gPEq7++0O2XBC9A=; b=eCGh3nha6A7xAuuUU1kcJsGhPx1UHJ7BRXd1wfV66IDmNfQrKDPHVxWWk0zEEJm7UA4JSt +YOdBgF0vkrvvauV1hyLD2K/W34uzlwbG5Ugr4JYaL9fyGwmDRb6NuZAR/kEPx4l8JzR/X P68nQr1EAsxcStWqkUVtfQC8bSr1KZ58s9rHEKnHO6hGD3UIyKXgfZAiqXOcmjhv9wV/RG Tk19H9VSXPQB/Q7mSKFvZ2xhf4vHTYKbeOz3Xo/2ww/TllIDmhU4bkjR7NxDzFt3meySO+ Ge7e8PtZGQYTMswLJTaqB41ZeUVGoI9b5yMbwHK/qX6nBWoguGiwXY9Tbh3l3A== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Tue, 27 Jan 2026 18:09:31 +0100 Subject: [PATCH v6 3/8] phy: Add driver for EyeQ5 Ethernet PHY wrapper Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260127-macb-phy-v6-3-cdd840588188@bootlin.com> References: <20260127-macb-phy-v6-0-cdd840588188@bootlin.com> In-Reply-To: <20260127-macb-phy-v6-0-cdd840588188@bootlin.com> To: Vladimir Kondratiev , =?utf-8?q?Gr=C3=A9gory_Clement?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Kishon Vijay Abraham I , Michael Turquette , Stephen Boyd , Philipp Zabel , Thomas Bogendoerfer , Neil Armstrong Cc: linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-clk@vger.kernel.org, =?utf-8?q?Beno=C3=AEt_Monin?= , Tawfik Bayouk , Thomas Petazzoni , Luca Ceresoli , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 EyeQ5 embeds a system-controller called OLB. It features many unrelated registers, and some of those are registers used to configure the integration of the RGMII/SGMII Cadence PHY used by MACB/GEM instances. Wrap in a neat generic PHY provider, exposing two PHYs with standard phy_init() / phy_set_mode() / phy_power_on() operations. Reviewed-by: Luca Ceresoli Signed-off-by: Th=C3=A9o Lebrun --- MAINTAINERS | 1 + drivers/phy/Kconfig | 13 +++ drivers/phy/Makefile | 1 + drivers/phy/phy-eyeq5-eth.c | 249 ++++++++++++++++++++++++++++++++++++++++= ++++ 4 files changed, 264 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 67db88b04537..2f77dc350706 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -17621,6 +17621,7 @@ F: arch/mips/boot/dts/mobileye/ F: arch/mips/configs/eyeq5_defconfig F: arch/mips/mobileye/board-epm5.its.S F: drivers/clk/clk-eyeq.c +F: drivers/phy/phy-eyeq5-eth.c F: drivers/pinctrl/pinctrl-eyeq5.c F: drivers/reset/reset-eyeq.c F: include/dt-bindings/clock/mobileye,eyeq5-clk.h diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index 4f1b1d7f5d20..b3c11cd0209a 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -45,6 +45,19 @@ config PHY_CAN_TRANSCEIVER functional modes using gpios and sets the attribute max link rate, for CAN drivers. =20 +config PHY_EYEQ5_ETH + tristate "Ethernet PHY Driver on EyeQ5" + depends on OF + depends on MACH_EYEQ5 || COMPILE_TEST + select AUXILIARY_BUS + select GENERIC_PHY + default MACH_EYEQ5 + help + Enable this to support the Ethernet PHY integrated on EyeQ5. + It supports both RGMII and SGMII. Registers are located in a + shared register region called OLB. If M is selected, the + module will be called phy-eyeq5-eth. + config PHY_LPC18XX_USB_OTG tristate "NXP LPC18xx/43xx SoC USB OTG PHY driver" depends on OF && (ARCH_LPC18XX || COMPILE_TEST) diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index 9943d742571d..c81ac7926e6b 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -7,6 +7,7 @@ obj-$(CONFIG_GENERIC_PHY) +=3D phy-core.o obj-$(CONFIG_GENERIC_PHY_MIPI_DPHY) +=3D phy-core-mipi-dphy.o obj-$(CONFIG_PHY_AIROHA_PCIE) +=3D phy-airoha-pcie.o obj-$(CONFIG_PHY_CAN_TRANSCEIVER) +=3D phy-can-transceiver.o +obj-$(CONFIG_PHY_EYEQ5_ETH) +=3D phy-eyeq5-eth.o obj-$(CONFIG_PHY_LPC18XX_USB_OTG) +=3D phy-lpc18xx-usb-otg.o obj-$(CONFIG_PHY_NXP_PTN3222) +=3D phy-nxp-ptn3222.o obj-$(CONFIG_PHY_PISTACHIO_USB) +=3D phy-pistachio-usb.o diff --git a/drivers/phy/phy-eyeq5-eth.c b/drivers/phy/phy-eyeq5-eth.c new file mode 100644 index 000000000000..0c46359dad96 --- /dev/null +++ b/drivers/phy/phy-eyeq5-eth.c @@ -0,0 +1,249 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define EQ5_PHY_COUNT 2 + +#define EQ5_PHY0_GP 0x128 +#define EQ5_PHY1_GP 0x12c +#define EQ5_PHY0_SGMII 0x134 +#define EQ5_PHY1_SGMII 0x138 + +#define EQ5_GP_TX_SWRST_DIS BIT(0) // Tx SW reset +#define EQ5_GP_TX_M_CLKE BIT(1) // Tx M clock enable +#define EQ5_GP_SYS_SWRST_DIS BIT(2) // Sys SW reset +#define EQ5_GP_SYS_M_CLKE BIT(3) // Sys clock enable +#define EQ5_GP_SGMII_MODE BIT(4) // SGMII mode +#define EQ5_GP_RGMII_DRV GENMASK(8, 5) // RGMII drive strength + +#define EQ5_SGMII_PWR_EN BIT(0) +#define EQ5_SGMII_RST_DIS BIT(1) +#define EQ5_SGMII_PLL_EN BIT(2) +#define EQ5_SGMII_SIG_DET_SW BIT(3) +#define EQ5_SGMII_PWR_STATE BIT(4) +#define EQ5_SGMII_PLL_ACK BIT(18) +#define EQ5_SGMII_PWR_STATE_ACK GENMASK(24, 20) + +struct eq5_phy_inst { + struct eq5_phy_private *priv; + struct phy *phy; + void __iomem *gp, *sgmii; + phy_interface_t phy_interface; +}; + +struct eq5_phy_private { + struct device *dev; + struct eq5_phy_inst phys[EQ5_PHY_COUNT]; +}; + +static int eq5_phy_init(struct phy *phy) +{ + struct eq5_phy_inst *inst =3D phy_get_drvdata(phy); + struct eq5_phy_private *priv =3D inst->priv; + struct device *dev =3D priv->dev; + u32 reg; + + dev_dbg(dev, "phy_init(inst=3D%td)\n", inst - priv->phys); + + writel(0, inst->gp); + writel(0, inst->sgmii); + + udelay(5); + + reg =3D readl(inst->gp) | EQ5_GP_TX_SWRST_DIS | EQ5_GP_TX_M_CLKE | + EQ5_GP_SYS_SWRST_DIS | EQ5_GP_SYS_M_CLKE | + FIELD_PREP(EQ5_GP_RGMII_DRV, 0x9); + writel(reg, inst->gp); + + return 0; +} + +static int eq5_phy_exit(struct phy *phy) +{ + struct eq5_phy_inst *inst =3D phy_get_drvdata(phy); + struct eq5_phy_private *priv =3D inst->priv; + struct device *dev =3D priv->dev; + + dev_dbg(dev, "phy_exit(inst=3D%td)\n", inst - priv->phys); + + writel(0, inst->gp); + writel(0, inst->sgmii); + udelay(5); + + return 0; +} + +static int eq5_phy_set_mode(struct phy *phy, enum phy_mode mode, int submo= de) +{ + struct eq5_phy_inst *inst =3D phy_get_drvdata(phy); + struct eq5_phy_private *priv =3D inst->priv; + struct device *dev =3D priv->dev; + + dev_dbg(dev, "phy_set_mode(inst=3D%td, mode=3D%d, submode=3D%d)\n", + inst - priv->phys, mode, submode); + + if (mode !=3D PHY_MODE_ETHERNET) + return -EOPNOTSUPP; + + if (!phy_interface_mode_is_rgmii(submode) && + submode !=3D PHY_INTERFACE_MODE_SGMII) + return -EOPNOTSUPP; + + inst->phy_interface =3D submode; + return 0; +} + +static int eq5_phy_power_on(struct phy *phy) +{ + struct eq5_phy_inst *inst =3D phy_get_drvdata(phy); + struct eq5_phy_private *priv =3D inst->priv; + struct device *dev =3D priv->dev; + u32 reg; + + dev_dbg(dev, "phy_power_on(inst=3D%td)\n", inst - priv->phys); + + if (inst->phy_interface =3D=3D PHY_INTERFACE_MODE_SGMII) { + writel(readl(inst->gp) | EQ5_GP_SGMII_MODE, inst->gp); + + reg =3D EQ5_SGMII_PWR_EN | EQ5_SGMII_RST_DIS | EQ5_SGMII_PLL_EN; + writel(reg, inst->sgmii); + + if (readl_poll_timeout(inst->sgmii, reg, + reg & EQ5_SGMII_PLL_ACK, 1, 100)) { + dev_err(dev, "PLL timeout\n"); + return -ETIMEDOUT; + } + + reg =3D readl(inst->sgmii); + reg |=3D EQ5_SGMII_PWR_STATE | EQ5_SGMII_SIG_DET_SW; + writel(reg, inst->sgmii); + } else { + writel(readl(inst->gp) & ~EQ5_GP_SGMII_MODE, inst->gp); + writel(0, inst->sgmii); + } + + return 0; +} + +static int eq5_phy_power_off(struct phy *phy) +{ + struct eq5_phy_inst *inst =3D phy_get_drvdata(phy); + struct eq5_phy_private *priv =3D inst->priv; + struct device *dev =3D priv->dev; + + dev_dbg(dev, "phy_power_off(inst=3D%td)\n", inst - priv->phys); + + writel(readl(inst->gp) & ~EQ5_GP_SGMII_MODE, inst->gp); + writel(0, inst->sgmii); + + return 0; +} + +static const struct phy_ops eq5_phy_ops =3D { + .init =3D eq5_phy_init, + .exit =3D eq5_phy_exit, + .set_mode =3D eq5_phy_set_mode, + .power_on =3D eq5_phy_power_on, + .power_off =3D eq5_phy_power_off, +}; + +static struct phy *eq5_phy_xlate(struct device *dev, + const struct of_phandle_args *args) +{ + struct eq5_phy_private *priv =3D dev_get_drvdata(dev); + + if (args->args_count !=3D 1 || args->args[0] >=3D EQ5_PHY_COUNT) + return ERR_PTR(-EINVAL); + + return priv->phys[args->args[0]].phy; +} + +static int eq5_phy_probe_phy(struct eq5_phy_private *priv, unsigned int in= dex, + void __iomem *base, unsigned int gp, + unsigned int sgmii) +{ + struct eq5_phy_inst *inst =3D &priv->phys[index]; + struct device *dev =3D priv->dev; + struct phy *phy; + + phy =3D devm_phy_create(dev, dev->of_node, &eq5_phy_ops); + if (IS_ERR(phy)) + return dev_err_probe(dev, PTR_ERR(phy), + "failed to create PHY %u\n", index); + + inst->priv =3D priv; + inst->phy =3D phy; + inst->gp =3D base + gp; + inst->sgmii =3D base + sgmii; + inst->phy_interface =3D PHY_INTERFACE_MODE_NA; + phy_set_drvdata(phy, inst); + + return 0; +} + +static int eq5_phy_probe(struct auxiliary_device *adev, + const struct auxiliary_device_id *id) +{ + struct device *dev =3D &adev->dev; + struct phy_provider *provider; + struct eq5_phy_private *priv; + void __iomem *base; + int ret; + + priv =3D devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->dev =3D dev; + dev_set_drvdata(dev, priv); + + base =3D dev_get_platdata(dev); + + ret =3D eq5_phy_probe_phy(priv, 0, base, EQ5_PHY0_GP, EQ5_PHY0_SGMII); + if (ret) + return ret; + + ret =3D eq5_phy_probe_phy(priv, 1, base, EQ5_PHY1_GP, EQ5_PHY1_SGMII); + if (ret) + return ret; + + provider =3D devm_of_phy_provider_register(dev, eq5_phy_xlate); + if (IS_ERR(provider)) + return dev_err_probe(dev, PTR_ERR(provider), + "registering provider failed\n"); + + return 0; +} + +static const struct auxiliary_device_id eq5_phy_id_table[] =3D { + { .name =3D "clk_eyeq.phy" }, + {} +}; +MODULE_DEVICE_TABLE(auxiliary, eq5_phy_id_table); + +static struct auxiliary_driver eq5_phy_driver =3D { + .probe =3D eq5_phy_probe, + .id_table =3D eq5_phy_id_table, +}; +module_auxiliary_driver(eq5_phy_driver); + +MODULE_DESCRIPTION("EyeQ5 Ethernet PHY driver"); +MODULE_AUTHOR("Th=C3=A9o Lebrun "); +MODULE_LICENSE("GPL"); --=20 2.52.0 From nobody Sat Feb 7 05:01:29 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B145D36402D; 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bh=0Ml6Zzl8BFTNao2FAIaUiqupgTqhQZZUaSVqC7tVQy8=; b=zlCG/QMTw8orp0VFvhGZll/8qWWl/vgQuk2QBhCqFLbi0Roodn0JpNYzywTMez9l9gqTus Tk/bLQu9uq+P1+VaT6HYpC7POgAiyIOIHF7T7X/7vcWKuVJHua2C8i6vEHEyRcDxCMX7YC YbJ5ci0YVhB1jYcUmxsSgIucQaiMgFkZ0uJOBqIFucjbKWFmOGntN8wUIGxZBtitz30UWi BlgkQtjZYJyTns9/GgHAKJkwT0ys87fNgJyee8uzOm310vmWkp7LK5BSSe2Zg2kRcl8Dr3 RM5Ax2M2i8Mxr5f+siXwW7Bv0wE9yJfaVekwid1UPQTLNFiVUhS09tYBTdWGNg== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Tue, 27 Jan 2026 18:09:32 +0100 Subject: [PATCH v6 4/8] clk: eyeq: use the auxiliary device creation helper Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260127-macb-phy-v6-4-cdd840588188@bootlin.com> References: <20260127-macb-phy-v6-0-cdd840588188@bootlin.com> In-Reply-To: <20260127-macb-phy-v6-0-cdd840588188@bootlin.com> To: Vladimir Kondratiev , =?utf-8?q?Gr=C3=A9gory_Clement?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Kishon Vijay Abraham I , Michael Turquette , Stephen Boyd , Philipp Zabel , Thomas Bogendoerfer , Neil Armstrong Cc: linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-clk@vger.kernel.org, =?utf-8?q?Beno=C3=AEt_Monin?= , Tawfik Bayouk , Thomas Petazzoni , Luca Ceresoli , =?utf-8?q?Th=C3=A9o_Lebrun?= , Jerome Brunet X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 From: Jerome Brunet The auxiliary device creation of this driver is simple enough to use the available auxiliary device creation helper. Use it and remove some boilerplate code. Tested-by: Th=C3=A9o Lebrun # On Mobileye EyeQ5 Signed-off-by: Jerome Brunet Reviewed-by: Luca Ceresoli Signed-off-by: Th=C3=A9o Lebrun --- drivers/clk/clk-eyeq.c | 57 +++++++++++-----------------------------------= ---- 1 file changed, 12 insertions(+), 45 deletions(-) diff --git a/drivers/clk/clk-eyeq.c b/drivers/clk/clk-eyeq.c index ea1c3d78e7cd..664ce7d7868d 100644 --- a/drivers/clk/clk-eyeq.c +++ b/drivers/clk/clk-eyeq.c @@ -322,38 +322,18 @@ static void eqc_probe_init_fixed_factors(struct devic= e *dev, } } =20 -static void eqc_auxdev_release(struct device *dev) -{ - struct auxiliary_device *adev =3D to_auxiliary_dev(dev); - - kfree(adev); -} - -static int eqc_auxdev_create(struct device *dev, void __iomem *base, - const char *name, u32 id) +static void eqc_auxdev_create_optional(struct device *dev, void __iomem *b= ase, + const char *name) { struct auxiliary_device *adev; - int ret; =20 - adev =3D kzalloc(sizeof(*adev), GFP_KERNEL); - if (!adev) - return -ENOMEM; - - adev->name =3D name; - adev->dev.parent =3D dev; - adev->dev.platform_data =3D (void __force *)base; - adev->dev.release =3D eqc_auxdev_release; - adev->id =3D id; - - ret =3D auxiliary_device_init(adev); - if (ret) - return ret; - - ret =3D auxiliary_device_add(adev); - if (ret) - auxiliary_device_uninit(adev); - - return ret; + if (name) { + adev =3D devm_auxiliary_device_create(dev, name, + (void __force *)base); + if (!adev) + dev_warn(dev, "failed creating auxiliary device %s.%s\n", + KBUILD_MODNAME, name); + } } =20 static int eqc_probe(struct platform_device *pdev) @@ -365,7 +345,6 @@ static int eqc_probe(struct platform_device *pdev) unsigned int i, clk_count; struct resource *res; void __iomem *base; - int ret; =20 data =3D device_get_match_data(dev); if (!data) @@ -379,21 +358,9 @@ static int eqc_probe(struct platform_device *pdev) if (!base) return -ENOMEM; =20 - /* Init optional reset auxiliary device. */ - if (data->reset_auxdev_name) { - ret =3D eqc_auxdev_create(dev, base, data->reset_auxdev_name, 0); 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bh=k5FHfCu3lXplllIOLz1R5tej0eu2UNbtzmdh0flsAZE=; b=py0WR0nWX2GnUu4N/GqxjYjxYBGGu/OJjmF9tUKH94Iw5meXdeI8VWP5N++WHvI153oQ/8 aD0fKbFK0abnAhvujcanARVeeXFxf8faQeKRyYzzlH/WeSx6B68PSx7LSTwVt51kZaXIfG MW+N4e5UtGHxbACNdMKwD5rzPpEowBcXc6leHZeSIp6D7ETVvrs6u3uQfM3OivaVU5fmwJ stQheBdz8IlnreFCf8PP8KDNN+yKo6qPIPha0TNrn+N72mtsYpw51lXH2lAAOjxVk+EP0t o37ZIBuV0ckXkrVnPN92igmPc8qOpaoMBM5xaElTMTs3M4312/j5b8/jkH/9Qw== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Tue, 27 Jan 2026 18:09:33 +0100 Subject: [PATCH v6 5/8] clk: eyeq: add EyeQ5 children auxiliary device for generic PHYs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260127-macb-phy-v6-5-cdd840588188@bootlin.com> References: <20260127-macb-phy-v6-0-cdd840588188@bootlin.com> In-Reply-To: <20260127-macb-phy-v6-0-cdd840588188@bootlin.com> To: Vladimir Kondratiev , =?utf-8?q?Gr=C3=A9gory_Clement?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Kishon Vijay Abraham I , Michael Turquette , Stephen Boyd , Philipp Zabel , Thomas Bogendoerfer , Neil Armstrong Cc: linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-clk@vger.kernel.org, =?utf-8?q?Beno=C3=AEt_Monin?= , Tawfik Bayouk , Thomas Petazzoni , Luca Ceresoli , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Grow our clk-eyeq family; it knows how to spawn reset provider and pin controller children. Expand with a generic PHY driver on EyeQ5. Reviewed-by: Luca Ceresoli Signed-off-by: Th=C3=A9o Lebrun --- drivers/clk/clk-eyeq.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/clk/clk-eyeq.c b/drivers/clk/clk-eyeq.c index 664ce7d7868d..a9de57315e48 100644 --- a/drivers/clk/clk-eyeq.c +++ b/drivers/clk/clk-eyeq.c @@ -109,6 +109,7 @@ struct eqc_match_data { =20 const char *reset_auxdev_name; const char *pinctrl_auxdev_name; + const char *eth_phy_auxdev_name; =20 unsigned int early_clk_count; }; @@ -361,6 +362,7 @@ static int eqc_probe(struct platform_device *pdev) /* Init optional auxiliary devices. */ eqc_auxdev_create_optional(dev, base, data->reset_auxdev_name); eqc_auxdev_create_optional(dev, base, data->pinctrl_auxdev_name); + eqc_auxdev_create_optional(dev, base, data->eth_phy_auxdev_name); =20 if (data->pll_count + data->div_count + data->fixed_factor_count =3D=3D 0) return 0; /* Zero clocks, we are done. */ @@ -521,6 +523,7 @@ static const struct eqc_match_data eqc_eyeq5_match_data= =3D { =20 .reset_auxdev_name =3D "reset", .pinctrl_auxdev_name =3D "pinctrl", + .eth_phy_auxdev_name =3D "phy", =20 .early_clk_count =3D ARRAY_SIZE(eqc_eyeq5_early_plls) + ARRAY_SIZE(eqc_eyeq5_early_fixed_factors), --=20 2.52.0 From nobody Sat Feb 7 05:01:29 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0A3AD363C65; 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bh=+uRP6I+VHQdCF3SP4Wbv8N2ZU6aFa3eq082m9FRdvVo=; b=wejsVCqK9ewGvNQ+re3oP7E9GDh1wMn/3c+pJNiE5vr41m1UpGAdn3Mjr7ao+1zTYpYOq5 fHxPlVDSmbesLuVHjtN20c1TCvjudqm9vLyayz9Tbo6fFEfWJbX0oUZiIRnZL4TsoIV/dY CU5vjM2bT2EQCEOo8AbVDfmi6rRAyIh8K5yYs+/YIA+LylpLl2vFgsWtkBNTO7aEnzZ0Wf YeH3diA8nNmwMWkucphv+bcgcpqQ0AQfy54eBRlSmyTvzmUbVHRrL75/wX3u2cNxoJ9oB+ JkW/oGU6qcqaoZA2WeRS5U2s+cbpkt/mvhmuo3XA25vRUrrDvEHb+EY+cqfenA== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Tue, 27 Jan 2026 18:09:34 +0100 Subject: [PATCH v6 6/8] reset: eyeq: drop device_set_of_node_from_dev() done by parent Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260127-macb-phy-v6-6-cdd840588188@bootlin.com> References: <20260127-macb-phy-v6-0-cdd840588188@bootlin.com> In-Reply-To: <20260127-macb-phy-v6-0-cdd840588188@bootlin.com> To: Vladimir Kondratiev , =?utf-8?q?Gr=C3=A9gory_Clement?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Kishon Vijay Abraham I , Michael Turquette , Stephen Boyd , Philipp Zabel , Thomas Bogendoerfer , Neil Armstrong Cc: linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-clk@vger.kernel.org, =?utf-8?q?Beno=C3=AEt_Monin?= , Tawfik Bayouk , Thomas Petazzoni , Luca Ceresoli , =?utf-8?q?Th=C3=A9o_Lebrun?= , Jerome Brunet X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Our parent driver (clk-eyeq) now does the device_set_of_node_from_dev(dev, dev->parent) call through the newly introduced devm_auxiliary_device_create() helper. Doing it again in the reset-eyeq probe would be redundant. Drop both the WARN_ON() and the device_set_of_node_from_dev() call. Also fix the following comment that talks about "our newfound OF node". Signed-off-by: Jerome Brunet Reviewed-by: Philipp Zabel Acked-by: Philipp Zabel Signed-off-by: Th=C3=A9o Lebrun --- drivers/reset/reset-eyeq.c | 24 ++---------------------- 1 file changed, 2 insertions(+), 22 deletions(-) diff --git a/drivers/reset/reset-eyeq.c b/drivers/reset/reset-eyeq.c index 2d3998368a1c..8018fa895427 100644 --- a/drivers/reset/reset-eyeq.c +++ b/drivers/reset/reset-eyeq.c @@ -410,13 +410,6 @@ static int eqr_of_xlate_twocells(struct reset_controll= er_dev *rcdev, return eqr_of_xlate_internal(rcdev, reset_spec->args[0], reset_spec->args= [1]); } =20 -static void eqr_of_node_put(void *_dev) -{ - struct device *dev =3D _dev; - - of_node_put(dev->of_node); -} - static int eqr_probe(struct auxiliary_device *adev, const struct auxiliary_device_id *id) { @@ -427,21 +420,8 @@ static int eqr_probe(struct auxiliary_device *adev, int ret; =20 /* - * We are an auxiliary device of clk-eyeq. We do not have an OF node by - * default; let's reuse our parent's OF node. - */ - WARN_ON(dev->of_node); - device_set_of_node_from_dev(dev, dev->parent); - if (!dev->of_node) - return -ENODEV; - - ret =3D devm_add_action_or_reset(dev, eqr_of_node_put, dev); - if (ret) - return ret; - - /* - * Using our newfound OF node, we can get match data. We cannot use - * device_get_match_data() because it does not match reused OF nodes. + * Get match data. We cannot use device_get_match_data() because it does + * not accept reused OF nodes; see device_set_of_node_from_dev(). */ match =3D of_match_node(dev->driver->of_match_table, dev->of_node); if (!match || !match->data) --=20 2.52.0 From nobody Sat Feb 7 05:01:29 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DD639363C59; Tue, 27 Jan 2026 17:09:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769533794; cv=none; b=IPYMf5viTjKsoZoekefdNZrarXAY39WqdNRqnT4JOifoj9vOS67kAPmR+daTyoKWTh9oVr+YcmVn/4VdsmmWwzfRbzf+rExHRfncAmqsixJlS/nqAIpwKs8sXX/Lruv/I+vegTzqMWaO8B0ZyoBUWvZx8NZdvdQPz3xnnrdwCGg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769533794; c=relaxed/simple; bh=lv6WeHOLzN4/qsaLqmD30sEVGUM+jW6HmTJ9zT06aPY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Ova4EuvelAB/KARJdeG/JWp673dI1dTuy2rgo37aeflFMW5Yf7dubFGvj5T1Q+GWdBKnfTo5I2zYT0XZsF1tCvi9KL0Gd04JqBUeEt7VxNmld5u5g1aH8muI8eyZkifkfhS+t03pm3DO0IChlhAINIE5NnWWnis/IRs1wK1YT+8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=11tLmDZw; arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="11tLmDZw" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id 99946C211C6; Tue, 27 Jan 2026 17:09:53 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 79574606F5; Tue, 27 Jan 2026 17:09:51 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 9C80D119A869F; Tue, 27 Jan 2026 18:09:48 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1769533790; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=j3DTItJWdi9LPxqF5IOPQvF/znTVfYmJgIlAc45vP7g=; b=11tLmDZwEabxgokLrKZjvRoSMOaOPIh17LBQVKVAD8/AO346L9hbBUjosBZHHLSOQkRUYW WlEET3mBr5bRV1CbzTLJjn7os9hd4crp5A7sOSXDsrLyeIHKwulYextV5/ADPDxlRry8Ad 7ykfEWv6krpeQvMjHD+WTXXk81B9kKsrwYet8sbc2A1wWJE3XHvK5FKnDgyWeWujngvBEK nQoicH8Exe0w3/JoHaeWD2d3kg558WQmo4/YaPbeyIYLinImeEPYNyAI5LrKjIj6q/78f4 Imts5BmKBhA4WOPK7E1sCGWELRzXI7sUMFdueua6WdFsbyUn5zEcIDsKcXX50g== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Tue, 27 Jan 2026 18:09:35 +0100 Subject: [PATCH v6 7/8] MIPS: mobileye: eyeq5: add two Cadence GEM Ethernet controllers Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260127-macb-phy-v6-7-cdd840588188@bootlin.com> References: <20260127-macb-phy-v6-0-cdd840588188@bootlin.com> In-Reply-To: <20260127-macb-phy-v6-0-cdd840588188@bootlin.com> To: Vladimir Kondratiev , =?utf-8?q?Gr=C3=A9gory_Clement?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Kishon Vijay Abraham I , Michael Turquette , Stephen Boyd , Philipp Zabel , Thomas Bogendoerfer , Neil Armstrong Cc: linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-clk@vger.kernel.org, =?utf-8?q?Beno=C3=AEt_Monin?= , Tawfik Bayouk , Thomas Petazzoni , Luca Ceresoli , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Add both MACB/GEM instances found in the Mobileye EyeQ5 SoC. Acked-by: Thomas Bogendoerfer Signed-off-by: Th=C3=A9o Lebrun --- arch/mips/boot/dts/mobileye/eyeq5.dtsi | 45 ++++++++++++++++++++++++++++++= ++++ 1 file changed, 45 insertions(+) diff --git a/arch/mips/boot/dts/mobileye/eyeq5.dtsi b/arch/mips/boot/dts/mo= bileye/eyeq5.dtsi index 36a73e8a63a1..cec5ad875228 100644 --- a/arch/mips/boot/dts/mobileye/eyeq5.dtsi +++ b/arch/mips/boot/dts/mobileye/eyeq5.dtsi @@ -77,6 +77,8 @@ aliases { serial0 =3D &uart0; serial1 =3D &uart1; serial2 =3D &uart2; + ethernet0 =3D &macb0; + ethernet1 =3D &macb1; }; =20 cpu_intc: interrupt-controller { @@ -231,6 +233,7 @@ olb: system-controller@e00000 { #clock-cells =3D <1>; clocks =3D <&xtal>; clock-names =3D "ref"; + #phy-cells =3D <1>; }; =20 gic: interrupt-controller@140000 { @@ -305,6 +308,48 @@ gpio1: gpio@1500000 { #interrupt-cells =3D <2>; resets =3D <&olb 0 26>; }; + + iocu-bus { + compatible =3D "simple-bus"; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + dma-coherent; + dma-ranges =3D <0x10 0x00000000 0x0 0x0 0x10 0>; + + macb0: ethernet@2a00000 { + compatible =3D "mobileye,eyeq5-gem"; + reg =3D <0x0 0x02a00000 0x0 0x4000>; + interrupt-parent =3D <&gic>; + /* One interrupt per queue */ + interrupts =3D , + , + , + ; + clock-names =3D "pclk", "hclk", "tsu_clk"; + clocks =3D <&pclk>, <&pclk>, <&tsu_clk>; + nvmem-cells =3D <ð0_mac>; + nvmem-cell-names =3D "mac-address"; + phys =3D <&olb 0>; + }; + + macb1: ethernet@2b00000 { + compatible =3D "mobileye,eyeq5-gem"; + reg =3D <0x0 0x02b00000 0x0 0x4000>; + interrupt-parent =3D <&gic>; + /* One interrupt per queue */ + interrupts =3D , + , + , + ; + clock-names =3D "pclk", "hclk", "tsu_clk"; + clocks =3D <&pclk>, <&pclk>, <&tsu_clk>; + nvmem-cells =3D <ð1_mac>; + nvmem-cell-names =3D "mac-address"; + phys =3D <&olb 1>; + }; + }; + }; }; =20 --=20 2.52.0 From nobody Sat Feb 7 05:01:29 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7F400366809 for ; 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bh=BVCjO3PiJ96hjbVyejrX+9TN3cIt/NAX8/w5F1wcAmA=; b=XkA96BVK8WVnRnOW6FNmyFVUCUFlaeVVR4QVINu+C0sU4B/f3vduZBNB64dpb1kjTLDUgu fEsldg3gJe9ADryXAS5vEwM+AcwesXhEH7lZaqyvwX6ssh7MuVxR98Vyp5SmGsiL3+fMjw MJomtUrwF6CCiQltCba0pvdtPLOhucSpTYWQdJUwETByYhhB2bxmk0bi/2ntEVm5n6C0xe pFyRIQWnpf9Ju71pyZyWxoKbr85KlH+EuOKBZ4KpNeVOJItTCY2utRHGuU4w3hdHUKC1qe DfDvCXUXB/aaNr7JfZ9gh91OCHA8JTTFY1h7eQz5UUul+aKEh8YBFQGP+nbklA== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Tue, 27 Jan 2026 18:09:36 +0100 Subject: [PATCH v6 8/8] MIPS: mobileye: eyeq5-epm: add two Cadence GEM Ethernet PHYs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260127-macb-phy-v6-8-cdd840588188@bootlin.com> References: <20260127-macb-phy-v6-0-cdd840588188@bootlin.com> In-Reply-To: <20260127-macb-phy-v6-0-cdd840588188@bootlin.com> To: Vladimir Kondratiev , =?utf-8?q?Gr=C3=A9gory_Clement?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Kishon Vijay Abraham I , Michael Turquette , Stephen Boyd , Philipp Zabel , Thomas Bogendoerfer , Neil Armstrong Cc: linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-clk@vger.kernel.org, =?utf-8?q?Beno=C3=AEt_Monin?= , Tawfik Bayouk , Thomas Petazzoni , Luca Ceresoli , =?utf-8?q?Th=C3=A9o_Lebrun?= , Andrew Lunn X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The Mobileye EyeQ5 eval board (EPM) embeds two MDIO PHYs. Reviewed-by: Andrew Lunn Acked-by: Thomas Bogendoerfer Signed-off-by: Th=C3=A9o Lebrun --- arch/mips/boot/dts/mobileye/eyeq5-epm5.dts | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/mips/boot/dts/mobileye/eyeq5-epm5.dts b/arch/mips/boot/dt= s/mobileye/eyeq5-epm5.dts index 9fc1a1b0a81b..babf52731ea6 100644 --- a/arch/mips/boot/dts/mobileye/eyeq5-epm5.dts +++ b/arch/mips/boot/dts/mobileye/eyeq5-epm5.dts @@ -29,3 +29,29 @@ temperature-sensor@48 { label =3D "U60"; }; }; + +&macb0 { + phy-mode =3D "sgmii"; + phy-handle =3D <&macb0_phy>; + + mdio { + #address-cells =3D <1>; + #size-cells =3D <0>; + macb0_phy: ethernet-phy@e { + reg =3D <0xe>; + }; + }; +}; + +&macb1 { + phy-mode =3D "rgmii-id"; + phy-handle =3D <&macb1_phy>; + + mdio { + #address-cells =3D <1>; + #size-cells =3D <0>; + macb1_phy: ethernet-phy@e { + reg =3D <0xe>; + }; + }; +}; --=20 2.52.0