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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1247d90ce0dsm19948967c88.4.2026.01.26.15.38.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jan 2026 15:38:32 -0800 (PST) From: Elson Serrao To: Greg Kroah-Hartman , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Souradeep Chowdhury Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/9] dt-bindings: soc: qcom: eud: Restructure to model multi-path hardware Date: Mon, 26 Jan 2026 15:38:22 -0800 Message-Id: <20260126233830.2193816-2-elson.serrao@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260126233830.2193816-1-elson.serrao@oss.qualcomm.com> References: <20260126233830.2193816-1-elson.serrao@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: C7rkBj_mCLCQ2Y1ijoPbl1UnsOKkqHd1 X-Proofpoint-GUID: C7rkBj_mCLCQ2Y1ijoPbl1UnsOKkqHd1 X-Authority-Analysis: v=2.4 cv=I+5ohdgg c=1 sm=1 tr=0 ts=6977fafa cx=c_pps a=wEP8DlPgTf/vqF+yE6f9lg==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=COk6AnOGAAAA:8 a=ZoGLzPNB8GXcnAfKQAAA:9 a=hr3zit-iljVEbsnA:21 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=bBxd6f-gb0O0v-kibOvt:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI2MDIwMiBTYWx0ZWRfX5wBcEVIHJ9Qq oQpfM8c5tW/bdtwmWhCZcCXKw3e3vZhvXRNzV7Lip3aDnxwLM8pXugyAzTrYBh8yEUwMK+A1RpY brBXLBpwW3YNx7gM9HcXDyX0v4nTnW7w9J0e/xmajrva7JQcxNxFyi0cV1DG83gSq43Hozpdbdl /FKVHRtPU4/WdcY9/x/ZdbcsrXNuuT7psExmSmxZBKx8SwpPhtA44+zppwoswpegWeMU7oJdJBT wBOdEI2QClGvWq/ZcburEOrQTlxUW8UPPkI5Tk0KPCXG/fSZagTVpE/TO9x3P4MW8R5+Z29iCSl fA6DgzWWZRzDhHeABF6CuqIgzJVHxb09b+f6bSubRsrDBjQKbvtTWO8plBn7pk7typ8mUlyTy7o 9KrBmzob0hq22RnV/KGcNO8kGtvWd1TLkwUPClHXvitdFlmTj1ObK+HPgRVZKNXo9LPEvdza1R4 6ukacZUT3HVi5duYHDg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.20,FMLib:17.12.100.49 definitions=2026-01-26_04,2026-01-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 adultscore=0 priorityscore=1501 impostorscore=0 lowpriorityscore=0 suspectscore=0 bulkscore=0 clxscore=1015 phishscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601260202 The Qualcomm Embedded USB Debugger (EUD) can intercept one or two independent High-Speed UTMI paths, depending on the SoC. Each path is distinct with its own HS-PHY interface, connector/controller wiring, and UTMI routing behavior. The EUD hardware sits between the USB2 PHY and the USB controller on each path. The existing binding models only a single UTMI path and does not provide a way to associate the required High-Speed USB PHY. EUD relies on the HS-PHY on the selected UTMI path for link signalling and correct operation of the hardware. Historically, EUD has worked on platforms that use a single UTMI path because the USB controller maintains ownership of the PHY during enumeration and normal operation. This implicit relationship allowed EUD to function even though the dependency on the PHY was not described in the binding. However, this behavior is not guaranteed by hardware. The current binding description is not sufficient for SoCs that expose two independent UTMI paths, where the PHY association and port wiring must be explicitly described. Introduce per-path eud-path child nodes so each UTMI path can describe its HS-PHY, port connections, and the role=E2=80=91switching capability of = its associated USB port. Signed-off-by: Elson Serrao --- .../bindings/soc/qcom/qcom,eud.yaml | 100 +++++++++++++----- 1 file changed, 74 insertions(+), 26 deletions(-) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml b/Doc= umentation/devicetree/bindings/soc/qcom/qcom,eud.yaml index 84218636c0d8..0507252dbf27 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml @@ -10,8 +10,11 @@ maintainers: - Souradeep Chowdhury =20 description: - This binding is used to describe the Qualcomm Embedded USB Debugger, whi= ch is - mini USB-hub implemented on chip to support USB-based debug capabilities. + This binding describes the Qualcomm Embedded USB Debugger (EUD), an on-c= hip + mini USB hub that enables USB-based debug capabilities. The EUD block is + positioned between the High-Speed USB PHY and the USB controller, where = it + intercepts the UTMI interface to support debug and bypass modes. EUD can= be + supported on up to two High-Speed USB ports. =20 properties: compatible: @@ -29,26 +32,62 @@ properties: description: EUD interrupt maxItems: 1 =20 - ports: - $ref: /schemas/graph.yaml#/properties/ports + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +patternProperties: + "^eud-path@[0-1]$": + type: object description: - These ports is to be attached to the endpoint of the DWC3 controller= node - and type C connector node. The controller has the "usb-role-switch" - property. + Represents one High-Speed UTMI path that EUD intercepts. This node m= odels + the physical data path intercepted by EUD and provides graph endpoin= ts to + link the USB controller and the external connector associated with t= his path. =20 properties: - port@0: - $ref: /schemas/graph.yaml#/properties/port - description: This port is to be attached to the DWC3 controller. + reg: + maxItems: 1 + description: Path number + + phys: + maxItems: 1 + description: High-Speed USB PHY associated with this data path. + + usb-role-switch: + type: boolean + description: + Set this property if the USB port on this path is role switch ca= pable. + In device role, debug mode inserts the EUD hub into the UTMI pat= h. In + host role, the EUD hub is bypassed and UTMI traffic flows direct= ly + between the PHY and the USB controller. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + description: + These ports are to be attached to the endpoint of the USB contro= ller node + and USB connector node. + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: This port is to be attached to the USB controller. =20 - port@1: - $ref: /schemas/graph.yaml#/properties/port - description: This port is to be attached to the type C connector. + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: This port is to be attached to the USB connector. + + required: + - reg + - phys + - ports + + additionalProperties: false =20 required: - compatible - reg - - ports =20 additionalProperties: false =20 @@ -58,21 +97,30 @@ examples: compatible =3D "qcom,sc7280-eud", "qcom,eud"; reg =3D <0x88e0000 0x2000>, <0x88e2000 0x1000>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + eud-path@0 { + reg =3D <0>; + phys =3D <&usb_1_hsphy>; + usb-role-switch; =20 - ports { - #address-cells =3D <1>; - #size-cells =3D <0>; - port@0 { - reg =3D <0>; - eud_ep: endpoint { - remote-endpoint =3D <&usb2_role_switch>; + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + eud_ep: endpoint { + remote-endpoint =3D <&usb2_role_switch>; + }; }; - }; =20 - port@1 { - reg =3D <1>; - eud_con: endpoint { - remote-endpoint =3D <&con_eud>; + port@1 { + reg =3D <1>; + eud_con: endpoint { + remote-endpoint =3D <&con_eud>; + }; }; }; }; --=20 2.34.1