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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1247d90ce0dsm19948967c88.4.2026.01.26.15.38.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jan 2026 15:38:32 -0800 (PST) From: Elson Serrao To: Greg Kroah-Hartman , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Souradeep Chowdhury Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/9] dt-bindings: soc: qcom: eud: Restructure to model multi-path hardware Date: Mon, 26 Jan 2026 15:38:22 -0800 Message-Id: <20260126233830.2193816-2-elson.serrao@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260126233830.2193816-1-elson.serrao@oss.qualcomm.com> References: <20260126233830.2193816-1-elson.serrao@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: C7rkBj_mCLCQ2Y1ijoPbl1UnsOKkqHd1 X-Proofpoint-GUID: C7rkBj_mCLCQ2Y1ijoPbl1UnsOKkqHd1 X-Authority-Analysis: v=2.4 cv=I+5ohdgg c=1 sm=1 tr=0 ts=6977fafa cx=c_pps a=wEP8DlPgTf/vqF+yE6f9lg==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=COk6AnOGAAAA:8 a=ZoGLzPNB8GXcnAfKQAAA:9 a=hr3zit-iljVEbsnA:21 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=bBxd6f-gb0O0v-kibOvt:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI2MDIwMiBTYWx0ZWRfX5wBcEVIHJ9Qq oQpfM8c5tW/bdtwmWhCZcCXKw3e3vZhvXRNzV7Lip3aDnxwLM8pXugyAzTrYBh8yEUwMK+A1RpY brBXLBpwW3YNx7gM9HcXDyX0v4nTnW7w9J0e/xmajrva7JQcxNxFyi0cV1DG83gSq43Hozpdbdl /FKVHRtPU4/WdcY9/x/ZdbcsrXNuuT7psExmSmxZBKx8SwpPhtA44+zppwoswpegWeMU7oJdJBT wBOdEI2QClGvWq/ZcburEOrQTlxUW8UPPkI5Tk0KPCXG/fSZagTVpE/TO9x3P4MW8R5+Z29iCSl fA6DgzWWZRzDhHeABF6CuqIgzJVHxb09b+f6bSubRsrDBjQKbvtTWO8plBn7pk7typ8mUlyTy7o 9KrBmzob0hq22RnV/KGcNO8kGtvWd1TLkwUPClHXvitdFlmTj1ObK+HPgRVZKNXo9LPEvdza1R4 6ukacZUT3HVi5duYHDg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.20,FMLib:17.12.100.49 definitions=2026-01-26_04,2026-01-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 adultscore=0 priorityscore=1501 impostorscore=0 lowpriorityscore=0 suspectscore=0 bulkscore=0 clxscore=1015 phishscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601260202 The Qualcomm Embedded USB Debugger (EUD) can intercept one or two independent High-Speed UTMI paths, depending on the SoC. Each path is distinct with its own HS-PHY interface, connector/controller wiring, and UTMI routing behavior. The EUD hardware sits between the USB2 PHY and the USB controller on each path. The existing binding models only a single UTMI path and does not provide a way to associate the required High-Speed USB PHY. EUD relies on the HS-PHY on the selected UTMI path for link signalling and correct operation of the hardware. Historically, EUD has worked on platforms that use a single UTMI path because the USB controller maintains ownership of the PHY during enumeration and normal operation. This implicit relationship allowed EUD to function even though the dependency on the PHY was not described in the binding. However, this behavior is not guaranteed by hardware. The current binding description is not sufficient for SoCs that expose two independent UTMI paths, where the PHY association and port wiring must be explicitly described. Introduce per-path eud-path child nodes so each UTMI path can describe its HS-PHY, port connections, and the role=E2=80=91switching capability of = its associated USB port. Signed-off-by: Elson Serrao --- .../bindings/soc/qcom/qcom,eud.yaml | 100 +++++++++++++----- 1 file changed, 74 insertions(+), 26 deletions(-) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml b/Doc= umentation/devicetree/bindings/soc/qcom/qcom,eud.yaml index 84218636c0d8..0507252dbf27 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml @@ -10,8 +10,11 @@ maintainers: - Souradeep Chowdhury =20 description: - This binding is used to describe the Qualcomm Embedded USB Debugger, whi= ch is - mini USB-hub implemented on chip to support USB-based debug capabilities. + This binding describes the Qualcomm Embedded USB Debugger (EUD), an on-c= hip + mini USB hub that enables USB-based debug capabilities. The EUD block is + positioned between the High-Speed USB PHY and the USB controller, where = it + intercepts the UTMI interface to support debug and bypass modes. EUD can= be + supported on up to two High-Speed USB ports. =20 properties: compatible: @@ -29,26 +32,62 @@ properties: description: EUD interrupt maxItems: 1 =20 - ports: - $ref: /schemas/graph.yaml#/properties/ports + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +patternProperties: + "^eud-path@[0-1]$": + type: object description: - These ports is to be attached to the endpoint of the DWC3 controller= node - and type C connector node. The controller has the "usb-role-switch" - property. + Represents one High-Speed UTMI path that EUD intercepts. This node m= odels + the physical data path intercepted by EUD and provides graph endpoin= ts to + link the USB controller and the external connector associated with t= his path. =20 properties: - port@0: - $ref: /schemas/graph.yaml#/properties/port - description: This port is to be attached to the DWC3 controller. + reg: + maxItems: 1 + description: Path number + + phys: + maxItems: 1 + description: High-Speed USB PHY associated with this data path. + + usb-role-switch: + type: boolean + description: + Set this property if the USB port on this path is role switch ca= pable. + In device role, debug mode inserts the EUD hub into the UTMI pat= h. In + host role, the EUD hub is bypassed and UTMI traffic flows direct= ly + between the PHY and the USB controller. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + description: + These ports are to be attached to the endpoint of the USB contro= ller node + and USB connector node. + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: This port is to be attached to the USB controller. =20 - port@1: - $ref: /schemas/graph.yaml#/properties/port - description: This port is to be attached to the type C connector. + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: This port is to be attached to the USB connector. + + required: + - reg + - phys + - ports + + additionalProperties: false =20 required: - compatible - reg - - ports =20 additionalProperties: false =20 @@ -58,21 +97,30 @@ examples: compatible =3D "qcom,sc7280-eud", "qcom,eud"; reg =3D <0x88e0000 0x2000>, <0x88e2000 0x1000>; + #address-cells =3D <1>; + #size-cells =3D <0>; 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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1247d90ce0dsm19948967c88.4.2026.01.26.15.38.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jan 2026 15:38:33 -0800 (PST) From: Elson Serrao To: Greg Kroah-Hartman , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Souradeep Chowdhury Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/9] usb: misc: qcom_eud: add sysfs attribute for port selection Date: Mon, 26 Jan 2026 15:38:23 -0800 Message-Id: <20260126233830.2193816-3-elson.serrao@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260126233830.2193816-1-elson.serrao@oss.qualcomm.com> References: <20260126233830.2193816-1-elson.serrao@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: bT4fTnHPPU1T2_Qa4uv2dorpOT5ljYcz X-Authority-Analysis: v=2.4 cv=SvedKfO0 c=1 sm=1 tr=0 ts=6977fafb cx=c_pps a=SvEPeNj+VMjHSW//kvnxuw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=un400R04Xmhap_XYEvQA:9 a=Kq8ClHjjuc5pcCNDwlU0:22 X-Proofpoint-ORIG-GUID: bT4fTnHPPU1T2_Qa4uv2dorpOT5ljYcz X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI2MDIwMiBTYWx0ZWRfX6aYXIpVPCFBd 9sDLiGujGluC6nV/wYa0koE3u958WPBPvM21oF9YHGI8EnmLMDiE4dlPSoNpYsPwI1k2dzG8YfA tK5bxfXd6U5H03LKrPiseJWEs4nVVLEQJBWtaJgVfn7OjbSV5DbOEYg1pXFyQqUZ1122iIKht3E bUGK1kjjKBBH+rm1nsxr83/3K8JZgUKB4WU61edGCXR8badduDvXzRc4i1vdUC9C+5Dv2S9IqQU bFDVcgAsk6C/RmShLM0NLHy3xRRSI/XSazc0pe51jEa5/75L9jGKFp84ZUwjuf4QvvktlwS+S0k rOBLp9SW44vcS66/3wOyLAWzUe6Tn6lHzS/jzMuY3AVOC2I7R48mDNw4eUgKfSF32vKCIMHYfj7 hyjX5XBVNNCWPYHpr5xD955PVWgtnWDlBOrWJZUBjfPzswOltnmG4WKKcdcAIO0jlNPjX3r3vnC UXjFQEMv5WhMZ4kc2dQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.20,FMLib:17.12.100.49 definitions=2026-01-26_04,2026-01-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 adultscore=0 clxscore=1015 suspectscore=0 impostorscore=0 spamscore=0 phishscore=0 malwarescore=0 bulkscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601260202 Content-Type: text/plain; charset="utf-8" EUD can be mapped to either the primary USB port or the secondary USB port depending on the value of the EUD_PORT_SEL register. Add a 'port' sysfs attribute to allow userspace to select which port EUD should operate on and update the ABI documentation. This is needed for systems with dual USB ports where EUD needs to be accessible on either port depending on the system configuration and use case. Signed-off-by: Elson Serrao Reviewed-by: Konrad Dybcio --- Documentation/ABI/testing/sysfs-driver-eud | 16 ++++++++ drivers/usb/misc/qcom_eud.c | 43 ++++++++++++++++++++++ 2 files changed, 59 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-driver-eud b/Documentation/ABI= /testing/sysfs-driver-eud index 2bab0db2d2f0..67223f73ee60 100644 --- a/Documentation/ABI/testing/sysfs-driver-eud +++ b/Documentation/ABI/testing/sysfs-driver-eud @@ -7,3 +7,19 @@ Description: EUD based on a 1 or a 0 value. By enabling EUD, the user is able to activate the mini-usb hub of EUD for debug and trace capabilities. + +What: /sys/bus/platform/drivers/qcom_eud/.../port +Date: January 2026 +Contact: Elson Serrao +Description: + Selects which USB port the Embedded USB Debugger (EUD) + is mapped to on platforms providing multiple High-Speed + USB ports. + + Valid values: + 0 - Primary USB port + 1 - Secondary USB port + + The attribute is writable only while EUD is disabled. + Reading the attribute returns the currently selected + USB port number. diff --git a/drivers/usb/misc/qcom_eud.c b/drivers/usb/misc/qcom_eud.c index 926419ca560f..1a136f8f1ae5 100644 --- a/drivers/usb/misc/qcom_eud.c +++ b/drivers/usb/misc/qcom_eud.c @@ -23,8 +23,11 @@ #define EUD_REG_VBUS_INT_CLR 0x0080 #define EUD_REG_CSR_EUD_EN 0x1014 #define EUD_REG_SW_ATTACH_DET 0x1018 +#define EUD_REG_PORT_SEL 0x1028 #define EUD_REG_EUD_EN2 0x0000 =20 +#define EUD_MAX_PORTS 2 + #define EUD_ENABLE BIT(0) #define EUD_INT_PET_EUD BIT(0) #define EUD_INT_VBUS BIT(2) @@ -40,6 +43,7 @@ struct eud_chip { int irq; bool enabled; bool usb_attached; + u8 port_idx; }; =20 static int enable_eud(struct eud_chip *priv) @@ -104,8 +108,47 @@ static ssize_t enable_store(struct device *dev, =20 static DEVICE_ATTR_RW(enable); =20 +static ssize_t port_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct eud_chip *chip =3D dev_get_drvdata(dev); + + return sysfs_emit(buf, "%u\n", chip->port_idx); +} + +static ssize_t port_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct eud_chip *chip =3D dev_get_drvdata(dev); + u8 port; + int ret; + + ret =3D kstrtou8(buf, 0, &port); + if (ret) + return ret; + + /* Only port 0 and port 1 are valid */ + if (port >=3D EUD_MAX_PORTS) + return -EINVAL; + + /* Port selection must be done before enabling EUD */ + if (chip->enabled) { + dev_err(chip->dev, "Cannot change port while EUD is enabled\n"); + return -EBUSY; + } + + writel(port, chip->base + EUD_REG_PORT_SEL); + chip->port_idx =3D port; + + return count; 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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1247d90ce0dsm19948967c88.4.2026.01.26.15.38.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jan 2026 15:38:34 -0800 (PST) From: Elson Serrao To: Greg Kroah-Hartman , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Souradeep Chowdhury Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/9] usb: misc: qcom_eud: add per-path High-Speed PHY control Date: Mon, 26 Jan 2026 15:38:24 -0800 Message-Id: <20260126233830.2193816-4-elson.serrao@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260126233830.2193816-1-elson.serrao@oss.qualcomm.com> References: <20260126233830.2193816-1-elson.serrao@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: PsU8AtYMBsqnpSiRECyPBXtwxGBBKvjw X-Proofpoint-GUID: PsU8AtYMBsqnpSiRECyPBXtwxGBBKvjw X-Authority-Analysis: v=2.4 cv=I+5ohdgg c=1 sm=1 tr=0 ts=6977fafc cx=c_pps a=PfFC4Oe2JQzmKTvty2cRDw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=2YOFDtW_yV4_c3kXKk8A:9 a=6Ab_bkdmUrQuMsNx7PHu:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI2MDIwMiBTYWx0ZWRfX6OJi7ZykUCwI Pyb4kX0kS3F9K4Rw+Gy6146nAE6kQi4mfIiHhM3sSokj3K1rm8uAnXYz90SdlbFseaAx1D+4O8Q 3ii+7DuGEP668961F+p+VU8w50RvznHY4/Nh5umpzKbC4I4e/OYuPAgYPpItOsKDqQpNKIkQXsM 7n7lv4ZUIhx79nhcANXqwBMon7neExkTeCmHT1ExuEWLzGyj/vvd8JzeXvySvoU094mED7jxZgB c4j3g+9k70/kIc69oZpYiYb+ca1Ze+tBvSL5RGzR1AQP4uKkTYsoQBonM0w+Zgh0qbvxbod1igC l8j+khcleh34D7LQMDLdouDClMZnY3pc5uT1ibATfOWs/TmwzPNODmIHaqd2+rtvBsH7QTMt1HG h63oIwxFVyiZHVq+GaqOz7q6DZQ/ufbZt+Jl74lx7e07h+507aEQslwHMIJ4PZLLbBf7ArAvYsz bYV6EEwQAF0oPaSUzIQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.20,FMLib:17.12.100.49 definitions=2026-01-26_04,2026-01-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 adultscore=0 priorityscore=1501 impostorscore=0 lowpriorityscore=0 suspectscore=0 bulkscore=0 clxscore=1015 phishscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601260202 Content-Type: text/plain; charset="utf-8" EUD hardware can support multiple High-Speed USB paths, each routed through its own PHY. The active path is selected in hardware via the EUD_PORT_SEL register. As a High-Speed hub, EUD requires access to the High-Speed PHY associated with the active UTMI path. To support this multi-path capability, the driver must manage PHY resources on a per-path basis, ensuring that the PHY for the currently selected path is properly initialized and powered. This patch restructures the driver to implement per-path PHY management. The driver now powers the appropriate PHY based on the selected and enabled UTMI path, ensuring correct operation when EUD is enabled. Supporting this requires describing the available UTMI paths and their corresponding PHYs in Device Tree. This updates DT requirements and is not backward compatible with older DTs that lacked this description. Historically, EUD appeared to work on single-path systems because the USB controller kept the PHY initialized. However, EUD is designed to operate independently of the USB controller and therefore requires explicit PHY control. Signed-off-by: Elson Serrao --- drivers/usb/misc/qcom_eud.c | 130 +++++++++++++++++++++++++++++++++++- 1 file changed, 129 insertions(+), 1 deletion(-) diff --git a/drivers/usb/misc/qcom_eud.c b/drivers/usb/misc/qcom_eud.c index 1a136f8f1ae5..5cebb64f4a67 100644 --- a/drivers/usb/misc/qcom_eud.c +++ b/drivers/usb/misc/qcom_eud.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -34,26 +35,96 @@ #define EUD_INT_SAFE_MODE BIT(4) #define EUD_INT_ALL (EUD_INT_VBUS | EUD_INT_SAFE_MODE) =20 +struct eud_path { + struct eud_chip *chip; + struct phy *phy; + u8 num; +}; + struct eud_chip { struct device *dev; struct usb_role_switch *role_sw; void __iomem *base; + struct eud_path *paths[EUD_MAX_PORTS]; phys_addr_t mode_mgr; unsigned int int_status; int irq; bool enabled; bool usb_attached; + bool phy_enabled; u8 port_idx; }; =20 +static int eud_phy_enable(struct eud_chip *chip) +{ + struct eud_path *path; + struct phy *phy; + int ret; + + if (chip->phy_enabled) + return 0; + + path =3D chip->paths[chip->port_idx]; + if (!path || !path->phy) { + dev_err(chip->dev, "No PHY configured for port %u\n", chip->port_idx); + return -ENODEV; + } + + phy =3D path->phy; + + ret =3D phy_init(phy); + if (ret) { + dev_err(chip->dev, "Failed to initialize USB2 PHY for port %u: %d\n", + chip->port_idx, ret); + return ret; + } + + ret =3D phy_power_on(phy); + if (ret) { + dev_err(chip->dev, "Failed to power on USB2 PHY for port %u: %d\n", + chip->port_idx, ret); + phy_exit(phy); + return ret; + } + + chip->phy_enabled =3D true; + + return 0; +} + +static void eud_phy_disable(struct eud_chip *chip) +{ + struct eud_path *path; + struct phy *phy; + + if (!chip->phy_enabled) + return; + + path =3D chip->paths[chip->port_idx]; + if (!path || !path->phy) + return; + + phy =3D path->phy; + + phy_power_off(phy); + phy_exit(phy); + chip->phy_enabled =3D false; +} + static int enable_eud(struct eud_chip *priv) { int ret; =20 - ret =3D qcom_scm_io_writel(priv->mode_mgr + EUD_REG_EUD_EN2, 1); + ret =3D eud_phy_enable(priv); if (ret) return ret; =20 + ret =3D qcom_scm_io_writel(priv->mode_mgr + EUD_REG_EUD_EN2, 1); + if (ret) { + eud_phy_disable(priv); + return ret; + } + writel(EUD_ENABLE, priv->base + EUD_REG_CSR_EUD_EN); writel(EUD_INT_VBUS | EUD_INT_SAFE_MODE, priv->base + EUD_REG_INT1_EN_MASK); @@ -70,6 +141,8 @@ static int disable_eud(struct eud_chip *priv) return ret; =20 writel(0, priv->base + EUD_REG_CSR_EUD_EN); + eud_phy_disable(priv); + return 0; } =20 @@ -132,6 +205,12 @@ static ssize_t port_store(struct device *dev, if (port >=3D EUD_MAX_PORTS) return -EINVAL; =20 + /* Check if the corresponding path is available */ + if (!chip->paths[port]) { + dev_err(chip->dev, "EUD not supported on selected port\n"); + return -EOPNOTSUPP; + } + /* Port selection must be done before enabling EUD */ if (chip->enabled) { dev_err(chip->dev, "Cannot change port while EUD is enabled\n"); @@ -231,8 +310,45 @@ static void eud_role_switch_release(void *data) usb_role_switch_put(chip->role_sw); } =20 +static int eud_init_path(struct eud_chip *chip, struct device_node *np) +{ + struct eud_path *path; + u32 path_num; + int ret; + + ret =3D of_property_read_u32(np, "reg", &path_num); + if (ret) { + dev_err(chip->dev, "Missing 'reg' property in path node\n"); + return ret; + } + + if (path_num >=3D EUD_MAX_PORTS) { + dev_err(chip->dev, "Invalid path number: %u (max %d)\n", + path_num, EUD_MAX_PORTS - 1); + return -EINVAL; + } + + path =3D devm_kzalloc(chip->dev, sizeof(*path), GFP_KERNEL); + if (!path) + return -ENOMEM; + + path->chip =3D chip; + path->num =3D path_num; + + path->phy =3D devm_of_phy_get(chip->dev, np, NULL); + if (IS_ERR(path->phy)) + return dev_err_probe(chip->dev, PTR_ERR(path->phy), + "Failed to get PHY for path %d\n", path_num); + + chip->paths[path_num] =3D path; + + return 0; +} + static int eud_probe(struct platform_device *pdev) { + struct device_node *np =3D pdev->dev.of_node; + struct device_node *child; struct eud_chip *chip; struct resource *res; int ret; @@ -252,6 +368,18 @@ static int eud_probe(struct platform_device *pdev) if (ret) return ret; =20 + for_each_child_of_node(np, child) { + ret =3D eud_init_path(chip, child); + if (ret) { + of_node_put(child); + return ret; + } + } + + /* Primary path is mandatory. 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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1247d90ce0dsm19948967c88.4.2026.01.26.15.38.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jan 2026 15:38:34 -0800 (PST) From: Elson Serrao To: Greg Kroah-Hartman , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Souradeep Chowdhury Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 4/9] usb: misc: qcom_eud: add per-path role switch support Date: Mon, 26 Jan 2026 15:38:25 -0800 Message-Id: <20260126233830.2193816-5-elson.serrao@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260126233830.2193816-1-elson.serrao@oss.qualcomm.com> References: <20260126233830.2193816-1-elson.serrao@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=bIEb4f+Z c=1 sm=1 tr=0 ts=6977fafd cx=c_pps a=PfFC4Oe2JQzmKTvty2cRDw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=_OGk7KolV25BrENr9Q4A:9 a=6Ab_bkdmUrQuMsNx7PHu:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI2MDIwMiBTYWx0ZWRfXzEEk/XfyXgAC j6PD6GcewyA7T1RVrZx1ADY/yj18XJCWv7IJGSeVojlLfb6z84FerL2B0cCU6UovHO8mkkFbqYa w+j+5XENlPd0HwKCo9HwL40UlSLitGz0XW6Xv+zQqJscNDnmMNKtU3ceMMxqNFCoMVMhLkj5V+A 5gcvz9wDZxEwzlx5pUYVr8jVjq54x3iJZl6K93pL4s7Tdz+ztLwxNaPeIUxAgb05EuTNcnn+gm0 7idrpE+bEFDLILUH5gFUDaGns91ZkprytSvrqMp2150TpT3UFFPlr7HwKTAD+nSG+46AVvuronz bMDRvlp1BU9iQls5m0xKfccYrVD+x+nT1iLQPk6ETz9kFFrYhfQmmj5qoVLneeKpQFS8JL5s90k txRt0KU4lR6VPeyYURgFtYOX8OGJ4nH03JtK9eRRLJoZqHcLmkQzt7R2G+PJk965jHj2avmK7S2 xgNpNWjLmGYkSmSs8fQ== X-Proofpoint-ORIG-GUID: owkFobBJcVG7qlf45SM5Q9Zv2s8Co-Bo X-Proofpoint-GUID: owkFobBJcVG7qlf45SM5Q9Zv2s8Co-Bo X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.20,FMLib:17.12.100.49 definitions=2026-01-26_04,2026-01-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 lowpriorityscore=0 malwarescore=0 priorityscore=1501 clxscore=1015 spamscore=0 impostorscore=0 suspectscore=0 adultscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601260202 Content-Type: text/plain; charset="utf-8" The EUD hardware can support multiple High-Speed USB paths, each connected to different USB controllers. The current implementation uses a single chip-level role switch, which cannot properly handle multi-path configurations where each path needs independent role management. Since EUD is physically present between the USB connector and the controller, it should also relay the role change requests from the connector. Restructure the driver to support per-path role switches and remove the chip-level role switch. Additionally, as EUD need not modify the USB role upon enabling, remove the unnecessary role switch call from enable_eud(). Signed-off-by: Elson Serrao --- drivers/usb/misc/qcom_eud.c | 80 ++++++++++++++++++++++++++++++++----- 1 file changed, 70 insertions(+), 10 deletions(-) diff --git a/drivers/usb/misc/qcom_eud.c b/drivers/usb/misc/qcom_eud.c index 5cebb64f4a67..a58022f50484 100644 --- a/drivers/usb/misc/qcom_eud.c +++ b/drivers/usb/misc/qcom_eud.c @@ -38,12 +38,15 @@ struct eud_path { struct eud_chip *chip; struct phy *phy; + struct usb_role_switch *controller_sw; + struct usb_role_switch *eud_sw; + enum usb_role curr_role; + char name[16]; u8 num; }; =20 struct eud_chip { struct device *dev; - struct usb_role_switch *role_sw; void __iomem *base; struct eud_path *paths[EUD_MAX_PORTS]; phys_addr_t mode_mgr; @@ -129,7 +132,7 @@ static int enable_eud(struct eud_chip *priv) writel(EUD_INT_VBUS | EUD_INT_SAFE_MODE, priv->base + EUD_REG_INT1_EN_MASK); =20 - return usb_role_switch_set_role(priv->role_sw, USB_ROLE_DEVICE); + return 0; } =20 static int disable_eud(struct eud_chip *priv) @@ -287,15 +290,21 @@ static irqreturn_t handle_eud_irq(int irq, void *data) static irqreturn_t handle_eud_irq_thread(int irq, void *data) { struct eud_chip *chip =3D data; + struct eud_path *path; int ret; =20 + path =3D chip->paths[chip->port_idx]; + if (!path || !path->controller_sw) + goto clear_irq; + if (chip->usb_attached) - ret =3D usb_role_switch_set_role(chip->role_sw, USB_ROLE_DEVICE); + ret =3D usb_role_switch_set_role(path->controller_sw, USB_ROLE_DEVICE); else - ret =3D usb_role_switch_set_role(chip->role_sw, USB_ROLE_HOST); + ret =3D usb_role_switch_set_role(path->controller_sw, USB_ROLE_HOST); if (ret) dev_err(chip->dev, "failed to set role switch\n"); =20 +clear_irq: /* set and clear vbus_int_clr[0] to clear interrupt */ writel(BIT(0), chip->base + EUD_REG_VBUS_INT_CLR); writel(0, chip->base + EUD_REG_VBUS_INT_CLR); @@ -303,15 +312,45 @@ static irqreturn_t handle_eud_irq_thread(int irq, voi= d *data) return IRQ_HANDLED; } =20 +static int eud_role_switch_set(struct usb_role_switch *sw, enum usb_role r= ole) +{ + struct eud_path *path =3D usb_role_switch_get_drvdata(sw); + int ret; + + /* Forward the role request to the USB controller */ + ret =3D usb_role_switch_set_role(path->controller_sw, role); + if (ret) { + dev_err(path->chip->dev, "Failed to set role %s for port %u: %d\n", + usb_role_string(role), path->num, ret); + return ret; + } + + path->curr_role =3D role; + + return 0; +} + static void eud_role_switch_release(void *data) { struct eud_chip *chip =3D data; + int i; =20 - usb_role_switch_put(chip->role_sw); + for (i =3D 0; i < EUD_MAX_PORTS; i++) { + struct eud_path *path =3D chip->paths[i]; + + if (!path) + continue; + + if (path->eud_sw) + usb_role_switch_unregister(path->eud_sw); + if (path->controller_sw) + usb_role_switch_put(path->controller_sw); + } } =20 static int eud_init_path(struct eud_chip *chip, struct device_node *np) { + struct usb_role_switch_desc role_sw_desc =3D {}; struct eud_path *path; u32 path_num; int ret; @@ -342,6 +381,32 @@ static int eud_init_path(struct eud_chip *chip, struct= device_node *np) =20 chip->paths[path_num] =3D path; =20 + path->curr_role =3D USB_ROLE_NONE; + + if (!of_property_read_bool(np, "usb-role-switch")) + return 0; + + /* Fetch the USB controller's role switch */ + path->controller_sw =3D fwnode_usb_role_switch_get(of_fwnode_handle(np)); + if (IS_ERR(path->controller_sw)) + return dev_err_probe(chip->dev, PTR_ERR(path->controller_sw), + "Failed to get controller role switch for path %d\n", + path_num); + + /* Create a role switch */ + role_sw_desc.fwnode =3D of_fwnode_handle(np); + role_sw_desc.set =3D eud_role_switch_set; + role_sw_desc.driver_data =3D path; + snprintf(path->name, sizeof(path->name), "eud-path%u", path_num); + role_sw_desc.name =3D path->name; + + path->eud_sw =3D usb_role_switch_register(chip->dev, &role_sw_desc); + if (IS_ERR(path->eud_sw)) { + dev_err(chip->dev, "Failed to register EUD role switch for path %d: %ld\= n", + path_num, PTR_ERR(path->eud_sw)); + return PTR_ERR(path->eud_sw); + } + return 0; } =20 @@ -359,11 +424,6 @@ static int eud_probe(struct platform_device *pdev) =20 chip->dev =3D &pdev->dev; =20 - chip->role_sw =3D usb_role_switch_get(&pdev->dev); - if (IS_ERR(chip->role_sw)) - return dev_err_probe(chip->dev, PTR_ERR(chip->role_sw), - "failed to get role switch\n"); - ret =3D devm_add_action_or_reset(chip->dev, eud_role_switch_release, chip= ); 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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1247d90ce0dsm19948967c88.4.2026.01.26.15.38.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jan 2026 15:38:35 -0800 (PST) From: Elson Serrao To: Greg Kroah-Hartman , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Souradeep Chowdhury Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 5/9] usb: misc: qcom_eud: improve enable_store API Date: Mon, 26 Jan 2026 15:38:26 -0800 Message-Id: <20260126233830.2193816-6-elson.serrao@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260126233830.2193816-1-elson.serrao@oss.qualcomm.com> References: <20260126233830.2193816-1-elson.serrao@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=OYOVzxTY c=1 sm=1 tr=0 ts=6977fafd cx=c_pps a=SvEPeNj+VMjHSW//kvnxuw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=iEam2xx7WbKG8qDqzoQA:9 a=Kq8ClHjjuc5pcCNDwlU0:22 X-Proofpoint-GUID: 5IcGEtqx0BjQMmt8AZzISVnJWLJ7QWHv X-Proofpoint-ORIG-GUID: 5IcGEtqx0BjQMmt8AZzISVnJWLJ7QWHv X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI2MDIwMiBTYWx0ZWRfXxhcxYLUEJgxz VGeBgtGng063ldwyAmbTvYQjTPPp+MixVkPlPowBKUL8Q4cmi8fhF1tj0vixozCOfnSPKuwLBG6 VtHwj+vsq4y9sWaRN6y3OQcBh6f8qmcwHKEJuL+tropULUKFtFi2CvbFmJGx0VnbOuxGkbc0fDh m2+Uq2D/4bfzBcZp/qWl8BMjtqUbh+SgC0SBkEzr0P4mUpz/+KBCstDcvC0uVEti1moeFFWkP8Z Erfw1TfxNZ5zUnJz+IfRTsy792BdlYEskCDI9w8HhhfL9zXc7MlEJ+yy/SMioUnZeSydTt6VmjT 75Cw0dQ1DR9qMaeMEq5hxhVV9dw99EngfsmeGEVbmm6YHRwcHzqdVIRI0zidprxZz+yKzHUIhY+ A+2gJ8M4tJvzbSyDHS3dKOAHB30W2ek/g+m20pnKK1Jz5HFb+uA9kBGjbKTHq84hTZcF+S9RDZG Vavz6Lt829hpmG/62RQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.20,FMLib:17.12.100.49 definitions=2026-01-26_04,2026-01-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 priorityscore=1501 adultscore=0 spamscore=0 impostorscore=0 suspectscore=0 lowpriorityscore=0 malwarescore=0 phishscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601260202 Content-Type: text/plain; charset="utf-8" Currently enable_store() allows operations irrespective of the EUD state, which can result in redundant operations. Avoid this by adding duplicate state checks to skip requests when EUD is already in the desired state. Additionally, improve error handling with explicit logging to provide better feedback. Signed-off-by: Elson Serrao Reviewed-by: Konrad Dybcio --- drivers/usb/misc/qcom_eud.c | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/drivers/usb/misc/qcom_eud.c b/drivers/usb/misc/qcom_eud.c index a58022f50484..0ea6491f963c 100644 --- a/drivers/usb/misc/qcom_eud.c +++ b/drivers/usb/misc/qcom_eud.c @@ -168,18 +168,27 @@ static ssize_t enable_store(struct device *dev, if (kstrtobool(buf, &enable)) return -EINVAL; =20 + /* Skip operation if already in desired state */ + if (chip->enabled =3D=3D enable) + return count; + if (enable) { ret =3D enable_eud(chip); - if (!ret) - chip->enabled =3D enable; - else - disable_eud(chip); - + if (ret) { + dev_err(chip->dev, "failed to enable eud\n"); + return ret; + } } else { ret =3D disable_eud(chip); + if (ret) { + dev_err(chip->dev, "failed to disable eud\n"); + return ret; + } } =20 - return ret < 0 ? ret : count; + chip->enabled =3D enable; + + return count; } =20 static DEVICE_ATTR_RW(enable); --=20 2.34.1 From nobody Sun Feb 8 13:53:48 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 974143128CB for ; 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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1247d90ce0dsm19948967c88.4.2026.01.26.15.38.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jan 2026 15:38:36 -0800 (PST) From: Elson Serrao To: Greg Kroah-Hartman , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Souradeep Chowdhury Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 6/9] usb: misc: qcom_eud: add host mode coordination Date: Mon, 26 Jan 2026 15:38:27 -0800 Message-Id: <20260126233830.2193816-7-elson.serrao@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260126233830.2193816-1-elson.serrao@oss.qualcomm.com> References: <20260126233830.2193816-1-elson.serrao@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: RU8x4RxDrHYpmG8JhSEg241Ir6M-faHL X-Authority-Analysis: v=2.4 cv=YpcChoYX c=1 sm=1 tr=0 ts=6977fafe cx=c_pps a=bS7HVuBVfinNPG3f6cIo3Q==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=0DRR6HtdnbDkULtDn-kA:9 a=vBUdepa8ALXHeOFLBtFW:22 X-Proofpoint-ORIG-GUID: RU8x4RxDrHYpmG8JhSEg241Ir6M-faHL X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI2MDIwMiBTYWx0ZWRfXz62S0PMqgS3/ l7YFZYJTpYklnKb3yF+DXncplDjmSoCSXGGlXyY8r1kAvzQS14lXy0Y8pGPCanYZjlZlUtB2dSx YigrTBOskK6NmNohzR3JHgN772/KLACPS0zYVYtueWv9/h5dzDgCDrNGWaFx8biHTRyerkfE9i9 SG9b1KHVkr6ofWwaId5+uvdnlwl3BWlJo5azesWIgalj8zX8zxpRdZ02DcZP2YESVCjbUNJ/4xc y8zWGFXZzaDDnV9SmLtCXyE0HiZ48yZFN4KszHv8VV+iEAzIvSVINDyEhhj+YeLB7Kobaz5IVK3 VCxu77X7/eH7vwzXpe7ZHYV65o+fYlSz8S0GJY5v/tFSsyUG0P68ZkmyeSvtZ0KumlUjXmkubHj dnVmVnpjVRDwa3A5OgO/g6zlmX80T8TolB0wZZ1fc2XSSnXze/5rv9lgpG7k4VV2yHoNgNJV+VB a0KYdY2XWTg7ONhjWXQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.20,FMLib:17.12.100.49 definitions=2026-01-26_04,2026-01-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 clxscore=1015 phishscore=0 impostorscore=0 suspectscore=0 spamscore=0 malwarescore=0 bulkscore=0 adultscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601260202 Content-Type: text/plain; charset="utf-8" EUD functions by presenting itself as a USB device to the host PC for debugging, making it incompatible in USB host mode configurations. Enabling EUD, when in host mode can also cause the USB controller to misbehave as the EUD hub can only have one upstream facing port. Handle below two scenarios to prevent these conflicts: 1. Prevent user from enabling EUD via sysfs when the USB port is in host mode. 2. Automatically disable EUD when USB port switches to host mode and re-enable it when exiting host mode. This ensures consistent state management without creating conflicts between the EUD debug hub and the USB controller. Signed-off-by: Elson Serrao --- drivers/usb/misc/qcom_eud.c | 79 ++++++++++++++++++++++++++++++++++++- 1 file changed, 78 insertions(+), 1 deletion(-) diff --git a/drivers/usb/misc/qcom_eud.c b/drivers/usb/misc/qcom_eud.c index 0ea6491f963c..3f1cc7ea2a6a 100644 --- a/drivers/usb/misc/qcom_eud.c +++ b/drivers/usb/misc/qcom_eud.c @@ -49,12 +49,15 @@ struct eud_chip { struct device *dev; void __iomem *base; struct eud_path *paths[EUD_MAX_PORTS]; + /* serializes EUD control operations */ + struct mutex state_lock; phys_addr_t mode_mgr; unsigned int int_status; int irq; bool enabled; bool usb_attached; bool phy_enabled; + bool eud_disabled_for_host; u8 port_idx; }; =20 @@ -162,32 +165,66 @@ static ssize_t enable_store(struct device *dev, const char *buf, size_t count) { struct eud_chip *chip =3D dev_get_drvdata(dev); + struct eud_path *path; bool enable; int ret; =20 if (kstrtobool(buf, &enable)) return -EINVAL; =20 + mutex_lock(&chip->state_lock); + /* Skip operation if already in desired state */ - if (chip->enabled =3D=3D enable) + if (chip->enabled =3D=3D enable) { + mutex_unlock(&chip->state_lock); return count; + } + + /* + * Handle double-disable scenario: User is disabling EUD that was already + * disabled due to host mode. Since the hardware is already disabled, we + * only need to clear the host-disabled flag to prevent unwanted re-enabl= ing + * when exiting host mode. This respects the user's explicit disable requ= est. + */ + if (!enable && chip->eud_disabled_for_host) { + chip->eud_disabled_for_host =3D false; + chip->enabled =3D false; + mutex_unlock(&chip->state_lock); + return count; + } =20 if (enable) { + /* + * EUD functions by presenting itself as a USB device to the host PC for + * debugging, making it incompatible in USB host mode configuration. + * Prevent enabling EUD in this configuration to avoid hardware conflict= s. + */ + path =3D chip->paths[chip->port_idx]; + if (path && path->curr_role =3D=3D USB_ROLE_HOST) { + dev_err(chip->dev, "EUD not usable in host mode configuration\n"); + mutex_unlock(&chip->state_lock); + return -EBUSY; + } + ret =3D enable_eud(chip); if (ret) { dev_err(chip->dev, "failed to enable eud\n"); + mutex_unlock(&chip->state_lock); return ret; } } else { ret =3D disable_eud(chip); if (ret) { dev_err(chip->dev, "failed to disable eud\n"); + mutex_unlock(&chip->state_lock); return ret; } } =20 chip->enabled =3D enable; =20 + mutex_unlock(&chip->state_lock); + return count; } =20 @@ -324,18 +361,56 @@ static irqreturn_t handle_eud_irq_thread(int irq, voi= d *data) static int eud_role_switch_set(struct usb_role_switch *sw, enum usb_role r= ole) { struct eud_path *path =3D usb_role_switch_get_drvdata(sw); + struct eud_chip *chip =3D path->chip; int ret; =20 + mutex_lock(&chip->state_lock); + + /* + * EUD must be disabled when USB operates in host mode. EUD functions by + * presenting itself as a USB device to the host PC for debugging, making + * it incompatible in host mode configuration. + * + * chip->enabled preserves user's sysfs configuration and is not modified + * during host mode transitions to maintain user intent. + */ + + /* Only act if EUD is enabled and this is the active path */ + if (chip->enabled && path->num =3D=3D chip->port_idx) { + if (role =3D=3D USB_ROLE_HOST && !chip->eud_disabled_for_host) { + ret =3D disable_eud(chip); + if (ret) { + dev_err(chip->dev, "Failed to disable EUD for host mode: %d\n", + ret); + mutex_unlock(&chip->state_lock); + return ret; + } + chip->eud_disabled_for_host =3D true; + } else if (role !=3D USB_ROLE_HOST && chip->eud_disabled_for_host) { + ret =3D enable_eud(chip); + if (ret) { + dev_err(chip->dev, "Failed to re-enable EUD after host mode: %d\n", + ret); + mutex_unlock(&chip->state_lock); + return ret; + } + chip->eud_disabled_for_host =3D false; + } + } + /* Forward the role request to the USB controller */ ret =3D usb_role_switch_set_role(path->controller_sw, role); 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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1247d90ce0dsm19948967c88.4.2026.01.26.15.38.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jan 2026 15:38:37 -0800 (PST) From: Elson Serrao To: Greg Kroah-Hartman , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Souradeep Chowdhury Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 7/9] usb: misc: qcom_eud: fix virtual attach/detach event handling Date: Mon, 26 Jan 2026 15:38:28 -0800 Message-Id: <20260126233830.2193816-8-elson.serrao@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260126233830.2193816-1-elson.serrao@oss.qualcomm.com> References: <20260126233830.2193816-1-elson.serrao@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI2MDIwMiBTYWx0ZWRfXy4+YSqjVxF3i bjvEhE7HAH/+Y6PCM63xkyspwPJCLj5VnIMJX7OLreZgIy+DJeYfltov9vJDGlgfFUOKb4eSL4E YcMM9ZVFh+/ROMOTZxJ2Z8j5P9pD56oeZUaqceUasnsXiQqag07XnxTWRfOaaLC3kiCHeg3mLOz GyluD41Xk1lWYrc/oZDRBB5IVgZ29ZcEiVoQJfOHUzO2C6/GmDaf+ywHplQe3i/yfEgwrVqUAgx cXuzmZer9DhvLJEJKOwplO+0VxQnuhXKlp2r7mLrcSTrc89kWDtS7DYDlk1PSzBwHyXNW9XuCq5 9Ov9IodSTl7UjaMDXu8r/6S4r73j0ZdUdRhTuTkOGQmoSuatQnfmv+tnZiL3tgeHXmffrMJOc+P e+FsII+VxB9+a3IJoivEYTS6sGkJ0EPPt6/Pnfi072LaTOMI8GE1xX7f6O+kg63zy1n08KArspt 0XVzoPl3rmxbs/0uVHQ== X-Authority-Analysis: v=2.4 cv=Uc1ciaSN c=1 sm=1 tr=0 ts=6977faff cx=c_pps a=SvEPeNj+VMjHSW//kvnxuw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=oDIJ3hVRoRHbvujwG_AA:9 a=Kq8ClHjjuc5pcCNDwlU0:22 X-Proofpoint-ORIG-GUID: 9cHmkIg7MVgit8IuH2fYg-ot9UWUGQvJ X-Proofpoint-GUID: 9cHmkIg7MVgit8IuH2fYg-ot9UWUGQvJ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.20,FMLib:17.12.100.49 definitions=2026-01-26_04,2026-01-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 priorityscore=1501 impostorscore=0 malwarescore=0 phishscore=0 spamscore=0 bulkscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601260202 Content-Type: text/plain; charset="utf-8" EUD provides virtual USB attach/detach events to simulate cable plug/unplug while maintaining the physical debug connection. However, the current implementation incorrectly sets the USB role to HOST on virtual detach, which doesn't represent the disconnected state. Fix the virtual detach handling by setting the USB role to NONE instead of HOST, correctly representing the disconnected state. Signed-off-by: Elson Serrao Reviewed-by: Konrad Dybcio --- drivers/usb/misc/qcom_eud.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/usb/misc/qcom_eud.c b/drivers/usb/misc/qcom_eud.c index 3f1cc7ea2a6a..60f566427abe 100644 --- a/drivers/usb/misc/qcom_eud.c +++ b/drivers/usb/misc/qcom_eud.c @@ -343,10 +343,26 @@ static irqreturn_t handle_eud_irq_thread(int irq, voi= d *data) if (!path || !path->controller_sw) goto clear_irq; =20 + /* + * EUD virtual attach/detach event handling for low power debugging: + * + * When EUD is enabled in debug mode, the device remains physically + * connected to the PC throughout the debug session, keeping the USB + * controller active. This prevents testing of low power scenarios that + * require USB disconnection. + * + * EUD solves this by providing virtual USB attach/detach events while + * maintaining the physical connection. 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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1247d90ce0dsm19948967c88.4.2026.01.26.15.38.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jan 2026 15:38:38 -0800 (PST) From: Elson Serrao To: Greg Kroah-Hartman , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Souradeep Chowdhury Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 8/9] arm64: dts: qcom: kodiak: Align EUD node with binding Date: Mon, 26 Jan 2026 15:38:29 -0800 Message-Id: <20260126233830.2193816-9-elson.serrao@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260126233830.2193816-1-elson.serrao@oss.qualcomm.com> References: <20260126233830.2193816-1-elson.serrao@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: jrbr2ERp8FLw3qY0uvcTAUTOxyRMBrCb X-Proofpoint-GUID: jrbr2ERp8FLw3qY0uvcTAUTOxyRMBrCb X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI2MDIwMiBTYWx0ZWRfX6Rk5Dcmj7wZo HtGqo//3SUyqtRpGiMzsIgnzbcw9drWwQRrn1yRCMoXB0l0SXuwjldR5ZcCy8+v1sCFIIxiMJbj Wdvo2mnrMcE+m2U9BqAWMJGtmOzxif50ZujoUWS86DS1WKC92QiHAUy+BGKJ8DicznhygfwvyuQ 4kcd1OBoqObZF2zDp2gkfmunljk1mqIrEfPxcRRp6R9kNNzD+D8IiTEwB5Ant8GYlOWA5qSDeq4 VL9K+qMVRNtsUgk8hM8x4VQmwbvOP8j2Cp4WTXgsaoYE7RNByxYAxYnLWgnxOIUzDbTHEeKPIRv 4LKEmmh1okiiBFnRSWjifGguavishRzPItY25aWdUNNJmUAIwnsIEdv+UYKo5FcyHYHdhStJCw2 jQhWc75x6WD9F7PWrBe2XfR5+a9v1HnzXKRyyT6bJYo5aszisXVgUZB7uBWKKLmAZHk2LO31ZTe WrLWlZBP6PevaeizFDQ== X-Authority-Analysis: v=2.4 cv=IdyKmGqa c=1 sm=1 tr=0 ts=6977fb00 cx=c_pps a=kVLUcbK0zfr7ocalXnG1qA==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=OcAoOLw2Dr_w_q-oR68A:9 a=vr4QvYf-bLy2KjpDp97w:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.20,FMLib:17.12.100.49 definitions=2026-01-26_04,2026-01-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 phishscore=0 adultscore=0 malwarescore=0 clxscore=1015 bulkscore=0 priorityscore=1501 spamscore=0 suspectscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601260202 Content-Type: text/plain; charset="utf-8" The EUD node does not match the current binding and maps USB endpoints to the secondary controller. This SoC supports EUD only on the primary High-Speed USB path. The binding also requires a per-path PHY reference. Model the primary UTMI path as a child node with the required PHY and an empty ports graph. Leave endpoint mapping to board DTS files, and remove the secondary mapping and associated ports so the description conforms to the binding. Signed-off-by: Elson Serrao --- arch/arm64/boot/dts/qcom/kodiak.dtsi | 33 +++++++++++++++++----------- 1 file changed, 20 insertions(+), 13 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qco= m/kodiak.dtsi index c2ccbb67f800..35c47a6b03f7 100644 --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi @@ -4284,12 +4284,6 @@ usb_2: usb@8c00000 { phy-names =3D "usb2-phy"; maximum-speed =3D "high-speed"; usb-role-switch; - - port { - usb2_role_switch: endpoint { - remote-endpoint =3D <&eud_ep>; - }; - }; }; =20 qspi: spi@88dc000 { @@ -4610,16 +4604,29 @@ eud: eud@88e0000 { <0 0x88e2000 0 0x1000>; interrupts-extended =3D <&pdc 11 IRQ_TYPE_LEVEL_HIGH>; =20 + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; =20 - ports { - #address-cells =3D <1>; - #size-cells =3D <0>; + eud0: eud-path@0 { + reg =3D <0>; + phys =3D <&usb_1_hsphy>; =20 - port@0 { - reg =3D <0>; - eud_ep: endpoint { - remote-endpoint =3D <&usb2_role_switch>; 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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1247d90ce0dsm19948967c88.4.2026.01.26.15.38.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jan 2026 15:38:38 -0800 (PST) From: Elson Serrao To: Greg Kroah-Hartman , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Souradeep Chowdhury Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 9/9] arm64: dts: qcom: qcs6490-rb3gen2: Enable EUD debug functionality Date: Mon, 26 Jan 2026 15:38:30 -0800 Message-Id: <20260126233830.2193816-10-elson.serrao@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260126233830.2193816-1-elson.serrao@oss.qualcomm.com> References: <20260126233830.2193816-1-elson.serrao@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=OYOVzxTY c=1 sm=1 tr=0 ts=6977fb00 cx=c_pps a=kVLUcbK0zfr7ocalXnG1qA==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=bAolQom50hykzV7YMrMA:9 a=vr4QvYf-bLy2KjpDp97w:22 X-Proofpoint-GUID: T18Xo4rdR7mAe2an0gXMXUrNJaMVB2Rf X-Proofpoint-ORIG-GUID: T18Xo4rdR7mAe2an0gXMXUrNJaMVB2Rf X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI2MDIwMiBTYWx0ZWRfX7A/sbwmf/nO0 iwyK0Eht3jvYgG3IOrlJfDaTEfU0Rqd39QyPA+2KAhfLDFdK3dUsnO3eUGay34V5/pH2nKWDtCI erEVXlDtfotS4aFpiXyL5hYTie+eZeIs644+eX7slwlW5XC5BVOJBbQcdH2UIgkQSYgxhfbXB+Q mcn+LY3INAelSAZq4ybjSpD4RdHHtEITq/8krZ+MP9vHwAz9JEIljLeoQOi6lmYml4OSPXUK9u0 2TMMASFUrV/Xb5VVUGiSVFj9lov5PyeHzqdlPZRyhYCdbbOPd2p1uwQmI7BEHGljpjt1V6LhsW3 6pFRR2hjvmMGevT7SUytqjNUznTyQ4g2Raunv16QJAJpc4bRNLHiSSbYwsGU6I4tDthO2+7mA0M VuSjmsAS390CBTdOtCcsodbyCC78gyAqzv2SBsPGzNNt9DITm+B/fBhKQEKzrA82aUWXhzG4Mp7 pbiRyN8bIpmgYDTeNuA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.20,FMLib:17.12.100.49 definitions=2026-01-26_04,2026-01-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 priorityscore=1501 adultscore=0 spamscore=0 impostorscore=0 suspectscore=0 lowpriorityscore=0 malwarescore=0 phishscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601260202 Content-Type: text/plain; charset="utf-8" On this board, EUD resides on the primary High-Speed USB data path between the connector and the DWC3 controller. Update the device tree connections to correctly map the connector and controller endpoints, and describe role-switch capability on the EUD primary path. Signed-off-by: Elson Serrao --- arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot= /dts/qcom/qcs6490-rb3gen2.dts index f29a352b0288..2fc2d0aed8dd 100644 --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts @@ -194,7 +194,7 @@ port@0 { reg =3D <0>; =20 pmic_glink_hs_in: endpoint { - remote-endpoint =3D <&usb_1_dwc3_hs>; + remote-endpoint =3D <&eud_con0>; }; }; =20 @@ -1176,13 +1176,29 @@ &usb_1 { }; =20 &usb_1_dwc3_hs { - remote-endpoint =3D <&pmic_glink_hs_in>; + remote-endpoint =3D <&eud_usb0>; }; =20 &usb_1_dwc3_ss { remote-endpoint =3D <&usb_dp_qmpphy_usb_ss_in>; }; =20 +&eud_con0 { + remote-endpoint =3D <&pmic_glink_hs_in>; +}; + +&eud_usb0 { + remote-endpoint =3D <&usb_1_dwc3_hs>; +}; + +&eud { + status =3D "okay"; +}; + +&eud0 { + usb-role-switch; +}; + &usb_1_hsphy { vdda-pll-supply =3D <&vreg_l10c_0p88>; vdda33-supply =3D <&vreg_l2b_3p072>; --=20 2.34.1