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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Jan 2026 19:28:19.4352 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4fde5bee-988d-4d2b-b7e4-08de5d110fd7 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000F0E3.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYXPR12MB9444 Content-Type: text/plain; charset="utf-8" This patch introduces a new PCI driver for AMD Versal-based accelerator cards. The driver provides basic module and PCI device initialization, based on BAR resources used to establish a hardware queue-based ring buffer between the PCIe host and the Versal Management Runtime (VMR) service running on the embedded SoC. This interface enables firmware management and board health monitoring. Key features: - PCI probe and BAR resource initialization. - Integration with configfs for firmware management - Compatibility check using firmware-reported UUIDs The base firmware image is expected under /lib/firmware/xilinx/ and can be programmed to the device through the configfs interface. Firmware transfer is handled via a remote queue service (added in a later patch). Co-developed-by: DMG Karthik Signed-off-by: DMG Karthik Co-developed-by: Nishad Saraf Signed-off-by: Nishad Saraf Signed-off-by: David Zhang --- MAINTAINERS | 5 + drivers/accel/Kconfig | 1 + drivers/accel/Makefile | 3 +- drivers/accel/amd_vpci/Kconfig | 15 ++ drivers/accel/amd_vpci/Makefile | 6 + drivers/accel/amd_vpci/versal-pci-main.c | 280 +++++++++++++++++++++++ drivers/accel/amd_vpci/versal-pci.h | 62 +++++ 7 files changed, 371 insertions(+), 1 deletion(-) create mode 100644 drivers/accel/amd_vpci/Kconfig create mode 100644 drivers/accel/amd_vpci/Makefile create mode 100644 drivers/accel/amd_vpci/versal-pci-main.c create mode 100644 drivers/accel/amd_vpci/versal-pci.h diff --git a/MAINTAINERS b/MAINTAINERS index 6863d5fa07a1..8fb7276eb7c1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1271,6 +1271,11 @@ F: drivers/spi/spi-amd-pci.c F: drivers/spi/spi-amd.c F: drivers/spi/spi-amd.h =20 +AMD VERSAL PCI DRIVER +M: Yidong Zhang +S: Supported +F: drivers/accel/amd_vpci/ + AMD XDNA DRIVER M: Min Ma M: Lizhi Hou diff --git a/drivers/accel/Kconfig b/drivers/accel/Kconfig index bdf48ccafcf2..f80998fdb3fc 100644 --- a/drivers/accel/Kconfig +++ b/drivers/accel/Kconfig @@ -25,6 +25,7 @@ menuconfig DRM_ACCEL and debugfs). =20 source "drivers/accel/amdxdna/Kconfig" +source "drivers/accel/amd_vpci/Kconfig" source "drivers/accel/ethosu/Kconfig" source "drivers/accel/habanalabs/Kconfig" source "drivers/accel/ivpu/Kconfig" diff --git a/drivers/accel/Makefile b/drivers/accel/Makefile index 1d3a7251b950..be62e08bbef1 100644 --- a/drivers/accel/Makefile +++ b/drivers/accel/Makefile @@ -1,8 +1,9 @@ # SPDX-License-Identifier: GPL-2.0-only =20 obj-$(CONFIG_DRM_ACCEL_AMDXDNA) +=3D amdxdna/ +obj-$(CONFIG_DRM_ACCEL_AMD_VPCI) +=3D amd_vpci/ obj-$(CONFIG_DRM_ACCEL_ARM_ETHOSU) +=3D ethosu/ obj-$(CONFIG_DRM_ACCEL_HABANALABS) +=3D habanalabs/ obj-$(CONFIG_DRM_ACCEL_IVPU) +=3D ivpu/ obj-$(CONFIG_DRM_ACCEL_QAIC) +=3D qaic/ -obj-$(CONFIG_DRM_ACCEL_ROCKET) +=3D rocket/ \ No newline at end of file +obj-$(CONFIG_DRM_ACCEL_ROCKET) +=3D rocket/ diff --git a/drivers/accel/amd_vpci/Kconfig b/drivers/accel/amd_vpci/Kconfig new file mode 100644 index 000000000000..dcf83bf3d8e6 --- /dev/null +++ b/drivers/accel/amd_vpci/Kconfig @@ -0,0 +1,15 @@ +# SPDX-License-Identifier: GPL-2.0-only + +config DRM_ACCEL_AMD_VPCI + tristate "AMD Versal PCIe Management Driver" + depends on DRM_ACCEL + depends on PCI && HAS_IOMEM + select FW_LOADER + select CONFIGFS_FS + default m + help + AMD Versal PCIe Management Driver provides management services, + including download firmware, program bitstream, and communicate with + the User function. + + If "M" is selected, the driver module will be versal-pci diff --git a/drivers/accel/amd_vpci/Makefile b/drivers/accel/amd_vpci/Makef= ile new file mode 100644 index 000000000000..03849875ad0b --- /dev/null +++ b/drivers/accel/amd_vpci/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0+ + +obj-$(CONFIG_DRM_ACCEL_AMD_VPCI) :=3D versal-pci.o + +versal-pci-y :=3D \ + versal-pci-main.o diff --git a/drivers/accel/amd_vpci/versal-pci-main.c b/drivers/accel/amd_v= pci/versal-pci-main.c new file mode 100644 index 000000000000..36f88d5aee95 --- /dev/null +++ b/drivers/accel/amd_vpci/versal-pci-main.c @@ -0,0 +1,280 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Driver for Versal PCIe device + * + * Copyright (C) 2026 Advanced Micro Devices, Inc. All rights reserved. + */ + +#include + +#include "versal-pci.h" + +#define DRV_NAME "amd-versal-pci" + +#define PCI_DEVICE_ID_V70PQ2 0x50B0 +#define PCI_DEVICE_ID_RAVE 0x5700 +#define VERSAL_XCLBIN_MAGIC_ID "xclbin2" + +static inline u32 versal_pci_devid(struct versal_pci_device *vdev) +{ + return ((pci_domain_nr(vdev->pdev->bus) << 16) | + PCI_DEVID(vdev->pdev->bus->number, vdev->pdev->devfn)); +} + +static int versal_pci_load_shell(struct versal_pci_device *vdev, char *fw_= name) +{ + const struct firmware *fw; + struct axlf *xsabin; + int ret; + + strim(fw_name); + + ret =3D request_firmware(&fw, fw_name, &vdev->pdev->dev); + if (ret) { + vdev_warn(vdev, "request xsabin fw %s failed %d", fw_name, ret); + return ret; + } + + xsabin =3D (struct axlf *)fw->data; + if (memcmp(xsabin->magic, VERSAL_XCLBIN_MAGIC_ID, strlen(VERSAL_XCLBIN_MA= GIC_ID))) { + vdev_err(vdev, "Invalid device firmware"); + ret =3D -EINVAL; + goto release_firmware; + } + + if (!fw->size || + fw->size !=3D xsabin->header.length || + fw->size < sizeof(*xsabin) || + fw->size > SZ_1G) { + vdev_err(vdev, "Invalid device firmware size %zu", fw->size); + ret =3D -EINVAL; + goto release_firmware; + } + + if (!uuid_equal(&vdev->intf_uuid, &xsabin->header.rom_uuid)) { + vdev_err(vdev, "base shell doesn't match uuid %pUb", &xsabin->header.rom= _uuid); + ret =3D -EINVAL; + goto release_firmware; + } + + /* TODO upload fw to card */ + if (ret) { + vdev_err(vdev, "failed to load xsabin %s : %d", fw_name, ret); + goto release_firmware; + } + + vdev_info(vdev, "Downloaded xsabin %pUb of size %lld Bytes", + &xsabin->header.uuid, xsabin->header.length); + +release_firmware: + release_firmware(fw); + + return ret; +} + +static inline struct versal_pci_device *item_to_vdev(struct config_item *i= tem) +{ + return container_of(to_configfs_subsystem(to_config_group(item)), + struct versal_pci_device, cfs_subsys); +} + +static ssize_t versal_pci_cfs_config_store(struct config_item *item, + const char *page, size_t count) +{ + struct versal_pci_device *vdev =3D item_to_vdev(item); + u32 config; + int ret; + + ret =3D kstrtou32(page, 0, &config); + if (ret) + return -EINVAL; + + if (config) + ret =3D versal_pci_load_shell(vdev, vdev->fw.name); + + if (ret) + return -EFAULT; + + return count; +} +CONFIGFS_ATTR_WO(versal_pci_cfs_, config); + +static ssize_t versal_pci_cfs_image_show(struct config_item *item, char *p= age) +{ + struct versal_pci_device *vdev =3D item_to_vdev(item); + + vdev_info(vdev, "fw name: %s", vdev->fw.name); + + return 0; +} + +static ssize_t versal_pci_cfs_image_store(struct config_item *item, + const char *page, size_t count) +{ + struct versal_pci_device *vdev =3D item_to_vdev(item); + + count =3D snprintf(vdev->fw.name, sizeof(vdev->fw.name), "%s", page); + + vdev_info(vdev, "fw name: %s", vdev->fw.name); + return count; +} +CONFIGFS_ATTR(versal_pci_cfs_, image); + +static struct configfs_attribute *versal_pci_cfs_attrs[] =3D { + &versal_pci_cfs_attr_config, + &versal_pci_cfs_attr_image, + NULL, +}; + +static const struct config_item_type versal_pci_cfs_table =3D { + .ct_owner =3D THIS_MODULE, + .ct_attrs =3D versal_pci_cfs_attrs, +}; + +static int versal_pci_cfs_init(struct versal_pci_device *vdev) +{ + struct configfs_subsystem *subsys =3D &vdev->cfs_subsys; + + snprintf(subsys->su_group.cg_item.ci_namebuf, + sizeof(subsys->su_group.cg_item.ci_namebuf), + "%s%x", DRV_NAME, versal_pci_devid(vdev)); + + subsys->su_group.cg_item.ci_type =3D &versal_pci_cfs_table; + + config_group_init(&subsys->su_group); + return configfs_register_subsystem(subsys); +} + +static void versal_pci_fw_fini(struct versal_pci_device *vdev) +{ + uuid_copy(&vdev->intf_uuid, &uuid_null); +} + +static void versal_pci_cfs_fini(struct configfs_subsystem *subsys) +{ + configfs_unregister_subsystem(subsys); +} + +static void versal_pci_device_teardown(struct versal_pci_device *vdev) +{ + versal_pci_cfs_fini(&vdev->cfs_subsys); + versal_pci_fw_fini(vdev); +} + +static int versal_pci_uuid_parse(struct versal_pci_device *vdev, uuid_t *u= uid) +{ + char str[UUID_STRING_LEN]; + u8 i, j; + int len =3D strlen(vdev->fw_id); + + /* parse uuid into a valid uuid string format */ + for (i =3D 0, j =3D 0; i < len && i < sizeof(str); i++) { + str[j++] =3D vdev->fw_id[i]; + if (j =3D=3D 8 || j =3D=3D 13 || j =3D=3D 18 || j =3D=3D 23) + str[j++] =3D '-'; + } + + if (uuid_parse(str, uuid)) { + vdev_warn(vdev, "Invalid fw_id format"); + return -EINVAL; + } + + vdev_info(vdev, "Interface uuid %pU", uuid); + return 0; +} + +static int versal_pci_fw_init(struct versal_pci_device *vdev) +{ + int ret; + + /* TODO request compatible fw_id from card */ + + ret =3D versal_pci_uuid_parse(vdev, &vdev->intf_uuid); + + return ret; +} + +static int versal_pci_device_setup(struct versal_pci_device *vdev) +{ + int ret; + + ret =3D versal_pci_fw_init(vdev); + if (ret) { + vdev_err(vdev, "Failed to init fw, err %d", ret); + goto comm_chan_fini; + } + + ret =3D versal_pci_cfs_init(vdev); + if (ret) { + vdev_err(vdev, "Failed to init configfs subsys, err %d", ret); + goto comm_chan_fini; + } + + return 0; + +comm_chan_fini: + versal_pci_fw_fini(vdev); + + return ret; +} + +static void versal_pci_remove(struct pci_dev *pdev) +{ + struct versal_pci_device *vdev =3D pci_get_drvdata(pdev); + + versal_pci_device_teardown(vdev); +} + +static int versal_pci_probe(struct pci_dev *pdev, const struct pci_device_= id *pdev_id) +{ + struct versal_pci_device *vdev; + int ret; + + vdev =3D devm_kzalloc(&pdev->dev, sizeof(*vdev), GFP_KERNEL); + if (!vdev) + return -ENOMEM; + + pci_set_drvdata(pdev, vdev); + vdev->pdev =3D pdev; + + ret =3D pcim_enable_device(pdev); + if (ret) { + vdev_err(vdev, "Failed to enable device %d", ret); + return ret; + } + + vdev->io_regs =3D pcim_iomap_region(vdev->pdev, MGMT_BAR, DRV_NAME); + if (IS_ERR(vdev->io_regs)) { + vdev_err(vdev, "Failed to map RM shared memory BAR%d", MGMT_BAR); + return PTR_ERR(vdev->io_regs); + } + + ret =3D versal_pci_device_setup(vdev); + if (ret) { + vdev_err(vdev, "Failed to setup Versal device %d", ret); + return ret; + } + + return 0; +} + +static const struct pci_device_id versal_pci_ids[] =3D { + { PCI_DEVICE(PCI_VENDOR_ID_XILINX, PCI_DEVICE_ID_V70PQ2), }, + { PCI_DEVICE(PCI_VENDOR_ID_XILINX, PCI_DEVICE_ID_RAVE), }, + { 0 } +}; + +MODULE_DEVICE_TABLE(pci, versal_pci_ids); + +static struct pci_driver versal_pci_driver =3D { + .name =3D DRV_NAME, + .id_table =3D versal_pci_ids, + .probe =3D versal_pci_probe, + .remove =3D versal_pci_remove, +}; + +module_pci_driver(versal_pci_driver); + +MODULE_DESCRIPTION("AMD Versal PCIe Management Driver"); +MODULE_AUTHOR("XRT Team "); +MODULE_LICENSE("GPL"); diff --git a/drivers/accel/amd_vpci/versal-pci.h b/drivers/accel/amd_vpci/v= ersal-pci.h new file mode 100644 index 000000000000..890da1d6bcc9 --- /dev/null +++ b/drivers/accel/amd_vpci/versal-pci.h @@ -0,0 +1,62 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Driver for Versal PCIe device + * + * Copyright (C) 2026 Advanced Micro Devices, Inc. All rights reserved. + */ + +#ifndef __VERSAL_PCI_H +#define __VERSAL_PCI_H + +#include +#include + +#define MGMT_BAR 0 + +#define vdev_info(vdev, fmt, args...) \ + dev_info(&(vdev)->pdev->dev, "%s: "fmt, __func__, ##args) + +#define vdev_warn(vdev, fmt, args...) \ + dev_warn(&(vdev)->pdev->dev, "%s: "fmt, __func__, ##args) + +#define vdev_err(vdev, fmt, args...) \ + dev_err(&(vdev)->pdev->dev, "%s: "fmt, __func__, ##args) + +#define vdev_dbg(vdev, fmt, args...) \ + dev_dbg(&(vdev)->pdev->dev, fmt, ##args) + +struct versal_pci_device; + +struct axlf_header { + __u64 length; + __u8 reserved1[24]; + uuid_t rom_uuid; + __u8 reserved2[64]; + uuid_t uuid; + __u8 reserved3[24]; +} __packed; + +struct axlf { + __u8 magic[8]; + __u8 reserved[296]; + struct axlf_header header; +} __packed; + +struct fw_info { + __u32 opcode; + char name[128]; +}; + +struct versal_pci_device { + struct pci_dev *pdev; + + struct fw_info fw; + + void __iomem *io_regs; + uuid_t intf_uuid; + __u8 fw_id[UUID_STRING_LEN + 1]; + + struct configfs_subsystem cfs_subsys; +}; + +#endif /* __VERSAL_PCI_H */ --=20 2.34.1