From nobody Sun Feb 8 10:29:58 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5F0DE334C1A; Mon, 26 Jan 2026 12:08:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769429338; cv=none; b=N41tria9podY1BoyUEoLAnSYW5f05pnArfC1FxEwU8QNuRmOkHA3v4PpkVpQWyX1dqjGHGabTVmK1cGdDlyARhjUMX8ehvoOmn8WX6JPQaMO54xQ7ZfnYmtted2GTngS0S0hklmfUgaJa5GeWHL9EBY8TeWOMKnXkn1M+2NgxYY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769429338; c=relaxed/simple; bh=nPA/2MLgxN0wimvPDpwZ4bxUv8zXvhteAkpRiwmGRww=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=asqSdQruEXpEJ2c2+Gr3IdF2VEJ6N6HYclyhasNT8leqpjvIV9Cr5RTzhII53Jhx93GXJtsNwR0LbR0CPjhUiNQ5ondNDxtAPug2AYcSIevK00Fq+UotfXHfCe/FLB4tylf7TantamyxK9uKDNNJTjFRlUngygpBhzp02JxLUYM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=reoptmXj; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="reoptmXj" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1769429337; x=1800965337; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=nPA/2MLgxN0wimvPDpwZ4bxUv8zXvhteAkpRiwmGRww=; b=reoptmXjrYm0s/8EKca8r2MUDsp5lZ0xyETzoVPpsmpKRSV1d4cIn10m Yzk46E7+IMLpuU5kBtV+hvocMYbxBNEAK34FZNId8yhXKfdRWLgIRvSKP YB34p0F3ArhTBHtrAF/HZHVDiBFlsCJt1YLl45wj60CrCxp8/kYpTkBAf c5DxVh7nEyn2bVsoNB7oN4JXxz/DgKHPo/1nDiJ8gQv9h1cDKehYAUtD/ OPXxKzXc6SgYSFWxIvTdJmEn9/FBnIn4h+j7LJBnRFdKGtDFVPUmitAxf fIm18Hi5Peg7pHStPsTcKvujzG6SlZyq0Y9zfSSevz4JvoCxUBOJ5TInR A==; X-CSE-ConnectionGUID: YdKOwlMaRum+YCEcOjTQUQ== X-CSE-MsgGUID: ZTbl7MSlQl6E+Tccx0PcfQ== X-IronPort-AV: E=Sophos;i="6.21,255,1763449200"; d="scan'208";a="59537388" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 26 Jan 2026 05:08:50 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Mon, 26 Jan 2026 05:08:20 -0700 Received: from valentina.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Mon, 26 Jan 2026 05:08:18 -0700 From: Valentina Fernandez To: , , , , , CC: , , Subject: [PATCH v3 1/2] dt-bindings: remoteproc: add Microchip IPC remoteproc Date: Mon, 26 Jan 2026 12:06:57 +0000 Message-ID: <20260126120658.1674253-2-valentina.fernandezalanis@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260126120658.1674253-1-valentina.fernandezalanis@microchip.com> References: <20260126120658.1674253-1-valentina.fernandezalanis@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Microchip RISC-V SoCs typically contain one or more clusters. Clusters can operate in Asymmetric Multi-Processing (AMP) mode, where individual cores or groups of cores run as independent software contexts. The compatible is intentionally generic, representing a =E2=80=9Cgeneric=E2= =80=9D SBI ecall interface to a set of remote processors, with the platform abstracted via SBI ecalls. The IPC/IHC (named differently depending on whether it is RTL for the FPGA fabric or a hardened version) is intended for Asymmetric Multiprocessing, where a set of cores or clusters can run other firmware, such as Zephyr. Unlike platforms with a fixed DSP, the configuration here is variable even for a single SoC. For example, which memory regions are used for the remote cluster or which mailbox channel is selected. This binding documents that firmware interface. Signed-off-by: Valentina Fernandez --- .../microchip,ipc-sbi-remoteproc.yaml | 131 ++++++++++++++++++ 1 file changed, 131 insertions(+) create mode 100644 Documentation/devicetree/bindings/remoteproc/microchip,= ipc-sbi-remoteproc.yaml diff --git a/Documentation/devicetree/bindings/remoteproc/microchip,ipc-sbi= -remoteproc.yaml b/Documentation/devicetree/bindings/remoteproc/microchip,i= pc-sbi-remoteproc.yaml new file mode 100644 index 000000000000..6fc0ab7f3ffb --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/microchip,ipc-sbi-remote= proc.yaml @@ -0,0 +1,131 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/microchip,ipc-sbi-remoteproc= .yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip IPC Remote Processor + +description: + Microchip RISC-V SoCs typically contain one or more clusters. Clusters c= an + operate in Asymmetric Multi-Processing (AMP) mode, where individual cores + or groups of cores run as independent software contexts. + + The configuration is flexible, as the set of cores or clusters that can = be + controlled as remote processors may vary, and memory regions used for + firmware as well as mailbox assignments depend on the system design. + + Communication with remote cores or clusters is abstracted using ecalls + to the platform's Supervisor Binary Interface (SBI) firmware, through + which the state of remote cores or clusters are controlled. This binding + documents that firmware interface. + +maintainers: + - Valentina Fernandez + +properties: + compatible: + const: microchip,ipc-sbi-remoteproc + + cpu: + description: + phandles to the CPUs comprising the remote cluster + $ref: /schemas/types.yaml#/definitions/phandle-array + + mboxes: + description: + Microchip IPC mailbox specifier. Used for communication with + a remote cluster. For HSS versions prior to v2026.04, it is also + used for controlling the life cycle of a remote cluster. The + specifier format is as per the bindings in + Documentation/devicetree/bindings/mailbox/microchip,sbi-ipc.yaml + maxItems: 1 + + memory-region: + minItems: 1 + maxItems: 5 + description: + List of phandles to the reserved memory regions associated wih the + remoteproc device. This is variable and describes the memories shared + with the remote cluster (e.g. firmware, resource table, rpmsg vrings) + items: + anyOf: + - description: resource table when firmware is started by the boot= loader + - description: remote cluster firmware image section + - description: virtio device (vdev) buffer + - description: vring0 + - description: vring1 + + memory-region-names: + minItems: 1 + maxItems: 5 + items: + anyOf: + - const: rsc-table + - const: firmware + - const: buffer + - const: vring0 + - const: vring1 + +required: + - compatible + +# Remote Cluster ID is derived either from the CPU phandle or +# from the mailbox specifier prior to HSS v2026.04 +anyOf: + - required: + - cpu + - required: + - mboxes + +allOf: + - if: + properties: + memory-region-names: + contains: + enum: + - vring0 + - vring1 + then: + properties: + memory-region-names: + contains: + const: buffer + +additionalProperties: false + +examples: + - | + // Early boot mode example - firmware started by bootloader + soc { + #address-cells =3D <2>; + #size-cells =3D <2>; + + remoteproc { + compatible =3D "microchip,ipc-sbi-remoteproc"; + cpu =3D <&cpu4>; + mboxes=3D <&ihc 8>; + memory-region =3D <&rsctable>, <&vdev0buffer>, + <&vdev0vring0>, <&vdev0vring1>; + memory-region-names =3D "rsc-table", "buffer", + "vring0", "vring1"; + }; + }; + + - | + // Late boot mode example - firmware started by Linux (remoteproc) + soc { + #address-cells =3D <2>; + #size-cells =3D <2>; + + remoteproc { + compatible =3D "microchip,ipc-sbi-remoteproc"; + cpu =3D <&cpu4>; + mboxes=3D <&ihc 8>; + memory-region =3D <&cluster_firmware>, <&vdev0buffer>, + <&vdev0vring0>, <&vdev0vring1>; + memory-region-names =3D "firmware", "buffer", + "vring0", "vring1"; + }; + }; +... --=20 2.34.1 From nobody Sun Feb 8 10:29:58 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0E05F334C1D; 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X-CSE-ConnectionGUID: YdKOwlMaRum+YCEcOjTQUQ== X-CSE-MsgGUID: j0RKaWAYTBuIGAhfcB/k6w== X-IronPort-AV: E=Sophos;i="6.21,255,1763449200"; d="scan'208";a="59537389" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 26 Jan 2026 05:08:51 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Mon, 26 Jan 2026 05:08:22 -0700 Received: from valentina.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Mon, 26 Jan 2026 05:08:20 -0700 From: Valentina Fernandez To: , , , , , CC: , , Subject: [PATCH v3 2/2] remoteproc: add support for Microchip IPC remoteproc platform driver Date: Mon, 26 Jan 2026 12:06:58 +0000 Message-ID: <20260126120658.1674253-3-valentina.fernandezalanis@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260126120658.1674253-1-valentina.fernandezalanis@microchip.com> References: <20260126120658.1674253-1-valentina.fernandezalanis@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Microchip family of RISC-V SoCs typically have one or more clusters. These clusters can be configured to run in an Asymmetric Multi Processing (AMP) mode where clusters are split in independent software contexts. Add a remoteproc platform driver to be able to load and boot firmware to remote processors. The driver uses SBI (RISC-V Supervisor Binary Interface) ecalls to request software running in machine privilege mode (M-mode) to start/stop the remote processor. Inter-processor communication is supported through the virtio rpmsg stack using shared memory and the Microchip IPC mailbox driver. Currently, the driver the following features are supported: - Start/stop a remote software context - Kick function implementation for RPMsg Communication - Attach to a remote context loaded by another entity (bootloader) Error Recovery and Power Management features are not currently supported. Signed-off-by: Valentina Fernandez --- drivers/remoteproc/Kconfig | 12 + drivers/remoteproc/Makefile | 1 + drivers/remoteproc/mchp_remoteproc.c | 613 +++++++++++++++++++++++++++ 3 files changed, 626 insertions(+) create mode 100644 drivers/remoteproc/mchp_remoteproc.c diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig index 48a0d3a69ed0..243e1c48c66b 100644 --- a/drivers/remoteproc/Kconfig +++ b/drivers/remoteproc/Kconfig @@ -54,6 +54,18 @@ config INGENIC_VPU_RPROC This can be either built-in or a loadable module. If unsure say N. =20 +config MCHP_REMOTEPROC + tristate "Microchip remoteproc support" + depends on MCHP_SBI_IPC_MBOX || COMPILE_TEST + depends on ARCH_MICROCHIP + help + Say y here to support booting and loading firmware to remote + processors on various Microchip family of RISC-V SoCs via the + remote processor framework. + This can be either built-in or a loadable module. If compiled + as module, the module will be called mchp_remoteproc. + If unsure say N. + config MTK_SCP tristate "Mediatek SCP support" depends on ARCH_MEDIATEK || COMPILE_TEST diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile index 1c7598b8475d..600cd15d9823 100644 --- a/drivers/remoteproc/Makefile +++ b/drivers/remoteproc/Makefile @@ -14,6 +14,7 @@ obj-$(CONFIG_REMOTEPROC_CDEV) +=3D remoteproc_cdev.o obj-$(CONFIG_IMX_REMOTEPROC) +=3D imx_rproc.o obj-$(CONFIG_IMX_DSP_REMOTEPROC) +=3D imx_dsp_rproc.o obj-$(CONFIG_INGENIC_VPU_RPROC) +=3D ingenic_rproc.o +obj-$(CONFIG_MCHP_REMOTEPROC) +=3D mchp_remoteproc.o obj-$(CONFIG_MTK_SCP) +=3D mtk_scp.o mtk_scp_ipi.o obj-$(CONFIG_OMAP_REMOTEPROC) +=3D omap_remoteproc.o obj-$(CONFIG_WKUP_M3_RPROC) +=3D wkup_m3_rproc.o diff --git a/drivers/remoteproc/mchp_remoteproc.c b/drivers/remoteproc/mchp= _remoteproc.c new file mode 100644 index 000000000000..fcc2c3f64bf4 --- /dev/null +++ b/drivers/remoteproc/mchp_remoteproc.c @@ -0,0 +1,613 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Microchip IPC Remoteproc driver + * + * Copyright (c) 2026 Microchip Technology Inc. All rights reserved. + * + * Author: Valentina Fernandez + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "remoteproc_internal.h" + +#define SBI_EXT_MICROCHIP_TECHNOLOGY (SBI_EXT_VENDOR_START | \ + MICROCHIP_VENDOR_ID) + +#define ACK_TIMEOUT 3000 +#define MCHP_SBI_TARGET_TYPE_CPU BIT(31) +#define MCHP_SBI_TARGET_ID_MASK GENMASK(30, 0) +#define MCHP_IPC_READY_MSG 0xFFFFFF00 + +/* + * Remote cluster boot modes: + * - Early boot firmware is started directly by the bootloader. + * - Late boot firmware is started by Linux via remoteproc. + */ +enum { + MCHP_LATE_BOOT_MODE =3D 0x0, + MCHP_EARLY_BOOT_MODE =3D 0x6, +}; + +/* + * SBI RPROC extension function IDs + */ +enum { + SBI_EXT_RPROC_STATE =3D 0x3, + SBI_EXT_RPROC_START =3D 0x4, + SBI_EXT_RPROC_STOP =3D 0x5, + SBI_EXT_RPROC_READY =3D 0x6, +}; + +/* + * Reserved memory region indexes + */ +enum { + MCHP_IPC_RPROC_RSC_TABLE_REGION, + MCHP_IPC_RPROC_FW_REGION, + MCHP_IPC_RPROC_BUFF_REGION, + MCHP_IPC_RPROC_VRING0_REGION, + MCHP_IPC_RPROC_VRING1_REGION, + MCHP_IPC_RPROC_REGION_MAX, +}; + +/** + * struct mchp_ipc_rproc_mem_region - Reserved memory region descriptor + * @name: the name used to match memory-region-names in the device tree + * @prefix: optional prefix for the carveout name + */ +struct mchp_ipc_rproc_mem_region { + const char *name; + const char *prefix; +}; + +/** + * struct mchp_ipc_rproc - Microchip IPC remoteproc private structure + * @dev: pointer to the device + * @rproc: rproc handle + * @mbox_channel: mailbox channel handle + * @workqueue: workqueue for processing incoming notifications + * @rsc_table: the resource table address + * @rsc_table_size: size of the resource table region + * @mbox_client: mailbox client to request the mailbox channel + * @start_done: completion for remote processor ready notification + * @rproc_work: pointer to the work struture + * @message: buffer for the last received message + * @target_id: hardware identifier for the remote cluster + * @has_cpu_target: flag selecting SBI target type as CPU or mbox ID + */ +struct mchp_ipc_rproc { + struct device *dev; + struct rproc *rproc; + struct mbox_chan *mbox_channel; + struct workqueue_struct *workqueue; + void __iomem *rsc_table; + size_t rsc_table_size; + struct mbox_client mbox_client; + struct completion start_done; + struct work_struct rproc_work; + struct mchp_ipc_msg message; + u32 target_id; + bool has_cpu_target; +}; + +static const struct mchp_ipc_rproc_mem_region mchp_rproc_mem_regions[] =3D= { + [MCHP_IPC_RPROC_RSC_TABLE_REGION] =3D { + .name =3D "rsc-table", + .prefix =3D NULL, + }, + [MCHP_IPC_RPROC_FW_REGION] =3D { + .name =3D "firmware", + .prefix =3D NULL, + }, + [MCHP_IPC_RPROC_BUFF_REGION] =3D { + .name =3D "buffer", + .prefix =3D "vdev0", + }, + [MCHP_IPC_RPROC_VRING0_REGION] =3D { + .name =3D "vring0", + .prefix =3D "vdev0", + }, + [MCHP_IPC_RPROC_VRING1_REGION] =3D { + .name =3D "vring1", + .prefix =3D "vdev0", + }, +}; + +/** + * mchp_rproc_sbi_call() - Invoke a Microchip-specific SBI extension ecall + * @rproc: pointer to the remoteproc instance + * @sbi_func: the SBI function ID + * @target: the hardware ID of the target remote cluster + * + * This function performs a Supervisor Binary Interface (SBI) call to the + * Machine Mode (M-Mode) firmware. It encodes the @target ID and type into= a + * single 32-bit register argument using MSB encoding: + * [31] : target Type Flag (1 =3D CPU/Cluster) + * [30:0] : target Cluster ID + * + * Return: The value returned by the SBI call on success, or a + * negative errno on error. + */ +static int mchp_rproc_sbi_call(struct rproc *rproc, u32 sbi_func, u32 targ= et) +{ + struct mchp_ipc_rproc *priv =3D rproc->priv; + struct sbiret ret; + + target &=3D MCHP_SBI_TARGET_ID_MASK; + + if (priv->has_cpu_target) + target |=3D MCHP_SBI_TARGET_TYPE_CPU; + + ret =3D sbi_ecall(SBI_EXT_MICROCHIP_TECHNOLOGY, sbi_func, + target, 0, 0, 0, 0, 0); + + if (ret.error) + return sbi_err_map_linux_errno(ret.error); + + return ret.value; +} + +/** + * mchp_ipc_rproc_vq_work() - Remoteproc notification work function + * @work: Pointer to the work structure + * + * Handles incoming IPC messages from the remote cluster, either + * processing control messages or passing notifications to the + * remoteproc virtqueue framework. + */ +static void mchp_ipc_rproc_vq_work(struct work_struct *work) +{ + struct mchp_ipc_rproc *priv =3D container_of(work, struct mchp_ipc_rproc,= rproc_work); + struct device *dev =3D priv->rproc->dev.parent; + struct mchp_ipc_msg *msg =3D &priv->message; + u32 message; + + if (!msg->buf || msg->size < sizeof(u32)) + return; + + message =3D *msg->buf; + + if (message =3D=3D MCHP_IPC_READY_MSG) { + complete(&priv->start_done); + return; + } + + if (message > priv->rproc->max_notifyid) { + dev_info(dev, "dropping unknown vqid 0x%x\n", message); + return; + } + + if (rproc_vq_interrupt(priv->rproc, message) =3D=3D IRQ_NONE) + dev_dbg(dev, "no message found in vqid %d\n", message); +} + +/** + * mchp_ipc_rproc_rx_callback() - Callback for incoming mailbox messages + * @mbox_client: Mailbox client + * @data: message pointer + * + * Receives data from the IPC mailbox and schedules the notification + * work function to process the message. + */ +static void mchp_ipc_rproc_rx_callback(struct mbox_client *mbox_client, vo= id *data) +{ + struct rproc *rproc =3D dev_get_drvdata(mbox_client->dev); + struct mchp_ipc_rproc *priv =3D rproc->priv; + + priv->message =3D *(struct mchp_ipc_msg *)data; + queue_work(priv->workqueue, &priv->rproc_work); +} + +static int mchp_ipc_rproc_mem_alloc(struct rproc *rproc, struct rproc_mem_= entry *mem) +{ + struct device *dev =3D rproc->dev.parent; + void *va; + + dev_dbg(dev, "map memory: %pad+%zx\n", &mem->dma, mem->len); + va =3D ioremap_wc(mem->dma, mem->len); + if (IS_ERR_OR_NULL(va)) { + dev_err(dev, "Unable to map memory region: %p+%zx\n", + &mem->dma, mem->len); + return -ENOMEM; + } + + mem->va =3D va; + + return 0; +} + +static int mchp_ipc_rproc_mem_release(struct rproc *rproc, + struct rproc_mem_entry *mem) +{ + dev_dbg(rproc->dev.parent, "unmap memory: %pad\n", &mem->dma); + iounmap(mem->va); + + return 0; +} + +static int mchp_ipc_rproc_prepare(struct rproc *rproc) +{ + struct mchp_ipc_rproc *priv =3D rproc->priv; + struct device_node *np =3D priv->dev->of_node; + struct rproc_mem_entry *mem; + struct resource res; + const char *mem_region_name; + const char *carveout_name; + int i, index, ret; + + reinit_completion(&priv->start_done); + + for (i =3D 0; i < ARRAY_SIZE(mchp_rproc_mem_regions); i++) { + mem_region_name =3D mchp_rproc_mem_regions[i].name; + index =3D of_property_match_string(np, "memory-region-names", mem_region= _name); + + if (index < 0) + continue; + + ret =3D of_reserved_mem_region_to_resource_byname(np, mem_region_name, &= res); + if (ret) + return ret; + + if (mchp_rproc_mem_regions[i].prefix) { + carveout_name =3D devm_kasprintf(priv->dev, GFP_KERNEL, "%s%s", + mchp_rproc_mem_regions[i].prefix, + mem_region_name); + if (!carveout_name) + return -ENOMEM; + } else { + carveout_name =3D mem_region_name; + } + + if (i =3D=3D MCHP_IPC_RPROC_BUFF_REGION) { + mem =3D rproc_of_resm_mem_entry_init(priv->dev, index, resource_size(&r= es), + res.start, carveout_name); + } else { + mem =3D rproc_mem_entry_init(priv->dev, NULL, (dma_addr_t)res.start, + resource_size(&res), res.start, + mchp_ipc_rproc_mem_alloc, + mchp_ipc_rproc_mem_release, carveout_name); + } + + if (!mem) + return -ENOMEM; + + rproc_add_carveout(rproc, mem); + } + + return 0; +} + +static int mchp_ipc_rproc_start(struct rproc *rproc) +{ + struct mchp_ipc_rproc *priv =3D rproc->priv; + struct device *dev =3D rproc->dev.parent; + unsigned long timeout; + int ready_ack; + int ret; + + ret =3D mchp_rproc_sbi_call(rproc, SBI_EXT_RPROC_START, priv->target_id); + if (ret < 0) + return ret; + + /* + * If the firmware supports the SBI_EXT_RPROC_READY function ID, + * query the firmware to check if the remote cluster has booted + * successfully; otherwise, wait for an asynchronous ready + * notification delivered via the mailbox. + */ + if (priv->has_cpu_target) { + timeout =3D jiffies + msecs_to_jiffies(ACK_TIMEOUT); + do { + ready_ack =3D mchp_rproc_sbi_call(rproc, + SBI_EXT_RPROC_READY, + priv->target_id); + if (ready_ack > 0) + return 0; + if (ready_ack < 0) + return ready_ack; + + usleep_range(1000, 1100); + } while (time_before(jiffies, timeout)); + + dev_err(dev, "timeout waiting for SBI ready ack\n"); + return -ETIMEDOUT; + } + + if (!wait_for_completion_timeout(&priv->start_done, msecs_to_jiffies(ACK_= TIMEOUT))) { + dev_err(dev, "timeout waiting for ready notification\n"); + return -ETIMEDOUT; + } + + return 0; +} + +static int mchp_ipc_rproc_stop(struct rproc *rproc) +{ + struct mchp_ipc_rproc *priv =3D rproc->priv; + int ret =3D 0; + + ret =3D mchp_rproc_sbi_call(rproc, SBI_EXT_RPROC_STOP, priv->target_id); + if (ret < 0) + return ret; + + return ret; +} + +static int mchp_ipc_rproc_parse_fw(struct rproc *rproc, const struct firmw= are *fw) +{ + int ret; + + ret =3D rproc_elf_load_rsc_table(rproc, fw); + if (ret) + dev_info(&rproc->dev, "No resource table in elf\n"); + + return 0; +} + +static void mchp_ipc_rproc_kick(struct rproc *rproc, int vqid) +{ + struct mchp_ipc_rproc *priv =3D (struct mchp_ipc_rproc *)rproc->priv; + struct mchp_ipc_msg msg; + int ret; + + if (!priv->mbox_channel) { + dev_err(priv->dev, "No initialized mbox channel\n"); + return; + } + + msg.buf =3D (void *)&vqid; + msg.size =3D sizeof(vqid); + + ret =3D mbox_send_message(priv->mbox_channel, (void *)&msg); + if (ret < 0) + dev_err(priv->dev, + "failed to send mbox message, status =3D %d\n", ret); +} + +static struct resource_table +*mchp_ipc_rproc_get_loaded_rsc_table(struct rproc *rproc, size_t *table_sz) +{ + struct mchp_ipc_rproc *priv =3D rproc->priv; + + if (!priv->rsc_table) + return NULL; + + *table_sz =3D priv->rsc_table_size; + + return (struct resource_table *)priv->rsc_table; +} + +static int mchp_ipc_rproc_attach(struct rproc *rproc) +{ + dev_dbg(&rproc->dev, "rproc %d attached\n", rproc->index); + + return 0; +} + +static const struct rproc_ops mchp_ipc_rproc_ops =3D { + .prepare =3D mchp_ipc_rproc_prepare, + .start =3D mchp_ipc_rproc_start, + .stop =3D mchp_ipc_rproc_stop, + .load =3D rproc_elf_load_segments, + .parse_fw =3D mchp_ipc_rproc_parse_fw, + .find_loaded_rsc_table =3D rproc_elf_find_loaded_rsc_table, + .sanity_check =3D rproc_elf_sanity_check, + .get_boot_addr =3D rproc_elf_get_boot_addr, + .kick =3D mchp_ipc_rproc_kick, + .get_loaded_rsc_table =3D mchp_ipc_rproc_get_loaded_rsc_table, + .attach =3D mchp_ipc_rproc_attach, +}; + +static int mchp_ipc_rproc_mbox_init(struct rproc *rproc) +{ + struct mchp_ipc_rproc *priv =3D rproc->priv; + struct device *dev =3D priv->dev; + struct mchp_ipc_sbi_chan *chan_priv; + struct mbox_client *mbox_client; + + mbox_client =3D &priv->mbox_client; + mbox_client->dev =3D dev; + mbox_client->tx_block =3D true; + mbox_client->tx_tout =3D 100; + mbox_client->knows_txdone =3D false; + mbox_client->rx_callback =3D mchp_ipc_rproc_rx_callback; + + priv->mbox_channel =3D mbox_request_channel(mbox_client, 0); + if (IS_ERR(priv->mbox_channel)) + return dev_err_probe(mbox_client->dev, + PTR_ERR(priv->mbox_channel), + "failed to request mailbox channel\n"); + + /* Retrieve the mbox channel private data to get the mailbox ID */ + if (!priv->has_cpu_target) { + chan_priv =3D (struct mchp_ipc_sbi_chan *)priv->mbox_channel->con_priv; + priv->target_id =3D chan_priv->id; + } + + return 0; +} + +static int mchp_ipc_rproc_probe(struct platform_device *pdev) +{ + struct device *dev =3D &pdev->dev; + struct device_node *np =3D dev->of_node; + struct device_node *cpu_node; + struct mchp_ipc_rproc *priv; + struct rproc *rproc; + struct resource res; + int ret; + + rproc =3D devm_rproc_alloc(dev, np->name, &mchp_ipc_rproc_ops, + NULL, sizeof(*priv)); + if (!rproc) + return -ENOMEM; + + priv =3D rproc->priv; + priv->rproc =3D rproc; + priv->dev =3D dev; + + /* + * Determine if the firmware supports SBI_EXT_RPROC_READY function ID. + * If not supported (firmware versions prior to HSS v2026.04), the + * mailbox channel ID is required to pass to the firmware. Otherwise, + * the CPU ID can be used to identify the target cluster instead. + */ + ret =3D mchp_rproc_sbi_call(rproc, SBI_EXT_RPROC_READY, 0); + if (ret =3D=3D -ENOTSUPP) { + priv->has_cpu_target =3D false; + if (!of_property_present(np, "mboxes")) + return dev_err_probe(dev, -ENOENT, + "mboxes property required for HSS versions prior to 2026.04\n"); + } else { + cpu_node =3D of_parse_phandle(np, "cpu", 0); + if (cpu_node) { + priv->target_id =3D of_get_cpu_hwid(cpu_node, 0); + of_node_put(cpu_node); + priv->has_cpu_target =3D true; + } else { + priv->has_cpu_target =3D false; + if (!of_property_present(np, "mboxes")) + return dev_err_probe(dev, -ENOENT, + "at least cpu or mboxes must be present\n"); + } + } + + if (of_property_present(np, "mboxes")) { + ret =3D mchp_ipc_rproc_mbox_init(rproc); + if (ret) + return ret; + + priv->workqueue =3D create_workqueue(dev_name(dev)); + if (!priv->workqueue) { + ret =3D -ENOMEM; + dev_err_probe(dev, ret, "cannot create workqueue\n"); + goto err_put_mbox; + } + + INIT_WORK(&priv->rproc_work, mchp_ipc_rproc_vq_work); + } + + /* + * Retrieve the current boot state of the remote cluster to determine how= its + * firmware was started. + * MCHP_EARLY_BOOT_MODE: firmware was started directly by the bootloader. + * MCHP_LATE_BOOT_MODE: firmware will be started by Linux via remoteproc. + */ + ret =3D mchp_rproc_sbi_call(rproc, SBI_EXT_RPROC_STATE, priv->target_id); + if (ret < 0) { + dev_err_probe(dev, ret, "cannot get boot mode\n"); + goto err_put_wkq; + } + + /* Set the rproc state based on the cluster boot mode */ + if (ret =3D=3D MCHP_EARLY_BOOT_MODE) { + /* + * If the cluster was already started by another entity (early boot mode= ), + * check if the resource table is provided as a memory-region. It is + * expected that the remote processor firmware provides a copy of the + * resource table at a dedicated memory address. + * + * However, the absence of a resource table entry in early boot mode is + * considered valid since some firmware might not use rpmsg. The + * lifecycle can still be controlled by Linux once the cluster is + * attached. + */ + ret =3D of_reserved_mem_region_to_resource_byname(np, "rsc-table", &res); + if (!ret) { + priv->rsc_table =3D devm_ioremap_resource(dev, &res); + if (IS_ERR(priv->rsc_table)) { + ret =3D PTR_ERR(priv->rsc_table); + dev_err_probe(dev, ret, "failed to map resource table\n"); + goto err_put_wkq; + } + priv->rsc_table_size =3D resource_size(&res); + } + rproc->state =3D RPROC_DETACHED; + } else { + /* + * If the cluster is to be started by Linux (late boot mode), the + * firmware memory region must be provided in the device tree. + * This region is used to load the remote processor ELF image + * to shared DDR memory. + */ + ret =3D of_reserved_mem_region_to_resource_byname(np, "firmware", &res); + if (ret) { + dev_err_probe(dev, ret, "missing firmware memory region\n"); + goto err_put_wkq; + } + rproc->auto_boot =3D false; + } + + init_completion(&priv->start_done); + + /* error recovery is not supported at present */ + rproc->recovery_disabled =3D true; + + dev_set_drvdata(dev, rproc); + + ret =3D devm_rproc_add(dev, rproc); + if (ret) { + dev_err_probe(dev, ret, "rproc_add failed\n"); + goto err_put_wkq; + } + + return 0; + +err_put_wkq: + if (priv->workqueue) + destroy_workqueue(priv->workqueue); +err_put_mbox: + if (priv->mbox_channel) + mbox_free_channel(priv->mbox_channel); + + return ret; +} + +static void mchp_ipc_rproc_remove(struct platform_device *pdev) +{ + struct rproc *rproc =3D platform_get_drvdata(pdev); + struct mchp_ipc_rproc *priv =3D rproc->priv; + + if (priv->workqueue) + destroy_workqueue(priv->workqueue); + + if (priv->mbox_channel) + mbox_free_channel(priv->mbox_channel); +} + +static const struct of_device_id mchp_ipc_rproc_of_match[] __maybe_unused = =3D { + { .compatible =3D "microchip,ipc-sbi-remoteproc", }, + {} +}; +MODULE_DEVICE_TABLE(of, mchp_ipc_rproc_of_match); + +static struct platform_driver mchp_ipc_rproc_driver =3D { + .probe =3D mchp_ipc_rproc_probe, + .remove =3D mchp_ipc_rproc_remove, + .driver =3D { + .name =3D "microchip-ipc-rproc", + .of_match_table =3D of_match_ptr(mchp_ipc_rproc_of_match), + }, +}; + +module_platform_driver(mchp_ipc_rproc_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Valentina Fernandez "); +MODULE_DESCRIPTION("Microchip IPC Remote Processor control driver"); --=20 2.34.1