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Mon, 26 Jan 2026 01:27:32 -0800 (PST) Date: Mon, 26 Jan 2026 10:26:32 +0100 In-Reply-To: <20260126092630.1800589-12-ardb+git@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260126092630.1800589-12-ardb+git@google.com> X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-Developer-Signature: v=1; a=openpgp-sha256; l=1328; i=ardb@kernel.org; h=from:subject; bh=yjZnKOVkP/d2XQBthJ6Tfy6lESqeO+RAZPKDjSMcLNk=; b=owGbwMvMwCVmkMcZplerG8N4Wi2JIbPc2P3RrmdrBB/NvJp+yD+g/JFb6zYT/Wk8p612/lZou XuN0cWso5SFQYyLQVZMkUVg9t93O09PlKp1niULM4eVCWQIAxenAExkgyLD//JNB8KNeT646Wy+ JbN44ZlbW3+dtXz0a8nSTb0s7nvXu3kx/LPunPdhadYT+SmCvVP9ZleuVH52kyW33TX8bkZFm5t YDScA X-Mailer: git-send-email 2.52.0.457.g6b5491de43-goog Message-ID: <20260126092630.1800589-13-ardb+git@google.com> Subject: [PATCH v2 01/10] arm64: Move the zero page to rodata From: Ard Biesheuvel To: linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, will@kernel.org, catalin.marinas@arm.com, mark.rutland@arm.com, Ard Biesheuvel , Ryan Roberts , Anshuman Khandual , Liz Prucka , Seth Jenkins , Kees Cook , linux-hardening@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Ard Biesheuvel The zero page should contain only zero bytes, and so mapping it read-write is unnecessary. Combine it with reserved_pg_dir, which lives in the read-only region of the kernel, and already serves a similar purpose. Signed-off-by: Ard Biesheuvel Reviewed-by: Ryan Roberts --- arch/arm64/kernel/vmlinux.lds.S | 1 + arch/arm64/mm/mmu.c | 3 +-- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kernel/vmlinux.lds.S b/arch/arm64/kernel/vmlinux.ld= s.S index ad6133b89e7a..b2a093f5b3fc 100644 --- a/arch/arm64/kernel/vmlinux.lds.S +++ b/arch/arm64/kernel/vmlinux.lds.S @@ -229,6 +229,7 @@ SECTIONS #endif =20 reserved_pg_dir =3D .; + empty_zero_page =3D .; . +=3D PAGE_SIZE; =20 swapper_pg_dir =3D .; diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index 9ae7ce00a7ef..c36422a3fae2 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -66,9 +66,8 @@ long __section(".mmuoff.data.write") __early_cpu_boot_sta= tus; =20 /* * Empty_zero_page is a special page that is used for zero-initialized data - * and COW. + * and COW. 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charset="utf-8" From: Ard Biesheuvel Move the fixmap page tables out of the BSS section, and place them at the end of the image, right before the init_pg_dir section where some of the other statically allocated page tables live. These page tables are currently the only data objects in vmlinux that are meant to be accessed via the kernel image's linear alias, and so placing them together allows the remainder of the data/bss section to be remapped read-only or unmapped entirely. Signed-off-by: Ard Biesheuvel Reviewed-by: Ryan Roberts --- arch/arm64/kernel/vmlinux.lds.S | 5 +++++ arch/arm64/mm/fixmap.c | 7 ++++--- 2 files changed, 9 insertions(+), 3 deletions(-) diff --git a/arch/arm64/kernel/vmlinux.lds.S b/arch/arm64/kernel/vmlinux.ld= s.S index b2a093f5b3fc..c089b83308a5 100644 --- a/arch/arm64/kernel/vmlinux.lds.S +++ b/arch/arm64/kernel/vmlinux.lds.S @@ -335,6 +335,11 @@ SECTIONS __pi___bss_start =3D __bss_start; =20 . =3D ALIGN(PAGE_SIZE); + .pgdir : { + __pgdir_start =3D .; + *(.fixmap_bss) + } + __pi_init_pg_dir =3D .; . +=3D INIT_DIR_SIZE; __pi_init_pg_end =3D .; diff --git a/arch/arm64/mm/fixmap.c b/arch/arm64/mm/fixmap.c index c5c5425791da..b649ea1a46e4 100644 --- a/arch/arm64/mm/fixmap.c +++ b/arch/arm64/mm/fixmap.c @@ -31,9 +31,10 @@ static_assert(NR_BM_PMD_TABLES =3D=3D 1); =20 #define BM_PTE_TABLE_IDX(addr) __BM_TABLE_IDX(addr, PMD_SHIFT) =20 -static pte_t bm_pte[NR_BM_PTE_TABLES][PTRS_PER_PTE] __page_aligned_bss; -static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss __maybe_unused; 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charset="utf-8" From: Ard Biesheuvel Currently, pgattr_change_is_safe() is overly pedantic when it comes to descriptors with the contiguous hint attribute set, as it rejects assignments even if the old and the new value are the same. So relax the check to allow that. Signed-off-by: Ard Biesheuvel --- arch/arm64/mm/mmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index c36422a3fae2..9d39de3cfe67 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -141,7 +141,7 @@ bool pgattr_change_is_safe(pteval_t old, pteval_t new) return false; =20 /* live contiguous mappings may not be manipulated at all */ - if ((old | new) & PTE_CONT) + if ((old | new) & PTE_CONT && old !=3D new) return false; =20 /* Transitioning from Non-Global to Global is unsafe */ --=20 2.52.0.457.g6b5491de43-goog From nobody Sat Feb 7 19:41:36 2026 Received: from mail-wm1-f73.google.com (mail-wm1-f73.google.com [209.85.128.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C1EF1314B64 for ; Mon, 26 Jan 2026 09:27:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.73 ARC-Seal: i=1; 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charset="utf-8" From: Ard Biesheuvel Instead of blindly overwriting an existing table entry when mapping DRAM regions, take care not to replace a pre-existing table entry with a block entry. This permits the logic of mapping the kernel's linear alias to be simplified in a subsequent patch. Signed-off-by: Ard Biesheuvel Reviewed-by: Ryan Roberts --- arch/arm64/mm/mmu.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index 9d39de3cfe67..28cc3cda042c 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -262,7 +262,8 @@ static int init_pmd(pmd_t *pmdp, unsigned long addr, un= signed long end, =20 /* try section mapping first */ if (((addr | next | phys) & ~PMD_MASK) =3D=3D 0 && - (flags & NO_BLOCK_MAPPINGS) =3D=3D 0) { + (flags & NO_BLOCK_MAPPINGS) =3D=3D 0 && + !pmd_table(old_pmd)) { pmd_set_huge(pmdp, phys, prot); =20 /* @@ -385,7 +386,8 @@ static int alloc_init_pud(p4d_t *p4dp, unsigned long ad= dr, unsigned long end, */ if (pud_sect_supported() && ((addr | next | phys) & ~PUD_MASK) =3D=3D 0 && - (flags & NO_BLOCK_MAPPINGS) =3D=3D 0) { + (flags & NO_BLOCK_MAPPINGS) =3D=3D 0 && + !pud_table(old_pud)) { pud_set_huge(pudp, phys, prot); =20 /* --=20 2.52.0.457.g6b5491de43-goog From nobody Sat Feb 7 19:41:36 2026 Received: from mail-wm1-f74.google.com (mail-wm1-f74.google.com [209.85.128.74]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E902A314A6D for ; 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Mon, 26 Jan 2026 01:27:36 -0800 (PST) Date: Mon, 26 Jan 2026 10:26:36 +0100 In-Reply-To: <20260126092630.1800589-12-ardb+git@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260126092630.1800589-12-ardb+git@google.com> X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-Developer-Signature: v=1; a=openpgp-sha256; l=2647; i=ardb@kernel.org; h=from:subject; bh=gTtNtodtCpnKfAIP/yDCxL7y5gOaP+fLKD5+ODcsG54=; b=owGbwMvMwCVmkMcZplerG8N4Wi2JIbPc2DP4c6/cvLuKPOWa81fyz1g4a51h+fLeU3u7soOsT nnqbnnfUcrCIMbFICumyCIw+++7nacnStU6z5KFmcPKBDKEgYtTACYS7cbwP99754VFqcZznjJ1 Xu8xP5ztEZb8nnMu44t3UrWSFo//lzEybHsbpvN4084X24Xl5myK0lpz6udkN5MTqXyGJY8/3xR y4QMA X-Mailer: git-send-email 2.52.0.457.g6b5491de43-goog Message-ID: <20260126092630.1800589-17-ardb+git@google.com> Subject: [PATCH v2 05/10] arm64: mm: Preserve non-contiguous descriptors when mapping DRAM From: Ard Biesheuvel To: linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, will@kernel.org, catalin.marinas@arm.com, mark.rutland@arm.com, Ard Biesheuvel , Ryan Roberts , Anshuman Khandual , Liz Prucka , Seth Jenkins , Kees Cook , linux-hardening@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Ard Biesheuvel Instead of blindly overwriting existing live entries with the contiguous bit cleared when mapping DRAM regions, check whether the contiguous region in question starts with a descriptor that has the valid bit set and the contiguous bit cleared, and in that case, leave the contiguous bit unset on the entire region. This permits the logic of mapping the kernel's linear alias to be simplified in a subsequent patch. Note that not setting the contiguous bit on any of the descriptors in the contiguous region can only result in an invalid configuration if it was already invalid to begin with. Signed-off-by: Ard Biesheuvel Reviewed-by: Ryan Roberts --- arch/arm64/include/asm/pgtable.h | 4 ++++ arch/arm64/mm/mmu.c | 6 ++++-- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgta= ble.h index 64d5f1d9cce9..cb2c4525e49a 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -224,6 +224,10 @@ static inline pteval_t __phys_to_pte_val(phys_addr_t p= hys) * Returns true if the pte is valid and has the contiguous bit set. */ #define pte_valid_cont(pte) (pte_valid(pte) && pte_cont(pte)) +/* + * Returns true if the pte is valid and has the contiguous bit cleared. + */ +#define pte_valid_noncont(pte) (pte_valid(pte) && !pte_cont(pte)) /* * Could the pte be present in the TLB? We must check mm_tlb_flush_pending * so that we don't erroneously return false for pages that have been diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index 28cc3cda042c..d7faa98f427c 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -230,7 +230,8 @@ static int alloc_init_cont_pte(pmd_t *pmdp, unsigned lo= ng addr, =20 /* use a contiguous mapping if the range is suitably aligned */ if ((((addr | next | phys) & ~CONT_PTE_MASK) =3D=3D 0) && - (flags & NO_CONT_MAPPINGS) =3D=3D 0) + (flags & NO_CONT_MAPPINGS) =3D=3D 0 && + !pte_valid_noncont(__ptep_get(ptep))) __prot =3D __pgprot(pgprot_val(prot) | PTE_CONT); =20 init_pte(ptep, addr, next, phys, __prot); @@ -330,7 +331,8 @@ static int alloc_init_cont_pmd(pud_t *pudp, unsigned lo= ng addr, =20 /* use a contiguous mapping if the range is suitably aligned */ if ((((addr | next | phys) & ~CONT_PMD_MASK) =3D=3D 0) && - (flags & NO_CONT_MAPPINGS) =3D=3D 0) + (flags & NO_CONT_MAPPINGS) =3D=3D 0 && + !pte_valid_noncont(pmd_pte(READ_ONCE(*pmdp)))) __prot =3D __pgprot(pgprot_val(prot) | PTE_CONT); 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Mon, 26 Jan 2026 01:27:36 -0800 (PST) Date: Mon, 26 Jan 2026 10:26:37 +0100 In-Reply-To: <20260126092630.1800589-12-ardb+git@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260126092630.1800589-12-ardb+git@google.com> X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-Developer-Signature: v=1; a=openpgp-sha256; l=916; i=ardb@kernel.org; h=from:subject; bh=AbBNGoFlUmz8DhotcNagR6+hcZWJ6aqvLIQOSvGP0oY=; b=owGbwMvMwCVmkMcZplerG8N4Wi2JIbPc2Ctw67qkcsYnkz6HVyaIFV/R/hlm+kvXoVE7kZW7Y APXosqOUhYGMS4GWTFFFoHZf9/tPD1RqtZ5lizMHFYmkCEMXJwCMJEbfxn+R/2O9dR21crak6f7 +c5MiwrF2xnXXYI4zDR6lOzKa4V2MPzTu6eudlBgRo3JnMb/EVvfGrmcsfoU/mC9Z4jaodsrJ+x jAwA= X-Mailer: git-send-email 2.52.0.457.g6b5491de43-goog Message-ID: <20260126092630.1800589-18-ardb+git@google.com> Subject: [PATCH v2 06/10] arm64: mm: Remove bogus stop condition from map_mem() loop From: Ard Biesheuvel To: linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, will@kernel.org, catalin.marinas@arm.com, mark.rutland@arm.com, Ard Biesheuvel , Ryan Roberts , Anshuman Khandual , Liz Prucka , Seth Jenkins , Kees Cook , linux-hardening@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Ard Biesheuvel The memblock API guarantees that start is not greater than or equal to end, so there is no need to test it. And if were, it is doubtful that breaking out of the loop would be a reasonable course of action here (rather than attempting to map the remaining regions) So let's drop this check. Signed-off-by: Ard Biesheuvel Reviewed-by: Ryan Roberts --- arch/arm64/mm/mmu.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index d7faa98f427c..377bdc4d84a1 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -1158,8 +1158,6 @@ static void __init map_mem(pgd_t *pgdp) =20 /* map all the memory banks */ for_each_mem_range(i, &start, &end) { - if (start >=3D end) - break; /* * The linear map must allow allocation tags reading/writing * if MTE is present. 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charset="utf-8" From: Ard Biesheuvel __map_memblock() and map_mem() always operate on swapper_pg_dir, so there is no need to pass around a pgd_t pointer between them. Signed-off-by: Ard Biesheuvel Reviewed-by: Ryan Roberts --- arch/arm64/mm/mmu.c | 25 ++++++++++---------- 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index 377bdc4d84a1..80587cd47ce7 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -1020,11 +1020,11 @@ static void update_mapping_prot(phys_addr_t phys, u= nsigned long virt, flush_tlb_kernel_range(virt, virt + size); } =20 -static void __init __map_memblock(pgd_t *pgdp, phys_addr_t start, - phys_addr_t end, pgprot_t prot, int flags) +static void __init __map_memblock(phys_addr_t start, phys_addr_t end, + pgprot_t prot, int flags) { - early_create_pgd_mapping(pgdp, start, __phys_to_virt(start), end - start, - prot, early_pgtable_alloc, flags); + early_create_pgd_mapping(swapper_pg_dir, start, __phys_to_virt(start), + end - start, prot, early_pgtable_alloc, flags); } =20 void __init mark_linear_text_alias_ro(void) @@ -1072,13 +1072,13 @@ static phys_addr_t __init arm64_kfence_alloc_pool(v= oid) return kfence_pool; } =20 -static void __init arm64_kfence_map_pool(phys_addr_t kfence_pool, pgd_t *p= gdp) +static void __init arm64_kfence_map_pool(phys_addr_t kfence_pool) { if (!kfence_pool) return; =20 /* KFENCE pool needs page-level mapping. */ - __map_memblock(pgdp, kfence_pool, kfence_pool + KFENCE_POOL_SIZE, + __map_memblock(kfence_pool, kfence_pool + KFENCE_POOL_SIZE, pgprot_tagged(PAGE_KERNEL), NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS); memblock_clear_nomap(kfence_pool, KFENCE_POOL_SIZE); @@ -1114,11 +1114,11 @@ bool arch_kfence_init_pool(void) #else /* CONFIG_KFENCE */ =20 static inline phys_addr_t arm64_kfence_alloc_pool(void) { return 0; } -static inline void arm64_kfence_map_pool(phys_addr_t kfence_pool, pgd_t *p= gdp) { } +static inline void arm64_kfence_map_pool(phys_addr_t kfence_pool) { } =20 #endif /* CONFIG_KFENCE */ =20 -static void __init map_mem(pgd_t *pgdp) +static void __init map_mem(void) { static const u64 direct_map_end =3D _PAGE_END(VA_BITS_MIN); phys_addr_t kernel_start =3D __pa_symbol(_text); @@ -1163,7 +1163,7 @@ static void __init map_mem(pgd_t *pgdp) * if MTE is present. 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charset="utf-8" From: Ard Biesheuvel Now that the DRAM mapping routines respect existing table mappings and contiguous block and page mappings, it is no longer needed to fiddle with the memblock tables to set and clear the NOMAP attribute. Instead, map the kernel text and rodata alias first, avoiding contiguous mappings, so that they will not be added later when mapping the memblocks. Signed-off-by: Ard Biesheuvel --- arch/arm64/mm/mmu.c | 27 ++++++++------------ 1 file changed, 10 insertions(+), 17 deletions(-) diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index 80587cd47ce7..18415d4743bf 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -1149,12 +1149,17 @@ static void __init map_mem(void) flags |=3D NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS; =20 /* - * Take care not to create a writable alias for the - * read-only text and rodata sections of the kernel image. - * So temporarily mark them as NOMAP to skip mappings in - * the following for-loop + * Map the linear alias of the [_text, __init_begin) interval + * as non-executable now, and remove the write permission in + * mark_linear_text_alias_ro() above (which will be called after + * alternative patching has completed). This makes the contents + * of the region accessible to subsystems such as hibernate, + * but protects it from inadvertent modification or execution. + * Note that contiguous mappings cannot be remapped in this way, + * so we should avoid them here. */ - memblock_mark_nomap(kernel_start, kernel_end - kernel_start); + __map_memblock(kernel_start, kernel_end, PAGE_KERNEL, + flags | NO_CONT_MAPPINGS); =20 /* map all the memory banks */ for_each_mem_range(i, &start, &end) { @@ -1167,18 +1172,6 @@ static void __init map_mem(void) flags); } =20 - /* - * Map the linear alias of the [_text, __init_begin) interval - * as non-executable now, and remove the write permission in - * mark_linear_text_alias_ro() below (which will be called after - * alternative patching has completed). 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charset="utf-8" From: Ard Biesheuvel On systems where the bootloader adheres to the original arm64 boot protocol, the placement of the kernel in the physical address space is highly predictable, and this makes the placement of its linear alias in the kernel virtual address space equally predictable, given the lack of randomization of the linear map. The linear aliases of the kernel text and rodata regions are already mapped read-only, but the kernel data and bss are mapped read-write in this region. This is not needed, so map them read-only as well. Note that the statically allocated kernel page tables do need to be modifiable via the linear map, so leave these mapped read-write. Signed-off-by: Ard Biesheuvel --- arch/arm64/include/asm/sections.h | 1 + arch/arm64/mm/mmu.c | 10 ++++++++-- 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/arch/arm64/include/asm/sections.h b/arch/arm64/include/asm/sec= tions.h index 51b0d594239e..f7fe2bcbfd03 100644 --- a/arch/arm64/include/asm/sections.h +++ b/arch/arm64/include/asm/sections.h @@ -23,6 +23,7 @@ extern char __irqentry_text_start[], __irqentry_text_end[= ]; extern char __mmuoff_data_start[], __mmuoff_data_end[]; extern char __entry_tramp_text_start[], __entry_tramp_text_end[]; extern char __relocate_new_kernel_start[], __relocate_new_kernel_end[]; +extern char __pgdir_start[]; =20 static inline size_t entry_tramp_text_size(void) { diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index 18415d4743bf..fdbbb018adc5 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -1122,7 +1122,9 @@ static void __init map_mem(void) { static const u64 direct_map_end =3D _PAGE_END(VA_BITS_MIN); phys_addr_t kernel_start =3D __pa_symbol(_text); - phys_addr_t kernel_end =3D __pa_symbol(__init_begin); + phys_addr_t init_begin =3D __pa_symbol(__init_begin); + phys_addr_t init_end =3D __pa_symbol(__init_end); + phys_addr_t kernel_end =3D __pa_symbol(__pgdir_start); phys_addr_t start, end; phys_addr_t early_kfence_pool; int flags =3D NO_EXEC_MAPPINGS; @@ -1158,7 +1160,9 @@ static void __init map_mem(void) * Note that contiguous mappings cannot be remapped in this way, * so we should avoid them here. */ - __map_memblock(kernel_start, kernel_end, PAGE_KERNEL, + __map_memblock(kernel_start, init_begin, PAGE_KERNEL, + flags | NO_CONT_MAPPINGS); + __map_memblock(init_end, kernel_end, PAGE_KERNEL, flags | NO_CONT_MAPPINGS); =20 /* map all the memory banks */ @@ -1172,6 +1176,8 @@ static void __init map_mem(void) flags); } =20 + __map_memblock(init_end, kernel_end, PAGE_KERNEL_RO, + flags | NO_CONT_MAPPINGS); arm64_kfence_map_pool(early_kfence_pool); } =20 --=20 2.52.0.457.g6b5491de43-goog From nobody Sat Feb 7 19:41:36 2026 Received: from mail-wr1-f73.google.com (mail-wr1-f73.google.com [209.85.221.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 70B78315767 for ; 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Mon, 26 Jan 2026 01:27:40 -0800 (PST) Date: Mon, 26 Jan 2026 10:26:41 +0100 In-Reply-To: <20260126092630.1800589-12-ardb+git@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260126092630.1800589-12-ardb+git@google.com> X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-Developer-Signature: v=1; a=openpgp-sha256; l=3150; i=ardb@kernel.org; h=from:subject; bh=F75QV7Me+l51GTWjnCoV9En3fFQSXyPjTPLkcCDZb5k=; b=owGbwMvMwCVmkMcZplerG8N4Wi2JIbPc2Gemlo8A9wThkJRzGY6PJTzf2MoqLFcKrppoVuQhs NAstq6jlIVBjItBVkyRRWD233c7T0+UqnWeJQszh5UJZAgDF6cATKSohJHhc4ORyLascs43x3uf 35Jr3LtsAV+q9K0/TMrOVoJ7G44kMjIsj5DZImpT/axLMlbhis6iO/Zz9tq5nVnIP9ko1zObxYY FAA== X-Mailer: git-send-email 2.52.0.457.g6b5491de43-goog Message-ID: <20260126092630.1800589-22-ardb+git@google.com> Subject: [PATCH v2 10/10] arm64: mm: Unmap kernel data/bss entirely from the linear map From: Ard Biesheuvel To: linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, will@kernel.org, catalin.marinas@arm.com, mark.rutland@arm.com, Ard Biesheuvel , Ryan Roberts , Anshuman Khandual , Liz Prucka , Seth Jenkins , Kees Cook , linux-hardening@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Ard Biesheuvel The linear aliases of the kernel text and rodata are mapped read-only in the linear map as well. Given that the contents of these regions are mostly identical to the version in the loadable image, mapping them read-only and leaving their contents visible is a reasonable hardening measure. Data and bss, however, are now also mapped read-only but the contents of these regions are more likely to contain data that we'd rather not leak. So let's unmap these entirely in the linear map when the kernel is running normally. When going into hibernation or waking up from it, these regions need to be mapped, so map the region initially, and toggle the valid bit so map/unmap the region as needed. Signed-off-by: Ard Biesheuvel --- arch/arm64/mm/mmu.c | 40 ++++++++++++++++++-- 1 file changed, 37 insertions(+), 3 deletions(-) diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index fdbbb018adc5..06b2d11b4561 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -1027,6 +1028,31 @@ static void __init __map_memblock(phys_addr_t start,= phys_addr_t end, end - start, prot, early_pgtable_alloc, flags); } =20 +static void remap_linear_data_alias(bool unmap) +{ + set_memory_valid((unsigned long)lm_alias(__init_end), + (unsigned long)(__pgdir_start - __init_end) / PAGE_SIZE, + !unmap); +} + +static int arm64_hibernate_pm_notify(struct notifier_block *nb, + unsigned long mode, void *unused) +{ + switch (mode) { + default: + break; + case PM_POST_HIBERNATION: + case PM_POST_RESTORE: + remap_linear_data_alias(true); + break; + case PM_HIBERNATION_PREPARE: + case PM_RESTORE_PREPARE: + remap_linear_data_alias(false); + break; + } + return 0; +} + void __init mark_linear_text_alias_ro(void) { /* @@ -1035,6 +1061,16 @@ void __init mark_linear_text_alias_ro(void) update_mapping_prot(__pa_symbol(_text), (unsigned long)lm_alias(_text), (unsigned long)__init_begin - (unsigned long)_text, PAGE_KERNEL_RO); + + remap_linear_data_alias(true); + + if (IS_ENABLED(CONFIG_HIBERNATION)) { + static struct notifier_block nb =3D { + .notifier_call =3D arm64_hibernate_pm_notify + }; + + register_pm_notifier(&nb); + } } =20 #ifdef CONFIG_KFENCE @@ -1163,7 +1199,7 @@ static void __init map_mem(void) __map_memblock(kernel_start, init_begin, PAGE_KERNEL, flags | NO_CONT_MAPPINGS); __map_memblock(init_end, kernel_end, PAGE_KERNEL, - flags | NO_CONT_MAPPINGS); + flags | NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS); =20 /* map all the memory banks */ for_each_mem_range(i, &start, &end) { @@ -1176,8 +1212,6 @@ static void __init map_mem(void) flags); } =20 - __map_memblock(init_end, kernel_end, PAGE_KERNEL_RO, - flags | NO_CONT_MAPPINGS); arm64_kfence_map_pool(early_kfence_pool); } =20 --=20 2.52.0.457.g6b5491de43-goog