From nobody Tue Feb 10 17:08:13 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 80D963115B5 for ; Mon, 26 Jan 2026 08:27:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769416081; cv=none; b=ohi2xnb/1ehuUZVIOJbW60C+OakspZbiFP2kDBbrfATLwJpRLGk8RvgndFiTII/BOPddLrc4yYDkyWiVySsJmNyvwI4SmsdIC3aDwmnNaFpCNw+jfBJlkAbKXbqK+FX4bqgEes2mX/zs95sQcURTyGZB2T+Hno4H3Ifb4gaGA6c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769416081; c=relaxed/simple; bh=F3x7ujt23LH7Hzb/IBaAvxfIn3ywNtT91s3EJRLMZe8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=gzctoqLv2ekLv7bkMGnAmAaF9MzcbMFaMTiVDq3CvuIQoJSxUyDUORQ9EuaV9/gIvyQ4IJiyVrnW4Rpj56oitV4AweFrtklR26PTe07JO2/8gwYXXumnOM1Czg6P3W9QDRfm3CIV0yh38/YOUhw9satqM1Y2fcWyWq+c5xPnKVY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=QosxL7z7; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="QosxL7z7" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 4FBC34E42296; Mon, 26 Jan 2026 08:27:52 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 206A660717; Mon, 26 Jan 2026 08:27:52 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 59509119A8649; Mon, 26 Jan 2026 09:27:49 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1769416070; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=5JUfVn7/HeLWZy5Qd02a6wIWBDQq2NcAA2klS+MsO1s=; b=QosxL7z75al5wbGJj2zei2GJz9GNmiYdHt0xioErGeEQpNWhYxeZiw7XD+tdBSc4oMS0IS iBq5KaxiDPw2Bbg1rwQonxU1BNAUVSbzJxUJmtWmJvrqchcIpXbRq6HICMEmHKwrHvrJxR m4Su4SSDPBQVBL9Fn9p9OQp1M909pc0IXNGbyLV0rzyDvtsOxp+1R5j56FxxkjsornmCNC laBkNn1P6Ea+EYhYmcWHGPXe4qNUBmatHv9+iJlO+jZaHVFddiRwGrTp6/5EClxO83XgNa HN9gVfi3RRgVLyNZNoIrxHylRsMIBA/fWxeAJNvtc/bstpPEZqoWnuwy33nEiQ== From: "Bastien Curutchet (Schneider Electric)" Date: Mon, 26 Jan 2026 09:27:35 +0100 Subject: [PATCH net-next v3 7/8] net: dsa: microchip: Adapt port offset for KSZ8463's PTP register Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260126-ksz8463-ptp-v3-7-9f092aeb8492@bootlin.com> References: <20260126-ksz8463-ptp-v3-0-9f092aeb8492@bootlin.com> In-Reply-To: <20260126-ksz8463-ptp-v3-0-9f092aeb8492@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran , Simon Horman Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.2 X-Last-TLS-Session-Version: TLSv1.3 In KSZ8463 register's layout, the offset between port 1 and port 2 registers isn't the same in the generic control register area than in the PTP register area. The get_port_addr() always uses the same offset so it doesn't work when it's used to access PTP registers. Adapt the port offset in get_port_addr() when the accessed register is in the PTP area. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz8.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/dsa/microchip/ksz8.c b/drivers/net/dsa/microchip/k= sz8.c index c354abdafc1b542a32c276ef939a90db30c67f55..a05527899b8bab6d53509ba38c5= 8101b79e98ee5 100644 --- a/drivers/net/dsa/microchip/ksz8.c +++ b/drivers/net/dsa/microchip/ksz8.c @@ -2020,6 +2020,9 @@ u32 ksz8_get_port_addr(int port, int offset) =20 u32 ksz8463_get_port_addr(int port, int offset) { + if (offset >=3D KSZ8463_PTP_CLK_CTRL) + return offset + 0x20 * port; + return offset + 0x18 * port; } =20 --=20 2.52.0