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Mon, 26 Jan 2026 04:27:10 -0800 (PST) Received: from hu-vgarodia-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c6366644379sm6076022a12.33.2026.01.26.04.27.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jan 2026 04:27:09 -0800 (PST) From: Vikash Garodia Date: Mon, 26 Jan 2026 17:55:50 +0530 Subject: [PATCH 7/7] media: iris: Add platform data for kaanapali Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260126-kaanapali-iris-v1-7-e2646246bfc1@oss.qualcomm.com> References: <20260126-kaanapali-iris-v1-0-e2646246bfc1@oss.qualcomm.com> In-Reply-To: <20260126-kaanapali-iris-v1-0-e2646246bfc1@oss.qualcomm.com> To: Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Saravana Kannan , Joerg Roedel , Will Deacon , Robin Murphy , Stefan Schmidt , Hans Verkuil , Krzysztof Kozlowski , Vishnu Reddy , Hans Verkuil Cc: linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, iommu@lists.linux.dev, Bryan O'Donoghue , Vikash Garodia X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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Move the configurations that differs in a per-SoC platform header, that will contain SoC specific data. Co-developed-by: Vishnu Reddy Signed-off-by: Vishnu Reddy Signed-off-by: Vikash Garodia --- .../platform/qcom/iris/iris_platform_common.h | 1 + .../media/platform/qcom/iris/iris_platform_gen2.c | 90 ++++++++++++++++++= ++++ .../platform/qcom/iris/iris_platform_kaanapali.h | 80 +++++++++++++++++++ drivers/media/platform/qcom/iris/iris_probe.c | 4 + 4 files changed, 175 insertions(+) diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/driv= ers/media/platform/qcom/iris/iris_platform_common.h index d2d7c898fc8ef0de1b16aebd72681ea3c5b736ae..3f047bd495413494b9afbf6f4d1= 2a8e06a9ac07a 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -41,6 +41,7 @@ enum pipe_type { PIPE_4 =3D 4, }; =20 +extern const struct iris_platform_data kaanapali_data; extern const struct iris_platform_data qcs8300_data; extern const struct iris_platform_data sc7280_data; extern const struct iris_platform_data sm8250_data; diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/driver= s/media/platform/qcom/iris/iris_platform_gen2.c index 5da90d47f9c6eab4a7e6b17841fdc0e599397bf7..cefbe72b1475cb83281d01ef382= 8f095293e098f 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c @@ -12,6 +12,7 @@ #include "iris_vpu_buffer.h" #include "iris_vpu_common.h" =20 +#include "iris_platform_kaanapali.h" #include "iris_platform_qcs8300.h" #include "iris_platform_sm8650.h" #include "iris_platform_sm8750.h" @@ -921,6 +922,95 @@ static const u32 sm8550_enc_op_int_buf_tbl[] =3D { BUF_SCRATCH_2, }; =20 +const struct iris_platform_data kaanapali_data =3D { + .get_instance =3D iris_hfi_gen2_get_instance, + .init_hfi_command_ops =3D iris_hfi_gen2_command_ops_init, + .init_hfi_response_ops =3D iris_hfi_gen2_response_ops_init, + .get_vpu_buffer_size =3D iris_vpu4x_buf_size, + .vpu_ops =3D &iris_vpu4x_ops, + .set_preset_registers =3D iris_set_sm8550_preset_registers, + .icc_tbl =3D sm8550_icc_table, + .icc_tbl_size =3D ARRAY_SIZE(sm8550_icc_table), + .clk_rst_tbl =3D kaanapali_clk_reset_table, + .clk_rst_tbl_size =3D ARRAY_SIZE(kaanapali_clk_reset_table), + .bw_tbl_dec =3D sm8550_bw_table_dec, + .bw_tbl_dec_size =3D ARRAY_SIZE(sm8550_bw_table_dec), + .pmdomain_tbl =3D kaanapali_pmdomain_table, + .pmdomain_tbl_size =3D ARRAY_SIZE(kaanapali_pmdomain_table), + .opp_pd_tbl =3D sm8550_opp_pd_table, + .opp_pd_tbl_size =3D ARRAY_SIZE(sm8550_opp_pd_table), + .clk_tbl =3D kaanapali_clk_table, + .clk_tbl_size =3D ARRAY_SIZE(kaanapali_clk_table), + .opp_clk_tbl =3D kaanapali_opp_clk_table, + /* Upper bound of DMA address range */ + .dma_mask =3D 0xffe00000 - 1, + .fwname =3D "qcom/vpu/vpu40_p2_s7.mbn", + .pas_id =3D IRIS_PAS_ID, + .inst_iris_fmts =3D platform_fmts_sm8550_dec, + .inst_iris_fmts_size =3D ARRAY_SIZE(platform_fmts_sm8550_dec), + .inst_caps =3D &platform_inst_cap_sm8550, + .inst_fw_caps_dec =3D inst_fw_cap_sm8550_dec, + .inst_fw_caps_dec_size =3D ARRAY_SIZE(inst_fw_cap_sm8550_dec), + .inst_fw_caps_enc =3D inst_fw_cap_sm8550_enc, + .inst_fw_caps_enc_size =3D ARRAY_SIZE(inst_fw_cap_sm8550_enc), + .tz_cp_config_data =3D tz_cp_config_kaanapali, + .tz_cp_config_data_size =3D ARRAY_SIZE(tz_cp_config_kaanapali), + .cb_data =3D kaanapali_cb_data, + .cb_data_size =3D ARRAY_SIZE(kaanapali_cb_data), + .core_arch =3D VIDEO_ARCH_LX, + .hw_response_timeout =3D HW_RESPONSE_TIMEOUT_VALUE, + .ubwc_config =3D &ubwc_config_sm8550, + .num_vpp_pipe =3D 2, + .max_session_count =3D 16, + .max_core_mbpf =3D NUM_MBS_8K * 2, + .max_core_mbps =3D ((8192 * 4352) / 256) * 60, + .dec_input_config_params_default =3D + sm8550_vdec_input_config_params_default, + .dec_input_config_params_default_size =3D + ARRAY_SIZE(sm8550_vdec_input_config_params_default), + .dec_input_config_params_hevc =3D + sm8550_vdec_input_config_param_hevc, + .dec_input_config_params_hevc_size =3D + ARRAY_SIZE(sm8550_vdec_input_config_param_hevc), + .dec_input_config_params_vp9 =3D + sm8550_vdec_input_config_param_vp9, + .dec_input_config_params_vp9_size =3D + ARRAY_SIZE(sm8550_vdec_input_config_param_vp9), + .dec_output_config_params =3D + sm8550_vdec_output_config_params, + .dec_output_config_params_size =3D + ARRAY_SIZE(sm8550_vdec_output_config_params), + + .enc_input_config_params =3D + sm8550_venc_input_config_params, + .enc_input_config_params_size =3D + ARRAY_SIZE(sm8550_venc_input_config_params), + .enc_output_config_params =3D + sm8550_venc_output_config_params, + .enc_output_config_params_size =3D + ARRAY_SIZE(sm8550_venc_output_config_params), + + .dec_input_prop =3D sm8550_vdec_subscribe_input_properties, + .dec_input_prop_size =3D ARRAY_SIZE(sm8550_vdec_subscribe_input_propertie= s), + .dec_output_prop_avc =3D sm8550_vdec_subscribe_output_properties_avc, + .dec_output_prop_avc_size =3D + ARRAY_SIZE(sm8550_vdec_subscribe_output_properties_avc), + .dec_output_prop_hevc =3D sm8550_vdec_subscribe_output_properties_hevc, + .dec_output_prop_hevc_size =3D + ARRAY_SIZE(sm8550_vdec_subscribe_output_properties_hevc), + .dec_output_prop_vp9 =3D sm8550_vdec_subscribe_output_properties_vp9, + .dec_output_prop_vp9_size =3D + ARRAY_SIZE(sm8550_vdec_subscribe_output_properties_vp9), + + .dec_ip_int_buf_tbl =3D sm8550_dec_ip_int_buf_tbl, + .dec_ip_int_buf_tbl_size =3D ARRAY_SIZE(sm8550_dec_ip_int_buf_tbl), + .dec_op_int_buf_tbl =3D sm8550_dec_op_int_buf_tbl, + .dec_op_int_buf_tbl_size =3D ARRAY_SIZE(sm8550_dec_op_int_buf_tbl), + + .enc_op_int_buf_tbl =3D sm8550_enc_op_int_buf_tbl, + .enc_op_int_buf_tbl_size =3D ARRAY_SIZE(sm8550_enc_op_int_buf_tbl), +}; + const struct iris_platform_data sm8550_data =3D { .get_instance =3D iris_hfi_gen2_get_instance, .init_hfi_command_ops =3D iris_hfi_gen2_command_ops_init, diff --git a/drivers/media/platform/qcom/iris/iris_platform_kaanapali.h b/d= rivers/media/platform/qcom/iris/iris_platform_kaanapali.h new file mode 100644 index 0000000000000000000000000000000000000000..d472e21fdac4c764169a3a8c35d= 175db29b06b5b --- /dev/null +++ b/drivers/media/platform/qcom/iris/iris_platform_kaanapali.h @@ -0,0 +1,80 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef __IRIS_PLATFORM_KAANAPALI_H__ +#define __IRIS_PLATFORM_KAANAPALI_H__ + +#define VIDEO_REGION_VM0_SECURE_NP_ID 1 +#define VIDEO_REGION_VM0_NONSECURE_NP_ID 5 + +static const char *const kaanapali_clk_reset_table[] =3D { + "bus0", + "bus1", + "core", + "vcodec0_core", +}; + +static const char *const kaanapali_pmdomain_table[] =3D { + "venus", + "vcodec0", + "vpp0", + "vpp1", + "apv", +}; + +static const struct platform_clk_data kaanapali_clk_table[] =3D { + { IRIS_AXI_CLK, "iface" }, + { IRIS_CTRL_CLK, "core" }, + { IRIS_HW_CLK, "vcodec0_core" }, + { IRIS_AXI1_CLK, "iface1" }, + { IRIS_CTRL_FREERUN_CLK, "core_freerun" }, + { IRIS_HW_FREERUN_CLK, "vcodec0_core_freerun" }, + { IRIS_BSE_HW_CLK, "vcodec_bse" }, + { IRIS_VPP0_HW_CLK, "vcodec_vpp0" }, + { IRIS_VPP1_HW_CLK, "vcodec_vpp1" }, + { IRIS_APV_HW_CLK, "vcodec_apv" }, +}; + +static const char *const kaanapali_opp_clk_table[] =3D { + "vcodec0_core", + "vcodec_apv", + "vcodec_bse", + "core", + NULL, +}; + +static struct tz_cp_config tz_cp_config_kaanapali[] =3D { + { + .cp_start =3D VIDEO_REGION_VM0_SECURE_NP_ID, + .cp_size =3D 0, + .cp_nonpixel_start =3D 0x01000000, + .cp_nonpixel_size =3D 0x24800000, + }, + { + .cp_start =3D VIDEO_REGION_VM0_NONSECURE_NP_ID, + .cp_size =3D 0, + .cp_nonpixel_start =3D 0x25800000, + .cp_nonpixel_size =3D 0xda400000, + }, +}; + +static struct iris_context_bank kaanapali_cb_data[] =3D { + { + .dev =3D NULL, + .name =3D "iris_cb_non_pixel", + .f_id =3D IRIS_CB_NON_SECURE_NON_PIXEL, + .region =3D IRIS_NON_SECURE_NON_PIXEL | IRIS_NON_SECURE_BITSTREAM, + .dma_mask =3D 0xffe00000 - 1, + }, + { + .dev =3D NULL, + .name =3D "iris_cb_pixel", + .f_id =3D IRIS_CB_NON_SECURE_PIXEL, + .region =3D IRIS_NON_SECURE_PIXEL, + .dma_mask =3D 0xffe00000 - 1, + }, +}; + +#endif /* __IRIS_PLATFORM_KAANAPALI_H__ */ diff --git a/drivers/media/platform/qcom/iris/iris_probe.c b/drivers/media/= platform/qcom/iris/iris_probe.c index c1a6aac5a3d65d980c5a34ba5fa1c1dbcf790ec5..9cc55f5e7be1701a14eedd06453= ddb0b59844ffa 100644 --- a/drivers/media/platform/qcom/iris/iris_probe.c +++ b/drivers/media/platform/qcom/iris/iris_probe.c @@ -395,6 +395,10 @@ static const struct dev_pm_ops iris_pm_ops =3D { }; =20 static const struct of_device_id iris_dt_match[] =3D { + { + .compatible =3D "qcom,kaanapali-iris", + .data =3D &kaanapali_data, + }, { .compatible =3D "qcom,qcs8300-iris", .data =3D &qcs8300_data, --=20 2.34.1