From nobody Mon Feb 9 09:32:36 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 31B12336EFD for ; Mon, 26 Jan 2026 12:27:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769430421; cv=none; b=ZfpbWzjcscHh92f6t1NsYtXMIe7vF+pE7Ckp99EBXc3GpMWqUxdp44EL0g+0P4/4DeoYzf+1gk18eiE6oBnJuvqDihD9ZFcVPJbZ8BnOX3jPcMbKRh+uI7VQQvdxITqRqZVq9d0EUQ89gzPB10RbY5tAtLLhkKnBFz7Ndb3uwJU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769430421; c=relaxed/simple; bh=vtFI6mihbvZCNBhpCUC4IoqyoPFGBZHbA1j3YMa1ttA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=hPyb32as7NY+sARvwpXRlnAlN1qYXIlAqmrqZedUM2+45f2tDOh6VcgYe3hB8nOLIG07IsS7lPng6IXu5c2kzvGgZFgQsETqVRDcNhQjN6x/xd0AwhrVTgFrWcQjNI6k0BBTlWy3wStHQb9cCWd0wtvKOGm8Vs2cNBYrAIx0DoM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=TQnQxhTX; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=SbSFW4VS; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="TQnQxhTX"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="SbSFW4VS" Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 60Q40lji1361526 for ; Mon, 26 Jan 2026 12:26:59 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= 4hdWpNZWn4nQsY52qlMev2apCckLHnrTywvI+NelvIQ=; b=TQnQxhTXNH+sN09R 13TH5S9m0X3HT3wDKKbS3F+rWe5TiDQsfu2oijSBruWANjWUF664zhFrmSyTUEb6 jj6+aUU9pM/Keequsue4sU9jcYNHhTjWi34rNmpHGjC+g53t9H2x54yKaSilcNe4 5cwAfYHwf8QtgNDl+NPQcfFoJgLkjZ8P74k8VbMLOkWHxqpXEfbA32/2nzy+E5m5 ToGuowWCb+2UH+ZQ0yXN4MRpr1NwoLx41k31zZciCUfZWL4Ge5+WU0OpGTZWwCdF aC7tUi2GhMZ0xIeKk99s5DkwgMTyou1XPvti7T2bSZWf3ygPqeWrL1rMHIdKELzN 5JIiUA== Received: from mail-pg1-f200.google.com (mail-pg1-f200.google.com [209.85.215.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4bx0v314pr-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 26 Jan 2026 12:26:59 +0000 (GMT) Received: by mail-pg1-f200.google.com with SMTP id 41be03b00d2f7-b6ce1b57b9cso2147533a12.1 for ; Mon, 26 Jan 2026 04:26:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1769430419; x=1770035219; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=4hdWpNZWn4nQsY52qlMev2apCckLHnrTywvI+NelvIQ=; b=SbSFW4VSxCxJ5kKXLPJ2s+J7rWrBa1wNkARvYd5LYBGs/EYDYRSIqUKT6BlXeevKk9 V6eVlHAjKPr8g18UUaH/82+9DhauwVWj2WJIon14TyYj8GTY6Rj/Is0SlkVV4mMCgGwM /yk955CVVlYfllUtsWeoCvyJfejlCOg/8NY6DDqwW5qOwqoER2SOibNP5KnqX8THBtF6 cF01FPQalNLnDsdJc3KyMzPAQlq29bvjZTKJEGXYQSsXKbaeU+lgf3+OSrvlJElfFJlV u3sEmDOH0UcgMT5Fy/DgUIYM46t5p7GBDZjVTZ1nX1NQLBYpe9IMtGrGofTC8eAGnAhy TCPQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1769430419; x=1770035219; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=4hdWpNZWn4nQsY52qlMev2apCckLHnrTywvI+NelvIQ=; b=mt3OJ2oSAtACskrG1GVlwjWIW9kRRR3+5oVqVfTyTsqWKv3R23BhSNBFRuQThlQfPy pX9mdCn/xU5iKWTdEbVpX2FmM7UMdLgh2+AGWDcOfvJVxAFfMnkzDYPbH3EhUr29NGIh hISpsIfzE8OsexruMoiUWzMdC89TgE8BxAxISsu9CEU4OC94nA3oSsUeqriUzv9cRU6L 996Q6Ylej0HLLeU+dcYNeDRV0TUUl4Y9TXM0U2zeTnXK8h8UWxx6rlFIShgBEgRwCh23 DFhgQquqt2ZUmTwkoMV/Uopn3rpoAu+kNvKTbAT7vEGNOC/oEV3dXrydUKTmixEslPBL I80w== X-Forwarded-Encrypted: i=1; AJvYcCV7MSSB9YBzev+rBXdmk6Q+3ipXprhKOajMUDp0ZRbnA/S5YazSgtvqxajj9ashbq9UOSb8byho8Hb7OUA=@vger.kernel.org X-Gm-Message-State: AOJu0Ywao9Gm2U3c8CxO9VRIUWX6RQ2A8/4zij6+279wi5PuA0DY70z1 y402Bm83wxfSpEftGS5Rv/qtmRLamoXwAeqDUrcRq0/bFSf0TjM7+X0t2VyE4tzAyl7j0sliVCZ I+CzboulJ+ALKD2LjgBu+u/c5whaoaS2o7ZkXDtjJN3GvF+t6XJ265A7jagk4N08Nuus= X-Gm-Gg: AZuq6aK4gTG/EOQA7jEBMzddjtlIDs8euyFLUxofCbAekoEGcTq56EqYl483DN3eWTK dEo6kn+PMJd9M9+9nk4Re/G8BDGV835jOC/o1+1oorEPJLPTQvelBZD7JYqtx0tj5wEqC9osvmj iRCADq34xMEp6oJcmTMHZxAGNsLbLb5L+HBy4HMcWW3iPrqjeCPIitsnYZkzWONipMqERjiwV5e kl8dmQwuz4mJT2ywVuzfr1gtzmhxsHYwSAgH/M9JrFrzFKOeILjmCvVTWvGgl7TEBgTylBYP7uc wu9cy0r07MALZzcUVOn0zle3wv9VtA8VHtVi9fv4q9doFak9b012TnLJ64w8GItm/G5CzKw6h7f 5xUSoYXmnTSmuGxgjKWX107cxGM4flJBB9FuRNRZGAWms X-Received: by 2002:a05:6a21:6009:b0:366:14b0:4b0b with SMTP id adf61e73a8af0-38e9f22b832mr3912158637.71.1769430418642; Mon, 26 Jan 2026 04:26:58 -0800 (PST) X-Received: by 2002:a05:6a21:6009:b0:366:14b0:4b0b with SMTP id adf61e73a8af0-38e9f22b832mr3912121637.71.1769430418165; Mon, 26 Jan 2026 04:26:58 -0800 (PST) Received: from hu-vgarodia-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c6366644379sm6076022a12.33.2026.01.26.04.26.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jan 2026 04:26:57 -0800 (PST) From: Vikash Garodia Date: Mon, 26 Jan 2026 17:55:48 +0530 Subject: [PATCH 5/7] media: iris: add context bank devices using iommu-map Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260126-kaanapali-iris-v1-5-e2646246bfc1@oss.qualcomm.com> References: <20260126-kaanapali-iris-v1-0-e2646246bfc1@oss.qualcomm.com> In-Reply-To: <20260126-kaanapali-iris-v1-0-e2646246bfc1@oss.qualcomm.com> To: Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Saravana Kannan , Joerg Roedel , Will Deacon , Robin Murphy , Stefan Schmidt , Hans Verkuil , Krzysztof Kozlowski , Vishnu Reddy , Hans Verkuil Cc: linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, iommu@lists.linux.dev, Bryan O'Donoghue , Vikash Garodia X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1769430381; l=7379; i=vikash.garodia@oss.qualcomm.com; s=20241104; h=from:subject:message-id; bh=vtFI6mihbvZCNBhpCUC4IoqyoPFGBZHbA1j3YMa1ttA=; b=3x2QxH2A5ItlGt1C/LKX5pg5hXXM617Hf4dTm2ITEHRf1AOwR/t0blMoLsCOT+TF3yLA0F1kY knM0InaGYGlAk97PqVgBsi0KbIStbOx0kDuiVyZnES783trGHhCSPWF X-Developer-Key: i=vikash.garodia@oss.qualcomm.com; a=ed25519; pk=LY9Eqp4KiHWxzGNKGHbwRFEJOfRCSzG/rxQNmvZvaKE= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI2MDEwNSBTYWx0ZWRfX64k9sQH4w0BV JEcBxvab9W5WqSOlutz7Tn+JtS/l8IBAGyZM1bZaOU8ANr+N1xkAQaCHL3B9cWw5xSlfzs9xwod RiXdJSeXGPNii6/Ko8fRTWp1zkODzrTff2QktaRK9PQwm61/TnqWq53oFaaIcoV+7kv5ZOd6kjD Nsj5M3QDFDZeC/HJzXbPuIeaShcDbkwXKFJHmunqBmSzdtlozYsowfnArXrZ8dqlL4nVe19d/sU yqEt9Ced90wrZ3ibT5xEuG/OhgOWY5gIVSoteywSFQxe6xbDp9uuY5hZzdCNZIA//IHtxHZT3zV 0p4bfpyYoUnwf3ytwHvqyDxSSbe21KgQ7oj/HjB5nkxEdtXtMgEHbWKq4B90fF7U2F2ff2GqUU6 Ke7gvoV1FhkeTpGczPeOTwfhq0fGCDeiQF0/in8hpsWCp0WOUjxzpblR5uV/lBdH60tfk8NxS14 5YUfYned0t8yvT+XUIg== X-Proofpoint-GUID: Un5k2F6M6huHSEKoPjlBSgxiVbalj1Ss X-Proofpoint-ORIG-GUID: Un5k2F6M6huHSEKoPjlBSgxiVbalj1Ss X-Authority-Analysis: v=2.4 cv=JYyxbEKV c=1 sm=1 tr=0 ts=69775d93 cx=c_pps a=oF/VQ+ItUULfLr/lQ2/icg==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=vM_uiRQ4VLTwqj5zvH8A:9 a=QEXdDO2ut3YA:10 a=3WC7DwWrALyhR5TkjVHa:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.20,FMLib:17.12.100.49 definitions=2026-01-26_02,2026-01-22_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 lowpriorityscore=0 adultscore=0 bulkscore=0 clxscore=1015 impostorscore=0 phishscore=0 suspectscore=0 malwarescore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601260105 Introduce different context banks(CB) and the associated buffer region. Different stream IDs from VPU would be associated to one of these CB. The patch ensures to handle CBs which are described as iommu-map in DT. Multiple CBs are needed to increase the IOVA for the video usecases like higher concurrent sessions. Co-developed-by: Vishnu Reddy Signed-off-by: Vishnu Reddy Signed-off-by: Vikash Garodia --- .../platform/qcom/iris/iris_platform_common.h | 29 ++++++++++++ drivers/media/platform/qcom/iris/iris_probe.c | 55 ++++++++++++++++++= ++-- drivers/media/platform/qcom/iris/iris_resources.c | 35 ++++++++++++++ drivers/media/platform/qcom/iris/iris_resources.h | 1 + 4 files changed, 116 insertions(+), 4 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/driv= ers/media/platform/qcom/iris/iris_platform_common.h index 5a489917580eb10022fdcb52f7321a915e8b239d..d2d7c898fc8ef0de1b16aebd726= 81ea3c5b736ae 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -204,6 +204,33 @@ struct icc_vote_data { u32 fps; }; =20 +enum iris_iommu_map_function_id { + IRIS_CB_NON_SECURE_NON_PIXEL =3D 0x100, + IRIS_CB_NON_SECURE_PIXEL =3D 0x101, + IRIS_CB_NON_SECURE_BITSTREAM =3D 0x102, + IRIS_CB_SECURE_NON_PIXEL =3D 0x200, + IRIS_CB_SECURE_PIXEL =3D 0x201, + IRIS_CB_SECURE_BITSTREAM =3D 0x202, + IRIS_CB_FIRMWARE =3D 0x300, +}; + +enum iris_buffer_region { + IRIS_NON_SECURE_NON_PIXEL =3D BIT(0), + IRIS_NON_SECURE_PIXEL =3D BIT(1), + IRIS_NON_SECURE_BITSTREAM =3D BIT(2), + IRIS_SECURE_NON_PIXEL =3D BIT(3), + IRIS_SECURE_PIXEL =3D BIT(4), + IRIS_SECURE_BITSTREAM =3D BIT(5), +}; + +struct iris_context_bank { + struct device *dev; + const char *name; + const enum iris_iommu_map_function_id f_id; + const enum iris_buffer_region region; + const u64 dma_mask; +}; + enum platform_pm_domain_type { IRIS_CTRL_POWER_DOMAIN, IRIS_HW_POWER_DOMAIN, @@ -246,6 +273,8 @@ struct iris_platform_data { u32 inst_fw_caps_enc_size; const struct tz_cp_config *tz_cp_config_data; u32 tz_cp_config_data_size; + struct iris_context_bank *cb_data; + u32 cb_data_size; u32 core_arch; u32 hw_response_timeout; struct ubwc_config_data *ubwc_config; diff --git a/drivers/media/platform/qcom/iris/iris_probe.c b/drivers/media/= platform/qcom/iris/iris_probe.c index ddaacda523ecb9990af0dd0640196223fbcc2cab..c1a6aac5a3d65d980c5a34ba5fa= 1c1dbcf790ec5 100644 --- a/drivers/media/platform/qcom/iris/iris_probe.c +++ b/drivers/media/platform/qcom/iris/iris_probe.c @@ -123,6 +123,37 @@ static int iris_init_resets(struct iris_core *core) core->iris_platform_data->controller_rst_tbl_size); } =20 +static int iris_init_context_bank_devices(struct iris_core *core) +{ + struct iris_context_bank *cb; + const __be32 *map_data; + int tupple_size =3D 5; + int i, j, ret, len; + u32 fid; + + map_data =3D of_get_property(core->dev->of_node, "iommu-map", &len); + if (!map_data) + return 0; + + len /=3D sizeof(__be32); + + for (i =3D 0; i < len; i +=3D tupple_size) { + fid =3D be32_to_cpu(map_data[i]); + + for (j =3D 0; j < core->iris_platform_data->cb_data_size; j++) { + cb =3D &core->iris_platform_data->cb_data[j]; + + if (fid =3D=3D cb->f_id && !cb->dev) { + ret =3D iris_create_child_device_and_map(core, cb); + if (ret) + return ret; + } + } + } + + return 0; +} + static int iris_init_resources(struct iris_core *core) { int ret; @@ -139,7 +170,11 @@ static int iris_init_resources(struct iris_core *core) if (ret) return ret; =20 - return iris_init_resets(core); + ret =3D iris_init_resets(core); + if (ret) + return ret; + + return iris_init_context_bank_devices(core); } =20 static int iris_register_video_device(struct iris_core *core, enum domain_= type type) @@ -187,6 +222,8 @@ static int iris_register_video_device(struct iris_core = *core, enum domain_type t static void iris_remove(struct platform_device *pdev) { struct iris_core *core; + struct device *dev; + int i; =20 core =3D platform_get_drvdata(pdev); if (!core) @@ -194,6 +231,14 @@ static void iris_remove(struct platform_device *pdev) =20 iris_core_deinit(core); =20 + for (i =3D 0; i < core->iris_platform_data->cb_data_size; i++) { + dev =3D core->iris_platform_data->cb_data[i].dev; + if (dev) { + platform_device_unregister(to_platform_device(dev)); + core->iris_platform_data->cb_data[i].dev =3D NULL; + } + } + video_unregister_device(core->vdev_dec); video_unregister_device(core->vdev_enc); =20 @@ -277,9 +322,11 @@ static int iris_probe(struct platform_device *pdev) =20 dma_mask =3D core->iris_platform_data->dma_mask; =20 - ret =3D dma_set_mask_and_coherent(dev, dma_mask); - if (ret) - goto err_vdev_unreg_enc; + if (device_iommu_mapped(core->dev)) { + ret =3D dma_set_mask_and_coherent(core->dev, dma_mask); + if (ret) + goto err_vdev_unreg_enc; + } =20 dma_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(32)); dma_set_seg_boundary(&pdev->dev, DMA_BIT_MASK(32)); diff --git a/drivers/media/platform/qcom/iris/iris_resources.c b/drivers/me= dia/platform/qcom/iris/iris_resources.c index 773f6548370a257b8ae7332242544266cbbd61a9..647f6760f2b7a6bab8a585a13eb= 03cf60a9c047e 100644 --- a/drivers/media/platform/qcom/iris/iris_resources.c +++ b/drivers/media/platform/qcom/iris/iris_resources.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include #include @@ -141,3 +142,37 @@ int iris_disable_unprepare_clock(struct iris_core *cor= e, enum platform_clk_type =20 return 0; } + +int iris_create_child_device_and_map(struct iris_core *core, struct iris_c= ontext_bank *cb) +{ + struct platform_device *pdev; + int ret; + + pdev =3D platform_device_alloc(cb->name, 0); + if (!pdev) + return -ENOMEM; + + ret =3D platform_device_add(pdev); + if (ret) { + platform_device_put(pdev); + return ret; + } + + ret =3D of_dma_configure_id(&pdev->dev, core->dev->of_node, true, + (const u32 *)&cb->f_id); + if (ret) + goto error_unregister; + + ret =3D dma_set_mask_and_coherent(&pdev->dev, cb->dma_mask); + if (ret) + goto error_unregister; + + cb->dev =3D &pdev->dev; + + return 0; + +error_unregister: + platform_device_unregister(to_platform_device(&pdev->dev)); + + return ret; +} diff --git a/drivers/media/platform/qcom/iris/iris_resources.h b/drivers/me= dia/platform/qcom/iris/iris_resources.h index 6bfbd2dc6db095ec05e53c894e048285f82446c6..b7efe15facb203eea9ae13d5f0a= bdcc2ea718b4d 100644 --- a/drivers/media/platform/qcom/iris/iris_resources.h +++ b/drivers/media/platform/qcom/iris/iris_resources.h @@ -15,5 +15,6 @@ int iris_unset_icc_bw(struct iris_core *core); int iris_set_icc_bw(struct iris_core *core, unsigned long icc_bw); int iris_disable_unprepare_clock(struct iris_core *core, enum platform_clk= _type clk_type); int iris_prepare_enable_clock(struct iris_core *core, enum platform_clk_ty= pe clk_type); +int iris_create_child_device_and_map(struct iris_core *core, struct iris_c= ontext_bank *cb); =20 #endif --=20 2.34.1