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Mon, 26 Jan 2026 04:26:33 -0800 (PST) Received: from hu-vgarodia-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c6366644379sm6076022a12.33.2026.01.26.04.26.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jan 2026 04:26:33 -0800 (PST) From: Vikash Garodia Date: Mon, 26 Jan 2026 17:55:44 +0530 Subject: [PATCH 1/7] media: dt-bindings: qcom-kaanapali-iris: Add kaanapali video codec binding Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260126-kaanapali-iris-v1-1-e2646246bfc1@oss.qualcomm.com> References: <20260126-kaanapali-iris-v1-0-e2646246bfc1@oss.qualcomm.com> In-Reply-To: <20260126-kaanapali-iris-v1-0-e2646246bfc1@oss.qualcomm.com> To: Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Saravana Kannan , Joerg Roedel , Will Deacon , Robin Murphy , Stefan Schmidt , Hans Verkuil , Krzysztof Kozlowski , Vishnu Reddy , Hans Verkuil Cc: linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, iommu@lists.linux.dev, Bryan O'Donoghue , Vikash Garodia X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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When compared to previous generation, iris3x, it has, - separate power domains for stream and pixel processing hardware blocks (bse and vpp). - additional power domain for apv codec. - power domains for individual pipes (VPPx). - different clocks and reset lines. iommu-map include all the different stream-ids which can be possibly generated by vpu4 hardware. Signed-off-by: Vikash Garodia --- .../bindings/media/qcom,kaanapali-iris.yaml | 234 +++++++++++++++++= ++++ 1 file changed, 234 insertions(+) diff --git a/Documentation/devicetree/bindings/media/qcom,kaanapali-iris.ya= ml b/Documentation/devicetree/bindings/media/qcom,kaanapali-iris.yaml new file mode 100644 index 0000000000000000000000000000000000000000..4ed2afacb19043a60cfd67c4492= 356b4adb81c3d --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,kaanapali-iris.yaml @@ -0,0 +1,234 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/qcom,kaanapali-iris.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Kaanapali Iris video encoder and decoder + +maintainers: + - Vikash Garodia + - Dikshita Agarwal + +description: + The iris video processing unit is a video encode and decode accelerator + present on Qualcomm Kaanapali SoC. + +properties: + compatible: + const: qcom,kaanapali-iris + + reg: + maxItems: 1 + + clocks: + maxItems: 10 + + clock-names: + items: + - const: iface + - const: core + - const: vcodec0_core + - const: iface1 + - const: core_freerun + - const: vcodec0_core_freerun + - const: vcodec_bse + - const: vcodec_vpp0 + - const: vcodec_vpp1 + - const: vcodec_apv + + dma-coherent: true + + firmware-name: + maxItems: 1 + + interconnects: + maxItems: 2 + + interconnect-names: + items: + - const: cpu-cfg + - const: video-mem + + interrupts: + maxItems: 1 + + iommu-map: true + + memory-region: + maxItems: 1 + + operating-points-v2: true + opp-table: + type: object + + power-domains: + maxItems: 7 + + power-domain-names: + items: + - const: venus + - const: vcodec0 + - const: mxc + - const: mmcx + - const: vpp0 + - const: vpp1 + - const: apv + + resets: + maxItems: 4 + + reset-names: + items: + - const: bus0 + - const: bus1 + - const: core + - const: vcodec0_core + +required: + - compatible + - reg + - clocks + - clock-names + - dma-coherent + - interconnects + - interconnect-names + - interrupts + - iommu-map + - memory-region + - power-domains + - power-domain-names + - resets + - reset-names + +unevaluatedProperties: false + +examples: + - | + #include + #include + + video-codec@2000000 { + compatible =3D "qcom,kaanapali-iris"; + reg =3D <0x02000000 0xf0000>; + + clocks =3D <&gcc_video_axi0_clk>, + <&video_cc_mvs0c_clk>, + <&video_cc_mvs0_clk>, + <&gcc_video_axi1_clk>, + <&video_cc_mvs0c_freerun_clk>, + <&video_cc_mvs0_freerun_clk>, + <&video_cc_mvs0b_clk>, + <&video_cc_mvs0_vpp0_clk>, + <&video_cc_mvs0_vpp1_clk>, + <&video_cc_mvs0a_clk>; + clock-names =3D "iface", + "core", + "vcodec0_core", + "iface1", + "core_freerun", + "vcodec0_core_freerun", + "vcodec_bse", + "vcodec_vpp0", + "vcodec_vpp1", + "vcodec_apv"; + + dma-coherent; + + interconnects =3D <&gem_noc_master_appss_proc &config_noc_slave_ve= nus_cfg>, + <&mmss_noc_master_video_mvp &mc_virt_slave_ebi1>; + interconnect-names =3D "cpu-cfg", + "video-mem"; + + interrupts =3D ; + + iommu-map =3D <0x100 &apps_smmu 0x1940 0x0 0x1>, + <0x100 &apps_smmu 0x1a20 0x0 0x1>, + <0x100 &apps_smmu 0x1944 0x0 0x1>, + <0x101 &apps_smmu 0x1943 0x0 0x1>, + <0x200 &apps_smmu 0x1941 0x0 0x1>, + <0x200 &apps_smmu 0x1a21 0x0 0x1>, + <0x201 &apps_smmu 0x1945 0x0 0x1>, + <0x202 &apps_smmu 0x1946 0x0 0x1>, + <0x300 &apps_smmu 0x1a22 0x0 0x1>; + + memory-region =3D <&video_mem>; + + operating-points-v2 =3D <&iris_opp_table>; + + power-domains =3D <&video_cc_mvs0c_gdsc>, + <&video_cc_mvs0_gdsc>, + <&rpmhpd RPMHPD_MXC>, + <&rpmhpd RPMHPD_MMCX>, + <&video_cc_mvs0_vpp0_gdsc>, + <&video_cc_mvs0_vpp1_gdsc>, + <&video_cc_mvs0a_gdsc>; + power-domain-names =3D "venus", + "vcodec0", + "mxc", + "mmcx", + "vpp0", + "vpp1", + "apv"; + + resets =3D <&gcc_video_axi0_clk_ares>, + <&gcc_video_axi1_clk_ares>, + <&video_cc_mvs0c_freerun_clk_ares>, + <&video_cc_mvs0_freerun_clk_ares>; + reset-names =3D "bus0", + "bus1", + "core", + "vcodec0_core"; + + iris_opp_table: opp-table { + compatible =3D "operating-points-v2"; + + opp-240000000 { + opp-hz =3D /bits/ 64 <240000000 240000000 240000000 360000= 000>; + required-opps =3D <&rpmhpd_opp_low_svs_d1>, + <&rpmhpd_opp_low_svs_d1>; + }; + + opp-338000000 { + opp-hz =3D /bits/ 64 <338000000 338000000 338000000 507000= 000>; + required-opps =3D <&rpmhpd_opp_low_svs>, + <&rpmhpd_opp_low_svs>; + }; + + opp-420000000 { + opp-hz =3D /bits/ 64 <420000000 420000000 420000000 630000= 000>; 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There exists usecases where these set must be maintained in parallel, ex: on ARM, a dynamically created child device(s) is referencing multiple input id's in parent iommu-map. Factor out the code where multiple mappings needs to be maintained in parallel can be achieved through callback from this factored out code. Signed-off-by: Charan Teja Kalla Signed-off-by: Vijayanand Jitta Signed-off-by: Vikash Garodia --- drivers/of/base.c | 47 ++++++++++++++++++++++++++++++++--------------- 1 file changed, 32 insertions(+), 15 deletions(-) diff --git a/drivers/of/base.c b/drivers/of/base.c index 0825f3dc93f2472e9947af09acdde72031ab85bc..606bef4f90e7d13bae4f7b0c45a= cd1755ad89826 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -2122,6 +2122,32 @@ static bool of_check_bad_map(const __be32 *map, int = len) return true; } =20 +static int of_map_id_fill_output(struct of_map_id_arg *arg, + struct device_node *phandle_node, u32 id_or_offset, + const __be32 *out_base, u32 cells, + bool bypass) +{ + if (bypass) { + arg->map_args.args[0] =3D id_or_offset; + return 0; + } + + if (arg->map_args.np) + of_node_put(phandle_node); + else + arg->map_args.np =3D phandle_node; + + if (arg->map_args.np !=3D phandle_node) + return -EAGAIN; + + for (int i =3D 0; i < cells; i++) + arg->map_args.args[i] =3D (id_or_offset + be32_to_cpu(out_base[i])); + + arg->map_args.args_count =3D cells; + + return 0; +} + /** * of_map_id - Translate an ID through a downstream mapping. * @np: root complex device node. @@ -2162,8 +2188,7 @@ int of_map_id(const struct device_node *np, u32 id, c= onst char *map_name, if (arg->map_args.np) return -ENODEV; /* Otherwise, no map implies no translation */ - arg->map_args.args[0] =3D id; - return 0; + goto bypass_translation; } =20 if (map_bytes % sizeof(*map)) @@ -2185,6 +2210,7 @@ int of_map_id(const struct device_node *np, u32 id, c= onst char *map_name, struct device_node *phandle_node; u32 id_base, phandle, id_len, id_off, cells =3D 0; const __be32 *out_base; + int ret; =20 if (map_len - offset < 2) goto err_map_len; @@ -2238,19 +2264,10 @@ int of_map_id(const struct device_node *np, u32 id,= const char *map_name, if (masked_id < id_base || id_off >=3D id_len) continue; =20 - if (arg->map_args.np) - of_node_put(phandle_node); - else - arg->map_args.np =3D phandle_node; - - if (arg->map_args.np !=3D phandle_node) + ret =3D of_map_id_fill_output(arg, phandle_node, id_off, out_base, cells= , false); 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Mon, 26 Jan 2026 04:26:46 -0800 (PST) Received: from hu-vgarodia-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c6366644379sm6076022a12.33.2026.01.26.04.26.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jan 2026 04:26:45 -0800 (PST) From: Vikash Garodia Date: Mon, 26 Jan 2026 17:55:46 +0530 Subject: [PATCH 3/7] of/iommu: add multi-map support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260126-kaanapali-iris-v1-3-e2646246bfc1@oss.qualcomm.com> References: <20260126-kaanapali-iris-v1-0-e2646246bfc1@oss.qualcomm.com> In-Reply-To: <20260126-kaanapali-iris-v1-0-e2646246bfc1@oss.qualcomm.com> To: Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Saravana Kannan , Joerg Roedel , Will Deacon , Robin Murphy , Stefan Schmidt , Hans Verkuil , Krzysztof Kozlowski , Vishnu Reddy , Hans Verkuil Cc: linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, iommu@lists.linux.dev, Bryan O'Donoghue , Vikash Garodia , Charan Teja Kalla , Vijayanand Jitta X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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There is a usecase[1] where all the mappings are to be maintained in parallel for an iommu-map entry of a same input id. Whether multi-map is needed is reported by the callers through the callback function passed, which is called for every input id match. Since the requirement in the usecase[1] is for platform devices, not sure if it is really clean to maintain this decision on the bus type at the of_iommu layer or further to be from the respective iommu_driver->impl_ops(). [1] https://lore.kernel.org/all/20250627-video_cb-v3-0-51e18c0ffbce@quicinc= .com/ Signed-off-by: Charan Teja Kalla Signed-off-by: Vijayanand Jitta Signed-off-by: Vikash Garodia --- drivers/iommu/of_iommu.c | 36 ++++++++++++++++++++++++++++-------- drivers/of/base.c | 38 ++++++++++++++++++++++++++++---------- include/linux/of.h | 6 ++++++ 3 files changed, 62 insertions(+), 18 deletions(-) diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c index 768eaddf927b0700b2497b08ea21611b1a1b5688..067bb2298973671e1eaf01bb2ea= 52df3d2a52a44 100644 --- a/drivers/iommu/of_iommu.c +++ b/drivers/iommu/of_iommu.c @@ -16,6 +16,7 @@ #include #include #include +#include =20 #include "iommu-priv.h" =20 @@ -41,22 +42,41 @@ static int of_iommu_xlate(struct device *dev, return ret; } =20 +/* + * Callback to be called from of_map_id(), that tells if + * all the mappings for an input id to be maintained in + * parallel. Should this decission be from further layers, + * iommu_driver->impl_ops? + */ +static int of_iommu_configure_cb(struct of_map_id_arg *arg) +{ + struct of_phandle_args *iommu_spec =3D &arg->map_args; + struct device *dev =3D arg->dev; + int err; + + err =3D of_iommu_xlate(dev, iommu_spec); + of_node_put(iommu_spec->np); + + /* !iommu_spec->np may be from the bypassed translations */ + if (!err) + err =3D (!arg->multi_map || !iommu_spec->np) ? 0 : -EAGAIN; + + return err; +} + static int of_iommu_configure_dev_id(struct device_node *master_np, struct device *dev, const u32 *id) { struct of_map_id_arg arg =3D { .map_args =3D {}, + .cb =3D of_iommu_configure_cb, + .dev =3D dev, + /* Should this be pushed to iommu_driver->impl_ops? */ + .multi_map =3D dev_is_platform(dev), }; - int err; - - err =3D of_map_iommu_id(master_np, *id, &arg); - if (err) - return err; =20 - err =3D of_iommu_xlate(dev, &arg.map_args); - of_node_put(arg.map_args.np); - return err; + return of_map_iommu_id(master_np, *id, &arg); } =20 static int of_iommu_configure_dev(struct device_node *master_np, diff --git a/drivers/of/base.c b/drivers/of/base.c index 606bef4f90e7d13bae4f7b0c45acd1755ad89826..a1c3c5954ec7e8eb3753c8fd782= a1570f9eb9c17 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -2122,14 +2122,21 @@ static bool of_check_bad_map(const __be32 *map, int= len) return true; } =20 -static int of_map_id_fill_output(struct of_map_id_arg *arg, - struct device_node *phandle_node, u32 id_or_offset, - const __be32 *out_base, u32 cells, - bool bypass) +/* + * Fill the id_out and target for the of_map_id() caller. Also + * call the callback passed to the of_map_id() as part of the arg + * that decides if to continue further search. + */ +static int of_map_id_fill_arg(struct of_map_id_arg *arg, + struct device_node *phandle_node, u32 id_or_offset, + const __be32 *out_base, u32 cells, + bool bypass, bool *multi_id_map) { + int ret; + if (bypass) { arg->map_args.args[0] =3D id_or_offset; - return 0; + goto output; } =20 if (arg->map_args.np) @@ -2145,7 +2152,14 @@ static int of_map_id_fill_output(struct of_map_id_ar= g *arg, =20 arg->map_args.args_count =3D cells; =20 - return 0; +output: + /* pass the output for the callback, callers may further decide */ + ret =3D arg->cb ? arg->cb(arg) : 0; + + if (multi_id_map && ret =3D=3D -EAGAIN) + *multi_id_map =3D true; + + return ret; } =20 /** @@ -2179,6 +2193,7 @@ int of_map_id(const struct device_node *np, u32 id, c= onst char *map_name, int map_bytes, map_len, offset =3D 0; bool bad_map =3D false; const __be32 *map =3D NULL; + bool multi_id_map =3D false; =20 if (!np || !map_name || !arg) return -EINVAL; @@ -2264,23 +2279,26 @@ int of_map_id(const struct device_node *np, u32 id,= const char *map_name, if (masked_id < id_base || id_off >=3D id_len) continue; =20 - ret =3D of_map_id_fill_output(arg, phandle_node, id_off, out_base, cells= , false); + ret =3D of_map_id_fill_arg(arg, phandle_node, id_off, out_base, + cells, false, &multi_id_map); if (ret =3D=3D -EAGAIN) continue; =20 pr_debug("%pOF: %s, using mask %08x, id-base: %08x, out-base: %08x, leng= th: %08x, id: %08x -> %08x\n", np, map_name, map_mask, id_base, be32_to_cpup(out_base), id_len, id, id_off + be32_to_cpup(out_base)); - return 0; + return ret; } =20 + if (multi_id_map) + return 0; + pr_info("%pOF: no %s translation for id 0x%x on %pOF\n", np, map_name, id, arg->map_args.np ? arg->map_args.np : NULL); =20 bypass_translation: /* Bypasses translation */ - return of_map_id_fill_output(arg, NULL, id, 0, 0, true); - + return of_map_id_fill_arg(arg, NULL, id, 0, 0, true, NULL); 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GDSC can be powered off, keeping in hw mode, thereby the vcodec registers programmed in TrustZone (TZ) carry default (reset) values. Move the transition to HW mode after firmware load and boot sequence. The bug was exposed with driver configuring different stream ids to different devices via iommu-map. With registers carrying reset values, VPU would not generate desired stream-id, thereby leading to SMMU fault. Fixes: dde659d37036 ("media: iris: Introduce vpu ops for vpu4 with necessar= y hooks") Co-developed-by: Vishnu Reddy Signed-off-by: Vishnu Reddy Signed-off-by: Vikash Garodia --- drivers/media/platform/qcom/iris/iris_core.c | 4 ++++ drivers/media/platform/qcom/iris/iris_hfi_common.c | 4 ++++ drivers/media/platform/qcom/iris/iris_vpu2.c | 1 + drivers/media/platform/qcom/iris/iris_vpu3x.c | 9 +++----- drivers/media/platform/qcom/iris/iris_vpu4x.c | 24 ++++++++++++------= ---- drivers/media/platform/qcom/iris/iris_vpu_common.c | 16 +++++++++------ drivers/media/platform/qcom/iris/iris_vpu_common.h | 3 +++ 7 files changed, 38 insertions(+), 23 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_core.c b/drivers/media/p= latform/qcom/iris/iris_core.c index 8406c48d635b6eba0879396ce9f9ae2292743f09..dbaac01eb15a0e622e85635fddd= 29c1f7fc18662 100644 --- a/drivers/media/platform/qcom/iris/iris_core.c +++ b/drivers/media/platform/qcom/iris/iris_core.c @@ -75,6 +75,10 @@ int iris_core_init(struct iris_core *core) if (ret) goto error_unload_fw; =20 + ret =3D iris_vpu_switch_to_hwmode(core); + if (ret) + goto error_unload_fw; + ret =3D iris_hfi_core_init(core); if (ret) goto error_unload_fw; diff --git a/drivers/media/platform/qcom/iris/iris_hfi_common.c b/drivers/m= edia/platform/qcom/iris/iris_hfi_common.c index 92112eb16c11048e28230a2926dfb46e3163aada..621c66593d88d47ef3438c98a07= cb29421c4e375 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_common.c +++ b/drivers/media/platform/qcom/iris/iris_hfi_common.c @@ -159,6 +159,10 @@ int iris_hfi_pm_resume(struct iris_core *core) if (ret) goto err_suspend_hw; =20 + ret =3D iris_vpu_switch_to_hwmode(core); + if (ret) + goto err_suspend_hw; + ret =3D ops->sys_interframe_powercollapse(core); if (ret) goto err_suspend_hw; diff --git a/drivers/media/platform/qcom/iris/iris_vpu2.c b/drivers/media/p= latform/qcom/iris/iris_vpu2.c index 9c103a2e4e4eafee101a8a9b168fdc8ca76e277d..01ef40f3895743b3784464e2d5b= a2de1aeca5a4a 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu2.c +++ b/drivers/media/platform/qcom/iris/iris_vpu2.c @@ -44,4 +44,5 @@ const struct vpu_ops iris_vpu2_ops =3D { .power_off_controller =3D iris_vpu_power_off_controller, .power_on_controller =3D iris_vpu_power_on_controller, .calc_freq =3D iris_vpu2_calc_freq, + .set_hwmode =3D iris_vpu_set_hwmode, }; diff --git a/drivers/media/platform/qcom/iris/iris_vpu3x.c b/drivers/media/= platform/qcom/iris/iris_vpu3x.c index fe4423b951b1e9e31d06dffc69d18071cc985731..3dad47be78b58f6cd5ed6f333b3= 376571a04dbf0 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu3x.c +++ b/drivers/media/platform/qcom/iris/iris_vpu3x.c @@ -234,14 +234,8 @@ static int iris_vpu35_power_on_hw(struct iris_core *co= re) if (ret) goto err_disable_hw_free_clk; =20 - ret =3D dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER= _DOMAIN], true); - if (ret) - goto err_disable_hw_clk; - return 0; =20 -err_disable_hw_clk: - iris_disable_unprepare_clock(core, IRIS_HW_CLK); err_disable_hw_free_clk: iris_disable_unprepare_clock(core, IRIS_HW_FREERUN_CLK); err_disable_axi_clk: @@ -266,6 +260,7 @@ const struct vpu_ops iris_vpu3_ops =3D { .power_off_controller =3D iris_vpu_power_off_controller, .power_on_controller =3D iris_vpu_power_on_controller, .calc_freq =3D iris_vpu3x_vpu4x_calculate_frequency, + .set_hwmode =3D iris_vpu_set_hwmode, }; =20 const struct vpu_ops iris_vpu33_ops =3D { @@ -274,6 +269,7 @@ const struct vpu_ops iris_vpu33_ops =3D { .power_off_controller =3D iris_vpu33_power_off_controller, .power_on_controller =3D iris_vpu_power_on_controller, .calc_freq =3D iris_vpu3x_vpu4x_calculate_frequency, + .set_hwmode =3D iris_vpu_set_hwmode, }; =20 const struct vpu_ops iris_vpu35_ops =3D { @@ -283,4 +279,5 @@ const struct vpu_ops iris_vpu35_ops =3D { .power_on_controller =3D iris_vpu35_vpu4x_power_on_controller, .program_bootup_registers =3D iris_vpu35_vpu4x_program_bootup_registers, .calc_freq =3D iris_vpu3x_vpu4x_calculate_frequency, + .set_hwmode =3D iris_vpu_set_hwmode, }; diff --git a/drivers/media/platform/qcom/iris/iris_vpu4x.c b/drivers/media/= platform/qcom/iris/iris_vpu4x.c index a8db02ce5c5ec583c4027166b34ce51d3d683b4e..02e100a4045fced33d7a3545b63= 2cc5f0955233f 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu4x.c +++ b/drivers/media/platform/qcom/iris/iris_vpu4x.c @@ -252,21 +252,10 @@ static int iris_vpu4x_power_on_hardware(struct iris_c= ore *core) ret =3D iris_vpu4x_power_on_apv(core); if (ret) goto disable_hw_clocks; - - iris_vpu4x_ahb_sync_reset_apv(core); } =20 - iris_vpu4x_ahb_sync_reset_hardware(core); - - ret =3D iris_vpu4x_genpd_set_hwmode(core, true, efuse_value); - if (ret) - goto disable_apv_power_domain; - return 0; =20 -disable_apv_power_domain: - if (!(efuse_value & DISABLE_VIDEO_APV_BIT)) - iris_vpu4x_power_off_apv(core); disable_hw_clocks: iris_vpu4x_disable_hardware_clocks(core, efuse_value); disable_vpp1_power_domain: @@ -359,6 +348,18 @@ static void iris_vpu4x_power_off_hardware(struct iris_= core *core) iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWE= R_DOMAIN]); } =20 +static int iris_vpu4x_set_hwmode(struct iris_core *core) +{ + u32 efuse_value =3D readl(core->reg_base + WRAPPER_EFUSE_MONITOR); + + if (!(efuse_value & DISABLE_VIDEO_APV_BIT)) + iris_vpu4x_ahb_sync_reset_apv(core); + + iris_vpu4x_ahb_sync_reset_hardware(core); + + return iris_vpu4x_genpd_set_hwmode(core, true, efuse_value); +} + const struct vpu_ops iris_vpu4x_ops =3D { .power_off_hw =3D iris_vpu4x_power_off_hardware, .power_on_hw =3D iris_vpu4x_power_on_hardware, @@ -366,4 +367,5 @@ const struct vpu_ops iris_vpu4x_ops =3D { .power_on_controller =3D iris_vpu35_vpu4x_power_on_controller, .program_bootup_registers =3D iris_vpu35_vpu4x_program_bootup_registers, .calc_freq =3D iris_vpu3x_vpu4x_calculate_frequency, + .set_hwmode =3D iris_vpu4x_set_hwmode, }; diff --git a/drivers/media/platform/qcom/iris/iris_vpu_common.c b/drivers/m= edia/platform/qcom/iris/iris_vpu_common.c index 548e5f1727fdb7543f76a1871f17257fa2360733..69e6126dc4d95ed9e5fccf59620= 5e84ec0bfc82d 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_common.c +++ b/drivers/media/platform/qcom/iris/iris_vpu_common.c @@ -292,14 +292,8 @@ int iris_vpu_power_on_hw(struct iris_core *core) if (ret && ret !=3D -ENOENT) goto err_disable_hw_clock; =20 - ret =3D dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER= _DOMAIN], true); - if (ret) - goto err_disable_hw_ahb_clock; - return 0; =20 -err_disable_hw_ahb_clock: - iris_disable_unprepare_clock(core, IRIS_HW_AHB_CLK); err_disable_hw_clock: iris_disable_unprepare_clock(core, IRIS_HW_CLK); err_disable_power: @@ -308,6 +302,16 @@ int iris_vpu_power_on_hw(struct iris_core *core) return ret; } =20 +int iris_vpu_set_hwmode(struct iris_core *core) +{ + return dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_= DOMAIN], true); +} + +int iris_vpu_switch_to_hwmode(struct iris_core *core) +{ + return core->iris_platform_data->vpu_ops->set_hwmode(core); +} + int iris_vpu35_vpu4x_power_off_controller(struct iris_core *core) { u32 clk_rst_tbl_size =3D core->iris_platform_data->clk_rst_tbl_size; diff --git a/drivers/media/platform/qcom/iris/iris_vpu_common.h b/drivers/m= edia/platform/qcom/iris/iris_vpu_common.h index f6dffc613b822341fb21e12de6b1395202f62cde..dee3b1349c5e869619c7f7c294d= d711f9ff72b92 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_common.h +++ b/drivers/media/platform/qcom/iris/iris_vpu_common.h @@ -21,6 +21,7 @@ struct vpu_ops { int (*power_on_controller)(struct iris_core *core); void (*program_bootup_registers)(struct iris_core *core); u64 (*calc_freq)(struct iris_inst *inst, size_t data_size); + int (*set_hwmode)(struct iris_core *core); }; =20 int iris_vpu_boot_firmware(struct iris_core *core); @@ -30,6 +31,8 @@ int iris_vpu_watchdog(struct iris_core *core, u32 intr_st= atus); int iris_vpu_prepare_pc(struct iris_core *core); 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Different stream IDs from VPU would be associated to one of these CB. The patch ensures to handle CBs which are described as iommu-map in DT. Multiple CBs are needed to increase the IOVA for the video usecases like higher concurrent sessions. Co-developed-by: Vishnu Reddy Signed-off-by: Vishnu Reddy Signed-off-by: Vikash Garodia --- .../platform/qcom/iris/iris_platform_common.h | 29 ++++++++++++ drivers/media/platform/qcom/iris/iris_probe.c | 55 ++++++++++++++++++= ++-- drivers/media/platform/qcom/iris/iris_resources.c | 35 ++++++++++++++ drivers/media/platform/qcom/iris/iris_resources.h | 1 + 4 files changed, 116 insertions(+), 4 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/driv= ers/media/platform/qcom/iris/iris_platform_common.h index 5a489917580eb10022fdcb52f7321a915e8b239d..d2d7c898fc8ef0de1b16aebd726= 81ea3c5b736ae 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -204,6 +204,33 @@ struct icc_vote_data { u32 fps; }; =20 +enum iris_iommu_map_function_id { + IRIS_CB_NON_SECURE_NON_PIXEL =3D 0x100, + IRIS_CB_NON_SECURE_PIXEL =3D 0x101, + IRIS_CB_NON_SECURE_BITSTREAM =3D 0x102, + IRIS_CB_SECURE_NON_PIXEL =3D 0x200, + IRIS_CB_SECURE_PIXEL =3D 0x201, + IRIS_CB_SECURE_BITSTREAM =3D 0x202, + IRIS_CB_FIRMWARE =3D 0x300, +}; + +enum iris_buffer_region { + IRIS_NON_SECURE_NON_PIXEL =3D BIT(0), + IRIS_NON_SECURE_PIXEL =3D BIT(1), + IRIS_NON_SECURE_BITSTREAM =3D BIT(2), + IRIS_SECURE_NON_PIXEL =3D BIT(3), + IRIS_SECURE_PIXEL =3D BIT(4), + IRIS_SECURE_BITSTREAM =3D BIT(5), +}; + +struct iris_context_bank { + struct device *dev; + const char *name; + const enum iris_iommu_map_function_id f_id; + const enum iris_buffer_region region; + const u64 dma_mask; +}; + enum platform_pm_domain_type { IRIS_CTRL_POWER_DOMAIN, IRIS_HW_POWER_DOMAIN, @@ -246,6 +273,8 @@ struct iris_platform_data { u32 inst_fw_caps_enc_size; const struct tz_cp_config *tz_cp_config_data; u32 tz_cp_config_data_size; + struct iris_context_bank *cb_data; + u32 cb_data_size; u32 core_arch; u32 hw_response_timeout; struct ubwc_config_data *ubwc_config; diff --git a/drivers/media/platform/qcom/iris/iris_probe.c b/drivers/media/= platform/qcom/iris/iris_probe.c index ddaacda523ecb9990af0dd0640196223fbcc2cab..c1a6aac5a3d65d980c5a34ba5fa= 1c1dbcf790ec5 100644 --- a/drivers/media/platform/qcom/iris/iris_probe.c +++ b/drivers/media/platform/qcom/iris/iris_probe.c @@ -123,6 +123,37 @@ static int iris_init_resets(struct iris_core *core) core->iris_platform_data->controller_rst_tbl_size); } =20 +static int iris_init_context_bank_devices(struct iris_core *core) +{ + struct iris_context_bank *cb; + const __be32 *map_data; + int tupple_size =3D 5; + int i, j, ret, len; + u32 fid; + + map_data =3D of_get_property(core->dev->of_node, "iommu-map", &len); + if (!map_data) + return 0; + + len /=3D sizeof(__be32); + + for (i =3D 0; i < len; i +=3D tupple_size) { + fid =3D be32_to_cpu(map_data[i]); + + for (j =3D 0; j < core->iris_platform_data->cb_data_size; j++) { + cb =3D &core->iris_platform_data->cb_data[j]; + + if (fid =3D=3D cb->f_id && !cb->dev) { + ret =3D iris_create_child_device_and_map(core, cb); + if (ret) + return ret; + } + } + } + + return 0; +} + static int iris_init_resources(struct iris_core *core) { int ret; @@ -139,7 +170,11 @@ static int iris_init_resources(struct iris_core *core) if (ret) return ret; =20 - return iris_init_resets(core); + ret =3D iris_init_resets(core); + if (ret) + return ret; + + return iris_init_context_bank_devices(core); } =20 static int iris_register_video_device(struct iris_core *core, enum domain_= type type) @@ -187,6 +222,8 @@ static int iris_register_video_device(struct iris_core = *core, enum domain_type t static void iris_remove(struct platform_device *pdev) { struct iris_core *core; + struct device *dev; + int i; =20 core =3D platform_get_drvdata(pdev); if (!core) @@ -194,6 +231,14 @@ static void iris_remove(struct platform_device *pdev) =20 iris_core_deinit(core); =20 + for (i =3D 0; i < core->iris_platform_data->cb_data_size; i++) { + dev =3D core->iris_platform_data->cb_data[i].dev; + if (dev) { + platform_device_unregister(to_platform_device(dev)); + core->iris_platform_data->cb_data[i].dev =3D NULL; + } + } + video_unregister_device(core->vdev_dec); video_unregister_device(core->vdev_enc); =20 @@ -277,9 +322,11 @@ static int iris_probe(struct platform_device *pdev) =20 dma_mask =3D core->iris_platform_data->dma_mask; =20 - ret =3D dma_set_mask_and_coherent(dev, dma_mask); - if (ret) - goto err_vdev_unreg_enc; + if (device_iommu_mapped(core->dev)) { + ret =3D dma_set_mask_and_coherent(core->dev, dma_mask); + if (ret) + goto err_vdev_unreg_enc; + } =20 dma_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(32)); dma_set_seg_boundary(&pdev->dev, DMA_BIT_MASK(32)); diff --git a/drivers/media/platform/qcom/iris/iris_resources.c b/drivers/me= dia/platform/qcom/iris/iris_resources.c index 773f6548370a257b8ae7332242544266cbbd61a9..647f6760f2b7a6bab8a585a13eb= 03cf60a9c047e 100644 --- a/drivers/media/platform/qcom/iris/iris_resources.c +++ b/drivers/media/platform/qcom/iris/iris_resources.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include #include @@ -141,3 +142,37 @@ int iris_disable_unprepare_clock(struct iris_core *cor= e, enum platform_clk_type =20 return 0; } + +int iris_create_child_device_and_map(struct iris_core *core, struct iris_c= ontext_bank *cb) +{ + struct platform_device *pdev; + int ret; + + pdev =3D platform_device_alloc(cb->name, 0); + if (!pdev) + return -ENOMEM; + + ret =3D platform_device_add(pdev); + if (ret) { + platform_device_put(pdev); + return ret; + } + + ret =3D of_dma_configure_id(&pdev->dev, core->dev->of_node, true, + (const u32 *)&cb->f_id); + if (ret) + goto error_unregister; + + ret =3D dma_set_mask_and_coherent(&pdev->dev, cb->dma_mask); + if (ret) + goto error_unregister; + + cb->dev =3D &pdev->dev; + + return 0; + +error_unregister: + platform_device_unregister(to_platform_device(&pdev->dev)); + + return ret; +} diff --git a/drivers/media/platform/qcom/iris/iris_resources.h b/drivers/me= dia/platform/qcom/iris/iris_resources.h index 6bfbd2dc6db095ec05e53c894e048285f82446c6..b7efe15facb203eea9ae13d5f0a= bdcc2ea718b4d 100644 --- a/drivers/media/platform/qcom/iris/iris_resources.h +++ b/drivers/media/platform/qcom/iris/iris_resources.h @@ -15,5 +15,6 @@ int iris_unset_icc_bw(struct iris_core *core); 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Fallback to parent device for backward compatibility. Co-developed-by: Vishnu Reddy Signed-off-by: Vishnu Reddy Signed-off-by: Vikash Garodia --- drivers/media/platform/qcom/iris/iris_buffer.c | 7 +-- drivers/media/platform/qcom/iris/iris_buffer.h | 2 + drivers/media/platform/qcom/iris/iris_hfi_queue.c | 16 ++++--- drivers/media/platform/qcom/iris/iris_resources.c | 58 +++++++++++++++++++= ++++ drivers/media/platform/qcom/iris/iris_resources.h | 2 + drivers/media/platform/qcom/iris/iris_vidc.c | 4 +- 6 files changed, 77 insertions(+), 12 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_buffer.c b/drivers/media= /platform/qcom/iris/iris_buffer.c index f1f003a787bf22db6f048c9e682ba8ed2f39bc21..060b12525a63b9dbffa19f23c63= f1dc50429069b 100644 --- a/drivers/media/platform/qcom/iris/iris_buffer.c +++ b/drivers/media/platform/qcom/iris/iris_buffer.c @@ -335,8 +335,8 @@ void iris_get_internal_buffers(struct iris_inst *inst, = u32 plane) static int iris_create_internal_buffer(struct iris_inst *inst, enum iris_buffer_type buffer_type, u32 index) { + struct device *dev =3D iris_get_cb_dev(inst->core, inst, buffer_type); struct iris_buffers *buffers =3D &inst->buffers[buffer_type]; - struct iris_core *core =3D inst->core; struct iris_buffer *buffer; =20 if (!buffers->size) @@ -352,7 +352,7 @@ static int iris_create_internal_buffer(struct iris_inst= *inst, buffer->buffer_size =3D buffers->size; buffer->dma_attrs =3D DMA_ATTR_WRITE_COMBINE | DMA_ATTR_NO_KERNEL_MAPPING; =20 - buffer->kvaddr =3D dma_alloc_attrs(core->dev, buffer->buffer_size, + buffer->kvaddr =3D dma_alloc_attrs(dev, buffer->buffer_size, &buffer->device_addr, GFP_KERNEL, buffer->dma_attrs); if (!buffer->kvaddr) { kfree(buffer); @@ -490,9 +490,10 @@ int iris_queue_internal_buffers(struct iris_inst *inst= , u32 plane) int iris_destroy_internal_buffer(struct iris_inst *inst, struct iris_buffe= r *buffer) { struct iris_core *core =3D inst->core; + struct device *dev =3D iris_get_cb_dev(core, inst, buffer->type); =20 list_del(&buffer->list); - dma_free_attrs(core->dev, buffer->buffer_size, buffer->kvaddr, + dma_free_attrs(dev, buffer->buffer_size, buffer->kvaddr, buffer->device_addr, buffer->dma_attrs); kfree(buffer); =20 diff --git a/drivers/media/platform/qcom/iris/iris_buffer.h b/drivers/media= /platform/qcom/iris/iris_buffer.h index 75bb767761824c4c02e0df9b765896cc093be333..9520aa290b44f06ed2004ad8994= 0c19d1c08a3d2 100644 --- a/drivers/media/platform/qcom/iris/iris_buffer.h +++ b/drivers/media/platform/qcom/iris/iris_buffer.h @@ -28,6 +28,7 @@ struct iris_inst; * @BUF_SCRATCH_2: buffer to store encoding context data for HW * @BUF_VPSS: buffer to store VPSS context data for HW * @BUF_PARTIAL: buffer for AV1 IBC data + * @BUF_HFI_QUEUE: buffer for hardware firmware interface queue * @BUF_TYPE_MAX: max buffer types */ enum iris_buffer_type { @@ -44,6 +45,7 @@ enum iris_buffer_type { BUF_SCRATCH_2, BUF_VPSS, BUF_PARTIAL, + BUF_HFI_QUEUE, BUF_TYPE_MAX, }; =20 diff --git a/drivers/media/platform/qcom/iris/iris_hfi_queue.c b/drivers/me= dia/platform/qcom/iris/iris_hfi_queue.c index b3ed06297953b902d5ea6c452385a88d5431ac66..c1241fb8dc6519020a063cbba87= aed665701d7ae 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_queue.c +++ b/drivers/media/platform/qcom/iris/iris_hfi_queue.c @@ -245,25 +245,26 @@ static void iris_hfi_queue_deinit(struct iris_iface_q= _info *iface_q) =20 int iris_hfi_queues_init(struct iris_core *core) { + struct device *dev =3D iris_get_cb_dev(core, NULL, BUF_HFI_QUEUE); struct iris_hfi_queue_table_header *q_tbl_hdr; u32 queue_size; =20 /* Iris hardware requires 4K queue alignment */ queue_size =3D ALIGN((sizeof(*q_tbl_hdr) + (IFACEQ_QUEUE_SIZE * IFACEQ_NU= MQ)), SZ_4K); - core->iface_q_table_vaddr =3D dma_alloc_attrs(core->dev, queue_size, + core->iface_q_table_vaddr =3D dma_alloc_attrs(dev, queue_size, &core->iface_q_table_daddr, GFP_KERNEL, DMA_ATTR_WRITE_COMBINE); if (!core->iface_q_table_vaddr) { - dev_err(core->dev, "queues alloc and map failed\n"); + dev_err(dev, "queues alloc and map failed\n"); return -ENOMEM; } =20 - core->sfr_vaddr =3D dma_alloc_attrs(core->dev, SFR_SIZE, + core->sfr_vaddr =3D dma_alloc_attrs(dev, SFR_SIZE, &core->sfr_daddr, GFP_KERNEL, DMA_ATTR_WRITE_COMBINE); if (!core->sfr_vaddr) { - dev_err(core->dev, "sfr alloc and map failed\n"); - dma_free_attrs(core->dev, sizeof(*q_tbl_hdr), core->iface_q_table_vaddr, + dev_err(dev, "sfr alloc and map failed\n"); + dma_free_attrs(dev, sizeof(*q_tbl_hdr), core->iface_q_table_vaddr, core->iface_q_table_daddr, DMA_ATTR_WRITE_COMBINE); return -ENOMEM; } @@ -291,6 +292,7 @@ int iris_hfi_queues_init(struct iris_core *core) =20 void iris_hfi_queues_deinit(struct iris_core *core) { + struct device *dev =3D iris_get_cb_dev(core, NULL, BUF_HFI_QUEUE); u32 queue_size; =20 if (!core->iface_q_table_vaddr) @@ -300,7 +302,7 @@ void iris_hfi_queues_deinit(struct iris_core *core) iris_hfi_queue_deinit(&core->message_queue); iris_hfi_queue_deinit(&core->command_queue); =20 - dma_free_attrs(core->dev, SFR_SIZE, core->sfr_vaddr, + dma_free_attrs(dev, SFR_SIZE, core->sfr_vaddr, core->sfr_daddr, DMA_ATTR_WRITE_COMBINE); =20 core->sfr_vaddr =3D NULL; @@ -309,7 +311,7 @@ void iris_hfi_queues_deinit(struct iris_core *core) queue_size =3D ALIGN(sizeof(struct iris_hfi_queue_table_header) + (IFACEQ_QUEUE_SIZE * IFACEQ_NUMQ), SZ_4K); =20 - dma_free_attrs(core->dev, queue_size, core->iface_q_table_vaddr, + dma_free_attrs(dev, queue_size, core->iface_q_table_vaddr, core->iface_q_table_daddr, DMA_ATTR_WRITE_COMBINE); =20 core->iface_q_table_vaddr =3D NULL; diff --git a/drivers/media/platform/qcom/iris/iris_resources.c b/drivers/me= dia/platform/qcom/iris/iris_resources.c index 647f6760f2b7a6bab8a585a13eb03cf60a9c047e..dd3577cf485ac238015f919f663= 198a575e78dde 100644 --- a/drivers/media/platform/qcom/iris/iris_resources.c +++ b/drivers/media/platform/qcom/iris/iris_resources.c @@ -13,6 +13,7 @@ #include =20 #include "iris_core.h" +#include "iris_instance.h" #include "iris_resources.h" =20 #define BW_THRESHOLD 50000 @@ -176,3 +177,60 @@ int iris_create_child_device_and_map(struct iris_core = *core, struct iris_context =20 return ret; } + +static enum iris_buffer_region iris_get_region(struct iris_inst *inst, + enum iris_buffer_type buffer_type) +{ + switch (buffer_type) { + case BUF_INPUT: + if (inst && inst->domain =3D=3D ENCODER) + return IRIS_NON_SECURE_PIXEL; + else if (inst && inst->domain =3D=3D DECODER) + return IRIS_NON_SECURE_BITSTREAM; + break; + case BUF_OUTPUT: + if (inst && inst->domain =3D=3D ENCODER) + return IRIS_NON_SECURE_BITSTREAM; + else if (inst && inst->domain =3D=3D DECODER) + return IRIS_NON_SECURE_PIXEL; + break; + case BUF_DPB: + case BUF_VPSS: + case BUF_SCRATCH_2: + return IRIS_NON_SECURE_PIXEL; + case BUF_BIN: + case BUF_COMV: + case BUF_NON_COMV: + case BUF_LINE: + case BUF_PERSIST: + case BUF_ARP: + case BUF_HFI_QUEUE: + return IRIS_NON_SECURE_NON_PIXEL; + default: + return 0; + } + + return 0; +} + +struct device *iris_get_cb_dev(struct iris_core *core, struct iris_inst *i= nst, + enum iris_buffer_type buffer_type) +{ + enum iris_buffer_region region; + struct device *dev =3D NULL; + int i; + + region =3D iris_get_region(inst, buffer_type); + + for (i =3D 0; i < core->iris_platform_data->cb_data_size; i++) { + if (core->iris_platform_data->cb_data[i].region & region) { + dev =3D core->iris_platform_data->cb_data[i].dev; + break; + } + } + + if (!dev) + dev =3D core->dev; + + return dev; +} diff --git a/drivers/media/platform/qcom/iris/iris_resources.h b/drivers/me= dia/platform/qcom/iris/iris_resources.h index b7efe15facb203eea9ae13d5f0abdcc2ea718b4d..ea31726f1789130fccf6b24540a= 62b86cb3c36ac 100644 --- a/drivers/media/platform/qcom/iris/iris_resources.h +++ b/drivers/media/platform/qcom/iris/iris_resources.h @@ -16,5 +16,7 @@ int iris_set_icc_bw(struct iris_core *core, unsigned long= icc_bw); int iris_disable_unprepare_clock(struct iris_core *core, enum platform_clk= _type clk_type); int iris_prepare_enable_clock(struct iris_core *core, enum platform_clk_ty= pe clk_type); int iris_create_child_device_and_map(struct iris_core *core, struct iris_c= ontext_bank *cb); +struct device *iris_get_cb_dev(struct iris_core *core, struct iris_inst *i= nst, + enum iris_buffer_type buffer_type); =20 #endif diff --git a/drivers/media/platform/qcom/iris/iris_vidc.c b/drivers/media/p= latform/qcom/iris/iris_vidc.c index bd38d84c9cc79d15585ed5dd5f905a37521cb6dc..b61d7941d88662f34a9d2ab3b6c= 5bd9acf4b5df5 100644 --- a/drivers/media/platform/qcom/iris/iris_vidc.c +++ b/drivers/media/platform/qcom/iris/iris_vidc.c @@ -107,7 +107,7 @@ iris_m2m_queue_init(void *priv, struct vb2_queue *src_v= q, struct vb2_queue *dst_ src_vq->drv_priv =3D inst; src_vq->buf_struct_size =3D sizeof(struct iris_buffer); src_vq->min_reqbufs_allocation =3D MIN_BUFFERS; - src_vq->dev =3D inst->core->dev; + src_vq->dev =3D iris_get_cb_dev(inst->core, inst, BUF_INPUT); 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Move the configurations that differs in a per-SoC platform header, that will contain SoC specific data. Co-developed-by: Vishnu Reddy Signed-off-by: Vishnu Reddy Signed-off-by: Vikash Garodia --- .../platform/qcom/iris/iris_platform_common.h | 1 + .../media/platform/qcom/iris/iris_platform_gen2.c | 90 ++++++++++++++++++= ++++ .../platform/qcom/iris/iris_platform_kaanapali.h | 80 +++++++++++++++++++ drivers/media/platform/qcom/iris/iris_probe.c | 4 + 4 files changed, 175 insertions(+) diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/driv= ers/media/platform/qcom/iris/iris_platform_common.h index d2d7c898fc8ef0de1b16aebd72681ea3c5b736ae..3f047bd495413494b9afbf6f4d1= 2a8e06a9ac07a 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -41,6 +41,7 @@ enum pipe_type { PIPE_4 =3D 4, }; =20 +extern const struct iris_platform_data kaanapali_data; extern const struct iris_platform_data qcs8300_data; extern const struct iris_platform_data sc7280_data; extern const struct iris_platform_data sm8250_data; diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/driver= s/media/platform/qcom/iris/iris_platform_gen2.c index 5da90d47f9c6eab4a7e6b17841fdc0e599397bf7..cefbe72b1475cb83281d01ef382= 8f095293e098f 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c @@ -12,6 +12,7 @@ #include "iris_vpu_buffer.h" #include "iris_vpu_common.h" =20 +#include "iris_platform_kaanapali.h" #include "iris_platform_qcs8300.h" #include "iris_platform_sm8650.h" #include "iris_platform_sm8750.h" @@ -921,6 +922,95 @@ static const u32 sm8550_enc_op_int_buf_tbl[] =3D { BUF_SCRATCH_2, }; =20 +const struct iris_platform_data kaanapali_data =3D { + .get_instance =3D iris_hfi_gen2_get_instance, + .init_hfi_command_ops =3D iris_hfi_gen2_command_ops_init, + .init_hfi_response_ops =3D iris_hfi_gen2_response_ops_init, + .get_vpu_buffer_size =3D iris_vpu4x_buf_size, + .vpu_ops =3D &iris_vpu4x_ops, + .set_preset_registers =3D iris_set_sm8550_preset_registers, + .icc_tbl =3D sm8550_icc_table, + .icc_tbl_size =3D ARRAY_SIZE(sm8550_icc_table), + .clk_rst_tbl =3D kaanapali_clk_reset_table, + .clk_rst_tbl_size =3D ARRAY_SIZE(kaanapali_clk_reset_table), + .bw_tbl_dec =3D sm8550_bw_table_dec, + .bw_tbl_dec_size =3D ARRAY_SIZE(sm8550_bw_table_dec), + .pmdomain_tbl =3D kaanapali_pmdomain_table, + .pmdomain_tbl_size =3D ARRAY_SIZE(kaanapali_pmdomain_table), + .opp_pd_tbl =3D sm8550_opp_pd_table, + .opp_pd_tbl_size =3D ARRAY_SIZE(sm8550_opp_pd_table), + .clk_tbl =3D kaanapali_clk_table, + .clk_tbl_size =3D ARRAY_SIZE(kaanapali_clk_table), + .opp_clk_tbl =3D kaanapali_opp_clk_table, + /* Upper bound of DMA address range */ + .dma_mask =3D 0xffe00000 - 1, + .fwname =3D "qcom/vpu/vpu40_p2_s7.mbn", + .pas_id =3D IRIS_PAS_ID, + .inst_iris_fmts =3D platform_fmts_sm8550_dec, + .inst_iris_fmts_size =3D ARRAY_SIZE(platform_fmts_sm8550_dec), + .inst_caps =3D &platform_inst_cap_sm8550, + .inst_fw_caps_dec =3D inst_fw_cap_sm8550_dec, + .inst_fw_caps_dec_size =3D ARRAY_SIZE(inst_fw_cap_sm8550_dec), + .inst_fw_caps_enc =3D inst_fw_cap_sm8550_enc, + .inst_fw_caps_enc_size =3D ARRAY_SIZE(inst_fw_cap_sm8550_enc), + .tz_cp_config_data =3D tz_cp_config_kaanapali, + .tz_cp_config_data_size =3D ARRAY_SIZE(tz_cp_config_kaanapali), + .cb_data =3D kaanapali_cb_data, + .cb_data_size =3D ARRAY_SIZE(kaanapali_cb_data), + .core_arch =3D VIDEO_ARCH_LX, + .hw_response_timeout =3D HW_RESPONSE_TIMEOUT_VALUE, + .ubwc_config =3D &ubwc_config_sm8550, + .num_vpp_pipe =3D 2, + .max_session_count =3D 16, + .max_core_mbpf =3D NUM_MBS_8K * 2, + .max_core_mbps =3D ((8192 * 4352) / 256) * 60, + .dec_input_config_params_default =3D + sm8550_vdec_input_config_params_default, + .dec_input_config_params_default_size =3D + ARRAY_SIZE(sm8550_vdec_input_config_params_default), + .dec_input_config_params_hevc =3D + sm8550_vdec_input_config_param_hevc, + .dec_input_config_params_hevc_size =3D + ARRAY_SIZE(sm8550_vdec_input_config_param_hevc), + .dec_input_config_params_vp9 =3D + sm8550_vdec_input_config_param_vp9, + .dec_input_config_params_vp9_size =3D + ARRAY_SIZE(sm8550_vdec_input_config_param_vp9), + .dec_output_config_params =3D + sm8550_vdec_output_config_params, + .dec_output_config_params_size =3D + ARRAY_SIZE(sm8550_vdec_output_config_params), + + .enc_input_config_params =3D + sm8550_venc_input_config_params, + .enc_input_config_params_size =3D + ARRAY_SIZE(sm8550_venc_input_config_params), + .enc_output_config_params =3D + sm8550_venc_output_config_params, + .enc_output_config_params_size =3D + ARRAY_SIZE(sm8550_venc_output_config_params), + + .dec_input_prop =3D sm8550_vdec_subscribe_input_properties, + .dec_input_prop_size =3D ARRAY_SIZE(sm8550_vdec_subscribe_input_propertie= s), + .dec_output_prop_avc =3D sm8550_vdec_subscribe_output_properties_avc, + .dec_output_prop_avc_size =3D + ARRAY_SIZE(sm8550_vdec_subscribe_output_properties_avc), + .dec_output_prop_hevc =3D sm8550_vdec_subscribe_output_properties_hevc, + .dec_output_prop_hevc_size =3D + ARRAY_SIZE(sm8550_vdec_subscribe_output_properties_hevc), + .dec_output_prop_vp9 =3D sm8550_vdec_subscribe_output_properties_vp9, + .dec_output_prop_vp9_size =3D + ARRAY_SIZE(sm8550_vdec_subscribe_output_properties_vp9), + + .dec_ip_int_buf_tbl =3D sm8550_dec_ip_int_buf_tbl, + .dec_ip_int_buf_tbl_size =3D ARRAY_SIZE(sm8550_dec_ip_int_buf_tbl), + .dec_op_int_buf_tbl =3D sm8550_dec_op_int_buf_tbl, + .dec_op_int_buf_tbl_size =3D ARRAY_SIZE(sm8550_dec_op_int_buf_tbl), + + .enc_op_int_buf_tbl =3D sm8550_enc_op_int_buf_tbl, + .enc_op_int_buf_tbl_size =3D ARRAY_SIZE(sm8550_enc_op_int_buf_tbl), +}; + const struct iris_platform_data sm8550_data =3D { .get_instance =3D iris_hfi_gen2_get_instance, .init_hfi_command_ops =3D iris_hfi_gen2_command_ops_init, diff --git a/drivers/media/platform/qcom/iris/iris_platform_kaanapali.h b/d= rivers/media/platform/qcom/iris/iris_platform_kaanapali.h new file mode 100644 index 0000000000000000000000000000000000000000..d472e21fdac4c764169a3a8c35d= 175db29b06b5b --- /dev/null +++ b/drivers/media/platform/qcom/iris/iris_platform_kaanapali.h @@ -0,0 +1,80 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef __IRIS_PLATFORM_KAANAPALI_H__ +#define __IRIS_PLATFORM_KAANAPALI_H__ + +#define VIDEO_REGION_VM0_SECURE_NP_ID 1 +#define VIDEO_REGION_VM0_NONSECURE_NP_ID 5 + +static const char *const kaanapali_clk_reset_table[] =3D { + "bus0", + "bus1", + "core", + "vcodec0_core", +}; + +static const char *const kaanapali_pmdomain_table[] =3D { + "venus", + "vcodec0", + "vpp0", + "vpp1", + "apv", +}; + +static const struct platform_clk_data kaanapali_clk_table[] =3D { + { IRIS_AXI_CLK, "iface" }, + { IRIS_CTRL_CLK, "core" }, + { IRIS_HW_CLK, "vcodec0_core" }, + { IRIS_AXI1_CLK, "iface1" }, + { IRIS_CTRL_FREERUN_CLK, "core_freerun" }, + { IRIS_HW_FREERUN_CLK, "vcodec0_core_freerun" }, + { IRIS_BSE_HW_CLK, "vcodec_bse" }, + { IRIS_VPP0_HW_CLK, "vcodec_vpp0" }, + { IRIS_VPP1_HW_CLK, "vcodec_vpp1" }, + { IRIS_APV_HW_CLK, "vcodec_apv" }, +}; + +static const char *const kaanapali_opp_clk_table[] =3D { + "vcodec0_core", + "vcodec_apv", + "vcodec_bse", + "core", + NULL, +}; + +static struct tz_cp_config tz_cp_config_kaanapali[] =3D { + { + .cp_start =3D VIDEO_REGION_VM0_SECURE_NP_ID, + .cp_size =3D 0, + .cp_nonpixel_start =3D 0x01000000, + .cp_nonpixel_size =3D 0x24800000, + }, + { + .cp_start =3D VIDEO_REGION_VM0_NONSECURE_NP_ID, + .cp_size =3D 0, + .cp_nonpixel_start =3D 0x25800000, + .cp_nonpixel_size =3D 0xda400000, + }, +}; + +static struct iris_context_bank kaanapali_cb_data[] =3D { + { + .dev =3D NULL, + .name =3D "iris_cb_non_pixel", + .f_id =3D IRIS_CB_NON_SECURE_NON_PIXEL, + .region =3D IRIS_NON_SECURE_NON_PIXEL | IRIS_NON_SECURE_BITSTREAM, + .dma_mask =3D 0xffe00000 - 1, + }, + { + .dev =3D NULL, + .name =3D "iris_cb_pixel", + .f_id =3D IRIS_CB_NON_SECURE_PIXEL, + .region =3D IRIS_NON_SECURE_PIXEL, + .dma_mask =3D 0xffe00000 - 1, + }, +}; + +#endif /* __IRIS_PLATFORM_KAANAPALI_H__ */ diff --git a/drivers/media/platform/qcom/iris/iris_probe.c b/drivers/media/= platform/qcom/iris/iris_probe.c index c1a6aac5a3d65d980c5a34ba5fa1c1dbcf790ec5..9cc55f5e7be1701a14eedd06453= ddb0b59844ffa 100644 --- a/drivers/media/platform/qcom/iris/iris_probe.c +++ b/drivers/media/platform/qcom/iris/iris_probe.c @@ -395,6 +395,10 @@ static const struct dev_pm_ops iris_pm_ops =3D { }; =20 static const struct of_device_id iris_dt_match[] =3D { + { + .compatible =3D "qcom,kaanapali-iris", + .data =3D &kaanapali_data, + }, { .compatible =3D "qcom,qcs8300-iris", .data =3D &qcs8300_data, --=20 2.34.1