From nobody Sun Feb 8 15:25:50 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1DA0722F74A; Mon, 26 Jan 2026 06:02:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769407329; cv=none; b=WVNyJWT/iuUTOFUfmhCReDoMDgBOgAsXfHJ8ZqIOCGh5sjG8LVnhfsHwW7+5v7x14PhPxp3696Sov9mMWzoJyR413n6vyNc3HIsEWX+FF5lNZ90ljWTTwxg3vk7fz2yPKNAdseNXZh9woar73GTqowYXt3Xoio3Mj3jyfrg7Bfc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769407329; c=relaxed/simple; bh=BrhkKB6HmcoErJBgY91N9xBBRXQmOjBv4hptw7osCQA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=QQt/0g0Ww1332nj0JwMkeazjR9Wctci/XXZW59DY/WRhpAdxo+JCyyNwf94w9phaHCwHbcUzeqXvBD79OzUYgSOqtynCU2LN9L6kqHSlUfSYVUg3PnccENa7ppWwyNFbVIaDivaXYlInEVfb83PSWAM+BKwwjLQ0BltEiW/R/Vc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=XjGHUeOA; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="XjGHUeOA" Received: by smtp.kernel.org (Postfix) with ESMTPS id AB2F6C19425; Mon, 26 Jan 2026 06:02:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1769407328; bh=BrhkKB6HmcoErJBgY91N9xBBRXQmOjBv4hptw7osCQA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=XjGHUeOAuJBndy5IA2twsmAdEhN6c8RZhnyAtidCEEatGKrhIMuv4NSO4ANlNGSEi OFTtPcS14hy7XfXBKhp5iTq2ezBPIZDkL3nHPPzo/Vtkp9Si/h4I33ITYVYkbKXXbm sxVU0IhBUzzHm27jjXaijzGxM7QphqDgifvGehicgcD4MJKZkUHwUKZzWKkuA62SMw A+q2sqOUXJ9rFxAyJ7M/+rEB+iSPT+UtQ3zf/XbI+CZe9lAlwvsDs0m5S1V0llQg/N JTBMEDpn/F3nJr9+WEBazuzZmFLauN7o2PiSl1HIaZ5VuTYusbROYD5ZnlDmVogyh/ 9SXg+xIU6tJtg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9CA66C88E4A; Mon, 26 Jan 2026 06:02:08 +0000 (UTC) From: Jiebing Chen via B4 Relay Date: Mon, 26 Jan 2026 06:01:42 +0000 Subject: [PATCH v6 1/5] dt-bindings: clock: meson: Add audio power domain for S4 soc Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260126-audio_drvier-v6-1-99e350855bc2@amlogic.com> References: <20260126-audio_drvier-v6-0-99e350855bc2@amlogic.com> In-Reply-To: <20260126-audio_drvier-v6-0-99e350855bc2@amlogic.com> To: Jerome Brunet , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jaroslav Kysela , Takashi Iwai , Neil Armstrong , Kevin Hilman , Martin Blumenstingl , Michael Turquette , Stephen Boyd Cc: linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, jian.xu@amlogic.com, shuai.li@amlogic.com, zhe.wang@amlogic.com, jiebing chen X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1769407326; l=1646; i=jiebing.chen@amlogic.com; s=20250110; h=from:subject:message-id; bh=6xMGlQVRnvNr+HsMV5CJO4QIQGLb0IjOxYc1JtOCi88=; b=w8tEvILb0hHB/6DvWewpbF1lzzl0s7YS496kAxyxmfxGSiLWpA8TEOwgYiX+oaT3sHOyHQEfo ziTCp0wYllVCkqezBVVqun/ZpuK7kJv535HAsHQpnC7jEPf/SH22Uc+ X-Developer-Key: i=jiebing.chen@amlogic.com; a=ed25519; pk=6rFvvF45A84pLNRy03hfUHeROxHCnZ+1KAGw/DoqKic= X-Endpoint-Received: by B4 Relay for jiebing.chen@amlogic.com/20250110 with auth_id=316 X-Original-From: Jiebing Chen Reply-To: jiebing.chen@amlogic.com From: Jiebing Chen The audio power domain has been found on S4 device. It must be enabled prior to audio operations. Signed-off-by: Jiebing Chen --- .../bindings/clock/amlogic,axg-audio-clkc.yaml | 18 ++++++++++++++= ++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc= .yaml b/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.yaml index fd7982dd4cea..1cd9a99e5ff3 100644 --- a/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.yaml +++ b/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.yaml @@ -20,6 +20,7 @@ properties: enum: - amlogic,axg-audio-clkc - amlogic,g12a-audio-clkc + - amlogic,s4-audio-clkc - amlogic,sm1-audio-clkc =20 '#clock-cells': @@ -99,7 +100,8 @@ properties: =20 resets: description: internal reset line - + power-domains: + maxItems: 1 required: - compatible - '#clock-cells' @@ -115,6 +117,7 @@ allOf: contains: enum: - amlogic,g12a-audio-clkc + - amlogic,s4-audio-clkc - amlogic,sm1-audio-clkc then: required: @@ -122,7 +125,18 @@ allOf: else: properties: '#reset-cells': false - + - if: + properties: + compatible: + contains: + enum: + - amlogic,s4-audio-clkc + then: + required: + - power-domains + else: + properties: + power-domains: false additionalProperties: false =20 examples: --=20 2.52.0 From nobody Sun Feb 8 15:25:50 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1D8B922E406; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260126-audio_drvier-v6-2-99e350855bc2@amlogic.com> References: <20260126-audio_drvier-v6-0-99e350855bc2@amlogic.com> In-Reply-To: <20260126-audio_drvier-v6-0-99e350855bc2@amlogic.com> To: Jerome Brunet , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jaroslav Kysela , Takashi Iwai , Neil Armstrong , Kevin Hilman , Martin Blumenstingl , Michael Turquette , Stephen Boyd Cc: linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, jian.xu@amlogic.com, shuai.li@amlogic.com, zhe.wang@amlogic.com, jiebing chen X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1769407326; l=804; i=jiebing.chen@amlogic.com; s=20250110; h=from:subject:message-id; bh=6X1OSzRQHl389xrmv+iMGiIJqB/VbuISTBq7YBeGWCI=; b=m56U7HCt3M+4P+Y4dUx5wcdFcKrpEn4aqCpLtgvJ1trxe9jKFWPOOwHZdBb+9Lf6P3ClibiDB NFo35KoQ4oDAqMI5WhI4qAIKDRyOyZqcZvhWLON8aRCHYpaUSqYc6eD X-Developer-Key: i=jiebing.chen@amlogic.com; a=ed25519; pk=6rFvvF45A84pLNRy03hfUHeROxHCnZ+1KAGw/DoqKic= X-Endpoint-Received: by B4 Relay for jiebing.chen@amlogic.com/20250110 with auth_id=316 X-Original-From: Jiebing Chen Reply-To: jiebing.chen@amlogic.com From: Jiebing Chen Add S4 SoC tocodec compatibility support. Signed-off-by: Jiebing Chen Acked-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/sound/amlogic,g12a-toacodec.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/sound/amlogic,g12a-toacodec.= yaml b/Documentation/devicetree/bindings/sound/amlogic,g12a-toacodec.yaml index 23f82bb89750..7e053aaa0f59 100644 --- a/Documentation/devicetree/bindings/sound/amlogic,g12a-toacodec.yaml +++ b/Documentation/devicetree/bindings/sound/amlogic,g12a-toacodec.yaml @@ -25,6 +25,7 @@ properties: - const: amlogic,g12a-toacodec - items: - enum: + - amlogic,s4-toacodec - amlogic,sm1-toacodec - const: amlogic,g12a-toacodec =20 --=20 2.52.0 From nobody Sun Feb 8 15:25:50 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E632238171; Mon, 26 Jan 2026 06:02:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769407329; cv=none; b=mMcmo5RQaPkipHktTKxwpe/2NIp6T8c8ZjLPwXpGS4wKb4/eXleZaFxRL1UIzzVACjOeidS95Cld+3XKdPpTIlewqwi4vsRbATY0JcIa4i6Tt5bWwRQELyhbV+M9ucv89PZV3kUuQxOSD/Ij6Tzm2kdbOeyBzMs5DK+245LXnZM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769407329; c=relaxed/simple; bh=W2sMfoYB0cv3opAU6LY6NxfaodLpNuCuA6v8AZ390J0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=RxVZjY9OKnsuemK7qi5HQrEtoe8KL0wi+o0uWC6ca0ieGsIi4/HraZW3a29KgErW27g0QaagJvFkuUlob9FujXBvS5ygnP+ZPdiwSyYfXyuZH9YA0MJ1itQW365WoQCUhBfU5ZBwaRwGLIKYo4d+2IDl6lAPTqiq/N2nVa6PQqA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=srChx7Ib; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="srChx7Ib" Received: by smtp.kernel.org (Postfix) with ESMTPS id DFF2CC2BCB2; Mon, 26 Jan 2026 06:02:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1769407329; bh=W2sMfoYB0cv3opAU6LY6NxfaodLpNuCuA6v8AZ390J0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=srChx7Ibbh3nSrj0Hk0bPCnwQT/yaiw2fCbXiA4gMF9x+Qlg2TmMvVrKL6TxXO+zY oUeKeAUg2nOcJ9mO5LpN/yG+7PdrTwfa2ga3g/sGI7T7yEVvSKsnMAbjGxQ7aY9teD uqAntupK7wY4x1/EO/bwPU82+jtWq1LlwQYaX+mwS8VyVVUCd8Xb52rbt06hmxQ++F XQ7DZZ8+Oy5COWN/4ZhBy9cg3qc60k3Jp3OeOXMp1UiimD9yIfKMS7kqj5k5Q6xiPU wiTnQ92P47pOGCuQGuDZ10ntEoV2dpYhbgnujI5TZWOwOamo3bliEre3sYeCm85/SR uLgQHCJcPwzeA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id D5899C88E42; Mon, 26 Jan 2026 06:02:08 +0000 (UTC) From: Jiebing Chen via B4 Relay Date: Mon, 26 Jan 2026 06:01:44 +0000 Subject: [PATCH v6 3/5] ASoC: meson: g12a-toacodec: Add S4 tocodec driver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260126-audio_drvier-v6-3-99e350855bc2@amlogic.com> References: <20260126-audio_drvier-v6-0-99e350855bc2@amlogic.com> In-Reply-To: <20260126-audio_drvier-v6-0-99e350855bc2@amlogic.com> To: Jerome Brunet , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jaroslav Kysela , Takashi Iwai , Neil Armstrong , Kevin Hilman , Martin Blumenstingl , Michael Turquette , Stephen Boyd Cc: linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, jian.xu@amlogic.com, shuai.li@amlogic.com, zhe.wang@amlogic.com, jiebing chen X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1769407326; l=3394; i=jiebing.chen@amlogic.com; s=20250110; h=from:subject:message-id; bh=fK4/vGW475a55eAlmHfX9R+Xlh0VKjf26MRZxqH0K8o=; b=X2wYzsr0AapLWCUnVhTuFUxlemajlmQX++FzS3QhDO8yQXOK7lzcZUfAwidrQgznXcQCpqNTl 5CrCBhtOM6ADv27v1H/hOYOmp6aRQH+Co3tllL0ZbpgsME9PdF0fT9U X-Developer-Key: i=jiebing.chen@amlogic.com; a=ed25519; pk=6rFvvF45A84pLNRy03hfUHeROxHCnZ+1KAGw/DoqKic= X-Endpoint-Received: by B4 Relay for jiebing.chen@amlogic.com/20250110 with auth_id=316 X-Original-From: Jiebing Chen Reply-To: jiebing.chen@amlogic.com From: Jiebing Chen The S4 requires additional clock control bits to be turn on while enabled. The S4 has 8 TDM lanes, instead of 4 on previous SoC. Update the widget accordingly. Signed-off-by: Jiebing Chen --- sound/soc/meson/g12a-toacodec.c | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/sound/soc/meson/g12a-toacodec.c b/sound/soc/meson/g12a-toacode= c.c index a95375b53f0a..a7f9ac2d08f7 100644 --- a/sound/soc/meson/g12a-toacodec.c +++ b/sound/soc/meson/g12a-toacodec.c @@ -41,6 +41,9 @@ #define CTRL0_BCLK_SEL_LSB 4 #define CTRL0_MCLK_SEL GENMASK(2, 0) =20 +#define CTRL0_BCLK_ENABLE_SHIFT 30 +#define CTRL0_MCLK_ENABLE_SHIFT 29 + #define TOACODEC_OUT_CHMAX 2 =20 struct g12a_toacodec { @@ -141,6 +144,13 @@ static const struct snd_soc_dapm_widget sm1_toacodec_w= idgets[] =3D { &g12a_toacodec_out_enable), }; =20 +static const struct snd_soc_dapm_widget s4_toacodec_widgets[] =3D { + SND_SOC_DAPM_MUX("SRC", TOACODEC_CTRL0, CTRL0_BCLK_ENABLE_SHIFT, 0, + &sm1_toacodec_mux), + SND_SOC_DAPM_SWITCH("OUT EN", TOACODEC_CTRL0, CTRL0_MCLK_ENABLE_SHIFT, 0, + &g12a_toacodec_out_enable), +}; + static int g12a_toacodec_input_hw_params(struct snd_pcm_substream *substre= am, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) @@ -234,6 +244,10 @@ static const struct snd_kcontrol_new sm1_toacodec_cont= rols[] =3D { SOC_SINGLE("Lane Select", TOACODEC_CTRL0, CTRL0_LANE_SEL_SM1, 3, 0), }; =20 +static const struct snd_kcontrol_new s4_toacodec_controls[] =3D { + SOC_SINGLE("Lane Select", TOACODEC_CTRL0, CTRL0_LANE_SEL_SM1, 7, 0), +}; + static const struct snd_soc_component_driver g12a_toacodec_component_drv = =3D { .probe =3D g12a_toacodec_component_probe, .controls =3D g12a_toacodec_controls, @@ -256,6 +270,17 @@ static const struct snd_soc_component_driver sm1_toaco= dec_component_drv =3D { .endianness =3D 1, }; =20 +static const struct snd_soc_component_driver s4_toacodec_component_drv =3D= { + .probe =3D sm1_toacodec_component_probe, + .controls =3D s4_toacodec_controls, + .num_controls =3D ARRAY_SIZE(s4_toacodec_controls), + .dapm_widgets =3D s4_toacodec_widgets, + .num_dapm_widgets =3D ARRAY_SIZE(s4_toacodec_widgets), + .dapm_routes =3D g12a_toacodec_routes, + .num_dapm_routes =3D ARRAY_SIZE(g12a_toacodec_routes), + .endianness =3D 1, +}; + static const struct regmap_config g12a_toacodec_regmap_cfg =3D { .reg_bits =3D 32, .val_bits =3D 32, @@ -276,6 +301,13 @@ static const struct g12a_toacodec_match_data sm1_toaco= dec_match_data =3D { .field_bclk_sel =3D REG_FIELD(TOACODEC_CTRL0, 4, 6), }; =20 +static const struct g12a_toacodec_match_data s4_toacodec_match_data =3D { + .component_drv =3D &s4_toacodec_component_drv, + .field_dat_sel =3D REG_FIELD(TOACODEC_CTRL0, 19, 20), + .field_lrclk_sel =3D REG_FIELD(TOACODEC_CTRL0, 12, 14), + .field_bclk_sel =3D REG_FIELD(TOACODEC_CTRL0, 4, 6), +}; + static const struct of_device_id g12a_toacodec_of_match[] =3D { { .compatible =3D "amlogic,g12a-toacodec", @@ -285,6 +317,10 @@ static const struct of_device_id g12a_toacodec_of_matc= h[] =3D { .compatible =3D "amlogic,sm1-toacodec", .data =3D &sm1_toacodec_match_data, }, + { + .compatible =3D "amlogic,s4-toacodec", + .data =3D &s4_toacodec_match_data, + }, {} }; MODULE_DEVICE_TABLE(of, g12a_toacodec_of_match); --=20 2.52.0 From nobody Sun Feb 8 15:25:50 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 46DBD23D7D8; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="tj2XQMmd" Received: by smtp.kernel.org (Postfix) with ESMTPS id F0E76C2BCAF; Mon, 26 Jan 2026 06:02:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1769407329; bh=6MtBAdybK+8cyXTFi9GhayfpSH5N+wcUKSicM9HCaJ8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=tj2XQMmdw97pz8sC6Sr79E1EI8Q3884pBLNbfyKt5DXz4Xs7TZ1Ftcjy49LNZ9M8m j2HSPNfrCCtvgv45i3ZCmd5kYlhVlpPyCiu8YiE6SH8mbacyCJsD9bwgWGyo7vFRt8 OLMc+XrGacIJmBWogCcwrMTrnMbRivNRz/7Ty7swB6YBB5GZdJ0E15yfdt6neOyQrC b4nEf2622WcTKkCEvpjhEThOD0TmmOVlGtijxax2tJhGvPm650whM8/zDNsemHlnPt VttkaEZQt/woVQg+/b5rly5K6SoVwyNMrwExe10a7RoRl4gqac3uNq4KjqpNp6MwjV z13vTnWErS5Vg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id E7B31C88E48; Mon, 26 Jan 2026 06:02:08 +0000 (UTC) From: Jiebing Chen via B4 Relay Date: Mon, 26 Jan 2026 06:01:45 +0000 Subject: [PATCH v6 4/5] clk: meson: axg_audio: add S4 support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260126-audio_drvier-v6-4-99e350855bc2@amlogic.com> References: <20260126-audio_drvier-v6-0-99e350855bc2@amlogic.com> In-Reply-To: <20260126-audio_drvier-v6-0-99e350855bc2@amlogic.com> To: Jerome Brunet , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jaroslav Kysela , Takashi Iwai , Neil Armstrong , Kevin Hilman , Martin Blumenstingl , Michael Turquette , Stephen Boyd Cc: linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, jian.xu@amlogic.com, shuai.li@amlogic.com, zhe.wang@amlogic.com, jiebing chen X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1769407326; l=9384; i=jiebing.chen@amlogic.com; s=20250110; h=from:subject:message-id; bh=mSlr+PYl6Kv5xTlb1MKaLQhx8bgwIvHXfLMJnftHOWU=; b=IQRlwbGMXYegPoWxYzkiXv67EwV1WbD7zJf8asDBo2X4ZGAmiWyDjVKSrsP+JN8TCJOxcAJ6h bVZeYe1N9SeAauB+1gaEsNiFSL2oki44eLUgHpomvMFLR5crQia07oj X-Developer-Key: i=jiebing.chen@amlogic.com; a=ed25519; pk=6rFvvF45A84pLNRy03hfUHeROxHCnZ+1KAGw/DoqKic= X-Endpoint-Received: by B4 Relay for jiebing.chen@amlogic.com/20250110 with auth_id=316 X-Original-From: Jiebing Chen Reply-To: jiebing.chen@amlogic.com From: Jiebing Chen Add S4 support the axg audio clock controllers, Compared with the previous version, the selection of the audio's clock and data pad will be designed in the form of pinmux control. The purpose of doing this is to distinguish between clock control and pin control selection. Signed-off-by: Jiebing Chen --- drivers/clk/meson/axg-audio.c | 165 ++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 165 insertions(+) diff --git a/drivers/clk/meson/axg-audio.c b/drivers/clk/meson/axg-audio.c index fd7eca652261..ab8c05b0509e 100644 --- a/drivers/clk/meson/axg-audio.c +++ b/drivers/clk/meson/axg-audio.c @@ -1150,6 +1150,159 @@ static struct clk_hw *g12a_audio_hw_clks[] =3D { [AUD_CLKID_TOP] =3D &axg_aud_top, }; =20 +/* + * Array of all S4 clocks provided by this provider + * The input clocks of the controller will be populated at runtime + */ +static struct clk_hw *s4_audio_hw_clks[] =3D { + [AUD_CLKID_DDR_ARB] =3D &ddr_arb.hw, + [AUD_CLKID_PDM] =3D &pdm.hw, + [AUD_CLKID_TDMIN_A] =3D &tdmin_a.hw, + [AUD_CLKID_TDMIN_B] =3D &tdmin_b.hw, + [AUD_CLKID_TDMIN_C] =3D &tdmin_c.hw, + [AUD_CLKID_TDMIN_LB] =3D &tdmin_lb.hw, + [AUD_CLKID_TDMOUT_A] =3D &tdmout_a.hw, + [AUD_CLKID_TDMOUT_B] =3D &tdmout_b.hw, + [AUD_CLKID_TDMOUT_C] =3D &tdmout_c.hw, + [AUD_CLKID_FRDDR_A] =3D &frddr_a.hw, + [AUD_CLKID_FRDDR_B] =3D &frddr_b.hw, + [AUD_CLKID_FRDDR_C] =3D &frddr_c.hw, + [AUD_CLKID_TODDR_A] =3D &toddr_a.hw, + [AUD_CLKID_TODDR_B] =3D &toddr_b.hw, + [AUD_CLKID_TODDR_C] =3D &toddr_c.hw, + [AUD_CLKID_LOOPBACK] =3D &loopback.hw, + [AUD_CLKID_SPDIFIN] =3D &spdifin.hw, + [AUD_CLKID_SPDIFOUT] =3D &spdifout.hw, + [AUD_CLKID_RESAMPLE] =3D &resample.hw, + [AUD_CLKID_SPDIFOUT_B] =3D &spdifout_b.hw, + [AUD_CLKID_MST_A_MCLK_SEL] =3D &sm1_mst_a_mclk_sel.hw, + [AUD_CLKID_MST_B_MCLK_SEL] =3D &sm1_mst_b_mclk_sel.hw, + [AUD_CLKID_MST_C_MCLK_SEL] =3D &sm1_mst_c_mclk_sel.hw, + [AUD_CLKID_MST_D_MCLK_SEL] =3D &sm1_mst_d_mclk_sel.hw, + [AUD_CLKID_MST_E_MCLK_SEL] =3D &sm1_mst_e_mclk_sel.hw, + [AUD_CLKID_MST_F_MCLK_SEL] =3D &sm1_mst_f_mclk_sel.hw, + [AUD_CLKID_MST_A_MCLK_DIV] =3D &sm1_mst_a_mclk_div.hw, + [AUD_CLKID_MST_B_MCLK_DIV] =3D &sm1_mst_b_mclk_div.hw, + [AUD_CLKID_MST_C_MCLK_DIV] =3D &sm1_mst_c_mclk_div.hw, + [AUD_CLKID_MST_D_MCLK_DIV] =3D &sm1_mst_d_mclk_div.hw, + [AUD_CLKID_MST_E_MCLK_DIV] =3D &sm1_mst_e_mclk_div.hw, + [AUD_CLKID_MST_F_MCLK_DIV] =3D &sm1_mst_f_mclk_div.hw, + [AUD_CLKID_MST_A_MCLK] =3D &sm1_mst_a_mclk.hw, + [AUD_CLKID_MST_B_MCLK] =3D &sm1_mst_b_mclk.hw, + [AUD_CLKID_MST_C_MCLK] =3D &sm1_mst_c_mclk.hw, + [AUD_CLKID_MST_D_MCLK] =3D &sm1_mst_d_mclk.hw, + [AUD_CLKID_MST_E_MCLK] =3D &sm1_mst_e_mclk.hw, + [AUD_CLKID_MST_F_MCLK] =3D &sm1_mst_f_mclk.hw, + [AUD_CLKID_SPDIFOUT_CLK_SEL] =3D &spdifout_clk_sel.hw, + [AUD_CLKID_SPDIFOUT_CLK_DIV] =3D &spdifout_clk_div.hw, + [AUD_CLKID_SPDIFOUT_CLK] =3D &spdifout_clk.hw, + [AUD_CLKID_SPDIFOUT_B_CLK_SEL] =3D &spdifout_b_clk_sel.hw, + [AUD_CLKID_SPDIFOUT_B_CLK_DIV] =3D &spdifout_b_clk_div.hw, + [AUD_CLKID_SPDIFOUT_B_CLK] =3D &spdifout_b_clk.hw, + [AUD_CLKID_SPDIFIN_CLK_SEL] =3D &spdifin_clk_sel.hw, + [AUD_CLKID_SPDIFIN_CLK_DIV] =3D &spdifin_clk_div.hw, + [AUD_CLKID_SPDIFIN_CLK] =3D &spdifin_clk.hw, + [AUD_CLKID_PDM_DCLK_SEL] =3D &pdm_dclk_sel.hw, + [AUD_CLKID_PDM_DCLK_DIV] =3D &pdm_dclk_div.hw, + [AUD_CLKID_PDM_DCLK] =3D &pdm_dclk.hw, + [AUD_CLKID_PDM_SYSCLK_SEL] =3D &pdm_sysclk_sel.hw, + [AUD_CLKID_PDM_SYSCLK_DIV] =3D &pdm_sysclk_div.hw, + [AUD_CLKID_PDM_SYSCLK] =3D &pdm_sysclk.hw, + [AUD_CLKID_MST_A_SCLK_PRE_EN] =3D &mst_a_sclk_pre_en.hw, + [AUD_CLKID_MST_B_SCLK_PRE_EN] =3D &mst_b_sclk_pre_en.hw, + [AUD_CLKID_MST_C_SCLK_PRE_EN] =3D &mst_c_sclk_pre_en.hw, + [AUD_CLKID_MST_D_SCLK_PRE_EN] =3D &mst_d_sclk_pre_en.hw, + [AUD_CLKID_MST_E_SCLK_PRE_EN] =3D &mst_e_sclk_pre_en.hw, + [AUD_CLKID_MST_F_SCLK_PRE_EN] =3D &mst_f_sclk_pre_en.hw, + [AUD_CLKID_MST_A_SCLK_DIV] =3D &mst_a_sclk_div.hw, + [AUD_CLKID_MST_B_SCLK_DIV] =3D &mst_b_sclk_div.hw, + [AUD_CLKID_MST_C_SCLK_DIV] =3D &mst_c_sclk_div.hw, + [AUD_CLKID_MST_D_SCLK_DIV] =3D &mst_d_sclk_div.hw, + [AUD_CLKID_MST_E_SCLK_DIV] =3D &mst_e_sclk_div.hw, + [AUD_CLKID_MST_F_SCLK_DIV] =3D &mst_f_sclk_div.hw, + [AUD_CLKID_MST_A_SCLK_POST_EN] =3D &mst_a_sclk_post_en.hw, + [AUD_CLKID_MST_B_SCLK_POST_EN] =3D &mst_b_sclk_post_en.hw, + [AUD_CLKID_MST_C_SCLK_POST_EN] =3D &mst_c_sclk_post_en.hw, + [AUD_CLKID_MST_D_SCLK_POST_EN] =3D &mst_d_sclk_post_en.hw, + [AUD_CLKID_MST_E_SCLK_POST_EN] =3D &mst_e_sclk_post_en.hw, + [AUD_CLKID_MST_F_SCLK_POST_EN] =3D &mst_f_sclk_post_en.hw, + [AUD_CLKID_MST_A_SCLK] =3D &mst_a_sclk.hw, + [AUD_CLKID_MST_B_SCLK] =3D &mst_b_sclk.hw, + [AUD_CLKID_MST_C_SCLK] =3D &mst_c_sclk.hw, + [AUD_CLKID_MST_D_SCLK] =3D &mst_d_sclk.hw, + [AUD_CLKID_MST_E_SCLK] =3D &mst_e_sclk.hw, + [AUD_CLKID_MST_F_SCLK] =3D &mst_f_sclk.hw, + [AUD_CLKID_MST_A_LRCLK_DIV] =3D &mst_a_lrclk_div.hw, + [AUD_CLKID_MST_B_LRCLK_DIV] =3D &mst_b_lrclk_div.hw, + [AUD_CLKID_MST_C_LRCLK_DIV] =3D &mst_c_lrclk_div.hw, + [AUD_CLKID_MST_D_LRCLK_DIV] =3D &mst_d_lrclk_div.hw, + [AUD_CLKID_MST_E_LRCLK_DIV] =3D &mst_e_lrclk_div.hw, + [AUD_CLKID_MST_F_LRCLK_DIV] =3D &mst_f_lrclk_div.hw, + [AUD_CLKID_MST_A_LRCLK] =3D &mst_a_lrclk.hw, + [AUD_CLKID_MST_B_LRCLK] =3D &mst_b_lrclk.hw, + [AUD_CLKID_MST_C_LRCLK] =3D &mst_c_lrclk.hw, + [AUD_CLKID_MST_D_LRCLK] =3D &mst_d_lrclk.hw, + [AUD_CLKID_MST_E_LRCLK] =3D &mst_e_lrclk.hw, + [AUD_CLKID_MST_F_LRCLK] =3D &mst_f_lrclk.hw, + [AUD_CLKID_TDMIN_A_SCLK_SEL] =3D &tdmin_a_sclk_sel.hw, + [AUD_CLKID_TDMIN_B_SCLK_SEL] =3D &tdmin_b_sclk_sel.hw, + [AUD_CLKID_TDMIN_C_SCLK_SEL] =3D &tdmin_c_sclk_sel.hw, + [AUD_CLKID_TDMIN_LB_SCLK_SEL] =3D &tdmin_lb_sclk_sel.hw, + [AUD_CLKID_TDMOUT_A_SCLK_SEL] =3D &tdmout_a_sclk_sel.hw, + [AUD_CLKID_TDMOUT_B_SCLK_SEL] =3D &tdmout_b_sclk_sel.hw, + [AUD_CLKID_TDMOUT_C_SCLK_SEL] =3D &tdmout_c_sclk_sel.hw, + [AUD_CLKID_TDMIN_A_SCLK_PRE_EN] =3D &tdmin_a_sclk_pre_en.hw, + [AUD_CLKID_TDMIN_B_SCLK_PRE_EN] =3D &tdmin_b_sclk_pre_en.hw, + [AUD_CLKID_TDMIN_C_SCLK_PRE_EN] =3D &tdmin_c_sclk_pre_en.hw, + [AUD_CLKID_TDMIN_LB_SCLK_PRE_EN] =3D &tdmin_lb_sclk_pre_en.hw, + [AUD_CLKID_TDMOUT_A_SCLK_PRE_EN] =3D &tdmout_a_sclk_pre_en.hw, + [AUD_CLKID_TDMOUT_B_SCLK_PRE_EN] =3D &tdmout_b_sclk_pre_en.hw, + [AUD_CLKID_TDMOUT_C_SCLK_PRE_EN] =3D &tdmout_c_sclk_pre_en.hw, + [AUD_CLKID_TDMIN_A_SCLK_POST_EN] =3D &tdmin_a_sclk_post_en.hw, + [AUD_CLKID_TDMIN_B_SCLK_POST_EN] =3D &tdmin_b_sclk_post_en.hw, + [AUD_CLKID_TDMIN_C_SCLK_POST_EN] =3D &tdmin_c_sclk_post_en.hw, + [AUD_CLKID_TDMIN_LB_SCLK_POST_EN] =3D &tdmin_lb_sclk_post_en.hw, + [AUD_CLKID_TDMOUT_A_SCLK_POST_EN] =3D &tdmout_a_sclk_post_en.hw, + [AUD_CLKID_TDMOUT_B_SCLK_POST_EN] =3D &tdmout_b_sclk_post_en.hw, + [AUD_CLKID_TDMOUT_C_SCLK_POST_EN] =3D &tdmout_c_sclk_post_en.hw, + [AUD_CLKID_TDMIN_A_SCLK] =3D &tdmin_a_sclk.hw, + [AUD_CLKID_TDMIN_B_SCLK] =3D &tdmin_b_sclk.hw, + [AUD_CLKID_TDMIN_C_SCLK] =3D &tdmin_c_sclk.hw, + [AUD_CLKID_TDMIN_LB_SCLK] =3D &tdmin_lb_sclk.hw, + [AUD_CLKID_TDMOUT_A_SCLK] =3D &g12a_tdmout_a_sclk.hw, + [AUD_CLKID_TDMOUT_B_SCLK] =3D &g12a_tdmout_b_sclk.hw, + [AUD_CLKID_TDMOUT_C_SCLK] =3D &g12a_tdmout_c_sclk.hw, + [AUD_CLKID_TDMIN_A_LRCLK] =3D &tdmin_a_lrclk.hw, + [AUD_CLKID_TDMIN_B_LRCLK] =3D &tdmin_b_lrclk.hw, + [AUD_CLKID_TDMIN_C_LRCLK] =3D &tdmin_c_lrclk.hw, + [AUD_CLKID_TDMIN_LB_LRCLK] =3D &tdmin_lb_lrclk.hw, + [AUD_CLKID_TDMOUT_A_LRCLK] =3D &tdmout_a_lrclk.hw, + [AUD_CLKID_TDMOUT_B_LRCLK] =3D &tdmout_b_lrclk.hw, + [AUD_CLKID_TDMOUT_C_LRCLK] =3D &tdmout_c_lrclk.hw, + [AUD_CLKID_TOP] =3D &sm1_aud_top.hw, + [AUD_CLKID_TORAM] =3D &toram.hw, + [AUD_CLKID_EQDRC] =3D &eqdrc.hw, + [AUD_CLKID_RESAMPLE_B] =3D &resample_b.hw, + [AUD_CLKID_TOVAD] =3D &tovad.hw, + [AUD_CLKID_LOCKER] =3D &locker.hw, + [AUD_CLKID_SPDIFIN_LB] =3D &spdifin_lb.hw, + [AUD_CLKID_FRDDR_D] =3D &frddr_d.hw, + [AUD_CLKID_TODDR_D] =3D &toddr_d.hw, + [AUD_CLKID_LOOPBACK_B] =3D &loopback_b.hw, + [AUD_CLKID_CLK81_EN] =3D &sm1_clk81_en.hw, + [AUD_CLKID_SYSCLK_A_DIV] =3D &sm1_sysclk_a_div.hw, + [AUD_CLKID_SYSCLK_A_EN] =3D &sm1_sysclk_a_en.hw, + [AUD_CLKID_SYSCLK_B_DIV] =3D &sm1_sysclk_b_div.hw, + [AUD_CLKID_SYSCLK_B_EN] =3D &sm1_sysclk_b_en.hw, + [AUD_CLKID_EARCRX] =3D &earcrx.hw, + [AUD_CLKID_EARCRX_CMDC_SEL] =3D &sm1_earcrx_cmdc_clk_sel.hw, + [AUD_CLKID_EARCRX_CMDC_DIV] =3D &sm1_earcrx_cmdc_clk_div.hw, + [AUD_CLKID_EARCRX_CMDC] =3D &sm1_earcrx_cmdc_clk.hw, + [AUD_CLKID_EARCRX_DMAC_SEL] =3D &sm1_earcrx_dmac_clk_sel.hw, + [AUD_CLKID_EARCRX_DMAC_DIV] =3D &sm1_earcrx_dmac_clk_div.hw, + [AUD_CLKID_EARCRX_DMAC] =3D &sm1_earcrx_dmac_clk.hw, +}; + /* * Array of all SM1 clocks provided by this provider * The input clocks of the controller will be populated at runtime @@ -1410,6 +1563,15 @@ static const struct audioclk_data g12a_audioclk_data= =3D { .max_register =3D AUDIO_CLK_SPDIFOUT_B_CTRL, }; =20 +static const struct audioclk_data s4_audioclk_data =3D { + .hw_clks =3D { + .hws =3D s4_audio_hw_clks, + .num =3D ARRAY_SIZE(s4_audio_hw_clks), + }, + .rst_drvname =3D "rst-sm1", + .max_register =3D AUDIO_EARCRX_DMAC_CLK_CTRL, +}; + static const struct audioclk_data sm1_audioclk_data =3D { .hw_clks =3D { .hws =3D sm1_audio_hw_clks, @@ -1426,6 +1588,9 @@ static const struct of_device_id clkc_match_table[] = =3D { }, { .compatible =3D "amlogic,g12a-audio-clkc", .data =3D &g12a_audioclk_data + }, { + .compatible =3D "amlogic,s4-audio-clkc", + .data =3D &s4_audioclk_data }, { .compatible =3D "amlogic,sm1-audio-clkc", .data =3D &sm1_audioclk_data --=20 2.52.0 From nobody Sun Feb 8 15:25:50 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 46CC723D7C7; Mon, 26 Jan 2026 06:02:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769407329; cv=none; b=Iw+qHY3t4ZrWgLSeYGYQVJOq+1tRYgrtsNlhSEUjPvTtKdey4fATJuCWWAXMZDLVWaTh93AEMfArAka31Dd8xfSU0ltWsRUAZHOTETHeZcT0PPFExax7RYFN2q/7XFCPB+rwYc18wPqsDRT1unAdj0Y7NH/qD2yFspLEU17jy6Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769407329; c=relaxed/simple; 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b=HHQuVeq6EjsfnEeLLIOCkV8ISzYFdGpibKEf/zhS+LspHbgArv8PFuW02BqdZcvyK B7SbFp6AtWJk2rWcNi2t6L+fuaa5lDRj3d40YLyetkzAHb4gJ/Gb5q0dpkR6p0v+C0 iJM18HlgGj/v+ryqa9m2JpRNkJgbG7rC7614/lC83N9Qsoaz/yorlq+thT4lRp0dqk 3Odqf3He+WWdh6xfxU63h0Yz31KD5DkHfB3IxrNfqmHe8VWrtZsFpUZBQydeMw8GbR Vs1veuucFxXRrgEHqtlBta2uMwQNXzNgzCwDB1F8aHtrsFRDlDqb876x2hN/RYth3Y 17fLx9lpGy2Lg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05B9AC88E4A; Mon, 26 Jan 2026 06:02:09 +0000 (UTC) From: Jiebing Chen via B4 Relay Date: Mon, 26 Jan 2026 06:01:46 +0000 Subject: [PATCH v6 5/5] arm64: dts: amlogic: Add Amlogic S4 Audio Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260126-audio_drvier-v6-5-99e350855bc2@amlogic.com> References: <20260126-audio_drvier-v6-0-99e350855bc2@amlogic.com> In-Reply-To: <20260126-audio_drvier-v6-0-99e350855bc2@amlogic.com> To: Jerome Brunet , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jaroslav Kysela , Takashi Iwai , Neil Armstrong , Kevin Hilman , Martin Blumenstingl , Michael Turquette , Stephen Boyd Cc: linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, jian.xu@amlogic.com, shuai.li@amlogic.com, zhe.wang@amlogic.com, jiebing chen X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1769407326; l=19268; i=jiebing.chen@amlogic.com; s=20250110; h=from:subject:message-id; bh=2Sz1jfgAtQUW+rfI9cts5YI8oJ87WKYokkV583Nf6cc=; b=IX4YL0s2ni9Q+pNgttawvGQTsqOncjOFCWdnIvW+0eNV+M4LKIGagvNbuNNKPMuyaI5ahgPBt 8Iekg6JV+e9AUik2fDfNdd+OL4rn/jUSMHOG1Y1/J5oiNneLbmBBkqK X-Developer-Key: i=jiebing.chen@amlogic.com; a=ed25519; pk=6rFvvF45A84pLNRy03hfUHeROxHCnZ+1KAGw/DoqKic= X-Endpoint-Received: by B4 Relay for jiebing.chen@amlogic.com/20250110 with auth_id=316 X-Original-From: Jiebing Chen Reply-To: jiebing.chen@amlogic.com From: Jiebing Chen Add basic audio driver support for the Amlogic S4 based Amlogic AQ222 board. Signed-off-by: Jiebing Chen --- .../boot/dts/amlogic/meson-s4-s805x2-aq222.dts | 222 +++++++++++++ arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 361 +++++++++++++++++= ++++ 2 files changed, 583 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts b/arch/a= rm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts index 0a3f81ea0fb0..43493bc9da46 100644 --- a/arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts +++ b/arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts @@ -75,6 +75,19 @@ vddio_ao1v8: regulator-vddio-ao1v8 { regulator-always-on; }; =20 + vcc5v_reg: regulator-vcc-5v { + compatible =3D "regulator-fixed"; + vin-supply =3D <&main_12v>; + regulator-name =3D "VCC5V"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + gpio =3D <&gpio GPIOH_7 GPIO_ACTIVE_HIGH>; + startup-delay-us =3D <7000>; + enable-active-high; + regulator-boot-on; + regulator-always-on; + }; + /* SY8120B1ABC DC/DC Regulator. */ vddcpu: regulator-vddcpu { compatible =3D "pwm-regulator"; @@ -129,6 +142,215 @@ vddcpu: regulator-vddcpu { <699000 98>, <689000 100>; }; + + dmics: audio-codec-1 { + compatible =3D "dmic-codec"; + #sound-dai-cells =3D <0>; + num-channels =3D <2>; + wakeup-delay-ms =3D <50>; + sound-name-prefix =3D "MIC"; + }; + + dioo2133: audio-amplifier-0 { + compatible =3D "simple-audio-amplifier"; + enable-gpios =3D <&gpio GPIOH_8 GPIO_ACTIVE_HIGH>; + VCC-supply =3D <&vcc5v_reg>; + sound-name-prefix =3D "10U2"; + }; + + spdif_dir: audio-spdif-in { + compatible =3D "linux,spdif-dir"; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "DIR"; + }; + + spdif_dit: audio-spdif-out { + compatible =3D "linux,spdif-dit"; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "DIT"; + }; + + sound { + compatible =3D "amlogic,axg-sound-card"; + model =3D "aq222"; + audio-widgets =3D "Line", "Lineout"; + audio-aux-devs =3D <&tdmout_a>, <&tdmout_b>, <&tdmout_c>, + <&tdmin_a>, <&tdmin_b>, <&tdmin_c>, + <&tdmin_lb>, <&dioo2133>; + audio-routing =3D "TDMOUT_A IN 0", "FRDDR_A OUT 0", + "TDMOUT_A IN 1", "FRDDR_B OUT 0", + "TDMOUT_A IN 2", "FRDDR_C OUT 0", + "TDM_A Playback", "TDMOUT_A OUT", + "TDMOUT_B IN 0", "FRDDR_A OUT 1", + "TDMOUT_B IN 1", "FRDDR_B OUT 1", + "TDMOUT_B IN 2", "FRDDR_C OUT 1", + "TDM_B Playback", "TDMOUT_B OUT", + "TDMOUT_C IN 0", "FRDDR_A OUT 2", + "TDMOUT_C IN 1", "FRDDR_B OUT 2", + "TDMOUT_C IN 2", "FRDDR_C OUT 2", + "TDM_C Playback", "TDMOUT_C OUT", + "SPDIFOUT_A IN 0", "FRDDR_A OUT 3", + "SPDIFOUT_A IN 1", "FRDDR_B OUT 3", + "SPDIFOUT_A IN 2", "FRDDR_C OUT 3", + "SPDIFOUT_B IN 0", "FRDDR_A OUT 4", + "SPDIFOUT_B IN 1", "FRDDR_B OUT 4", + "SPDIFOUT_B IN 2", "FRDDR_C OUT 4", + "TDMIN_A IN 0", "TDM_A Capture", + "TDMIN_A IN 1", "TDM_B Capture", + "TDMIN_A IN 2", "TDM_C Capture", + "TDMIN_A IN 3", "TDM_A Loopback", + "TDMIN_A IN 4", "TDM_B Loopback", + "TDMIN_A IN 5", "TDM_C Loopback", + "TDMIN_B IN 0", "TDM_A Capture", + "TDMIN_B IN 1", "TDM_B Capture", + "TDMIN_B IN 2", "TDM_C Capture", + "TDMIN_B IN 3", "TDM_A Loopback", + "TDMIN_B IN 4", "TDM_B Loopback", + "TDMIN_B IN 5", "TDM_C Loopback", + "TDMIN_C IN 0", "TDM_A Capture", + "TDMIN_C IN 1", "TDM_B Capture", + "TDMIN_C IN 2", "TDM_C Capture", + "TDMIN_C IN 3", "TDM_A Loopback", + "TDMIN_C IN 4", "TDM_B Loopback", + "TDMIN_C IN 5", "TDM_C Loopback", + "TDMIN_LB IN 3", "TDM_A Capture", + "TDMIN_LB IN 4", "TDM_B Capture", + "TDMIN_LB IN 5", "TDM_C Capture", + "TDMIN_LB IN 0", "TDM_A Loopback", + "TDMIN_LB IN 1", "TDM_B Loopback", + "TDMIN_LB IN 2", "TDM_C Loopback", + "TODDR_A IN 0", "TDMIN_A OUT", + "TODDR_B IN 0", "TDMIN_A OUT", + "TODDR_C IN 0", "TDMIN_A OUT", + "TODDR_A IN 1", "TDMIN_B OUT", + "TODDR_B IN 1", "TDMIN_B OUT", + "TODDR_C IN 1", "TDMIN_B OUT", + "TODDR_A IN 2", "TDMIN_C OUT", + "TODDR_B IN 2", "TDMIN_C OUT", + "TODDR_C IN 2", "TDMIN_C OUT", + "TODDR_A IN 3", "SPDIFIN Capture", + "TODDR_B IN 3", "SPDIFIN Capture", + "TODDR_C IN 3", "SPDIFIN Capture", + "TODDR_A IN 6", "TDMIN_LB OUT", + "TODDR_B IN 6", "TDMIN_LB OUT", + "TODDR_C IN 6", "TDMIN_LB OUT", + "10U2 INL", "ACODEC LOLP", + "10U2 INR", "ACODEC LORP", + "Lineout", "10U2 OUTL", + "Lineout", "10U2 OUTR"; + clocks =3D <&clkc_pll CLKID_HIFI_PLL>, + <&clkc_pll CLKID_MPLL0>, + <&clkc_pll CLKID_MPLL1>; + assigned-clocks =3D <&clkc_pll CLKID_HIFI_PLL>, + <&clkc_pll CLKID_MPLL0>, + <&clkc_pll CLKID_MPLL1>; + assigned-clock-rates =3D <1179648000>, + <270950400>, + <338688000>; + + dai-link-0 { + sound-dai =3D <&frddr_a>; + }; + + dai-link-1 { + sound-dai =3D <&frddr_b>; + }; + + dai-link-2 { + sound-dai =3D <&frddr_c>; + }; + + dai-link-3 { + sound-dai =3D <&toddr_a>; + }; + + dai-link-4 { + sound-dai =3D <&toddr_b>; + }; + + dai-link-5 { + sound-dai =3D <&toddr_c>; + }; + + dai-link-6 { + sound-dai =3D <&tdmif_a>; + dai-format =3D "i2s"; + dai-tdm-slot-tx-mask-0 =3D <1 1>; + mclk-fs =3D <256>; + codec-0 { + sound-dai =3D <&tohdmitx TOHDMITX_I2S_IN_A>; + }; + codec-1 { + sound-dai =3D <&toacodec TOACODEC_IN_A>; + }; + }; + + dai-link-7 { + sound-dai =3D <&tdmif_b>; + dai-format =3D "i2s"; + dai-tdm-slot-tx-mask-0 =3D <1 1>; + mclk-fs =3D <256>; + codec-0 { + sound-dai =3D <&toacodec TOACODEC_IN_B>; + }; + codec-1 { + sound-dai =3D <&tohdmitx TOHDMITX_I2S_IN_B>; + }; + }; + + /* 8ch HDMI interface */ + dai-link-8 { + sound-dai =3D <&tdmif_c>; + dai-format =3D "i2s"; + dai-tdm-slot-tx-mask-0 =3D <1 1>; + dai-tdm-slot-tx-mask-1 =3D <1 1>; + dai-tdm-slot-tx-mask-2 =3D <1 1>; + dai-tdm-slot-tx-mask-3 =3D <1 1>; + mclk-fs =3D <256>; + codec-0 { + sound-dai =3D <&tohdmitx TOHDMITX_I2S_IN_C>; + }; + }; + + /* spdif hdmi and coax output */ + dai-link-9 { + sound-dai =3D <&spdifout_a>; + + codec-0 { + sound-dai =3D <&spdif_dit>; + }; + + codec-1 { + sound-dai =3D <&tohdmitx TOHDMITX_SPDIF_IN_A>; + }; + }; + + /* spdif hdmi interface */ + dai-link-10 { + sound-dai =3D <&spdifout_b>; + + codec { + sound-dai =3D <&tohdmitx TOHDMITX_SPDIF_IN_B>; + }; + }; + + /* spdif coax input */ + dai-link-11 { + sound-dai =3D <&spdifin>; + + codec { + sound-dai =3D <&spdif_dir>; + }; + }; + + dai-link-12 { + sound-dai =3D <&toacodec TOACODEC_OUT>; + + codec { + sound-dai =3D <&acodec>; + }; + }; + }; }; =20 &pwm_ef { diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dt= s/amlogic/meson-s4.dtsi index dfc0a30a6e61..a6c2c83eea16 100644 --- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi @@ -11,6 +11,11 @@ #include #include #include +#include +#include +#include +#include +#include =20 / { cpus { @@ -863,4 +868,360 @@ emmc: mmc@fe08c000 { assigned-clock-rates =3D <24000000>; }; }; + + tdmif_a: audio-controller-0 { + compatible =3D "amlogic,axg-tdm-iface"; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "TDM_A"; + clocks =3D <&clkc_audio AUD_CLKID_MST_A_SCLK>, + <&clkc_audio AUD_CLKID_MST_A_LRCLK>, + <&clkc_audio AUD_CLKID_MST_A_MCLK>; + clock-names =3D "sclk", "lrclk","mclk"; + }; + + tdmif_b: audio-controller-1 { + compatible =3D "amlogic,axg-tdm-iface"; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "TDM_B"; + clocks =3D <&clkc_audio AUD_CLKID_MST_A_SCLK>, + <&clkc_audio AUD_CLKID_MST_B_LRCLK>, + <&clkc_audio AUD_CLKID_MST_B_MCLK>; + clock-names =3D "sclk", "lrclk","mclk"; + }; + + tdmif_c: audio-controller-2 { + compatible =3D "amlogic,axg-tdm-iface"; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "TDM_C"; + clocks =3D <&clkc_audio AUD_CLKID_MST_C_SCLK>, + <&clkc_audio AUD_CLKID_MST_C_LRCLK>, + <&clkc_audio AUD_CLKID_MST_C_MCLK>; + clock-names =3D "sclk", "lrclk","mclk"; + }; +}; + +&apb4 { + acodec: audio-controller@1a000 { + compatible =3D "amlogic,t9015"; + reg =3D <0x0 0x1a000 0x0 0x14>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "ACODEC"; + clocks =3D <&clkc_periphs CLKID_ACODEC>; + clock-names =3D "pclk"; + resets =3D <&reset RESET_ACODEC>; + AVDD-supply =3D <&vddio_ao1v8>; + }; + + clkc_audio: clock-controller@330000 { + compatible =3D "amlogic,s4-audio-clkc"; + reg =3D <0x0 0x330000 0x0 0xd8>, + <0x0 0x330e80 0x0 0x10>; + #clock-cells =3D <1>; + #reset-cells =3D <1>; + power-domains =3D <&pwrc PWRC_S4_AUDIO_ID>; + clocks =3D <&clkc_periphs CLKID_AUDIO>, + <&clkc_pll CLKID_MPLL0>, + <&clkc_pll CLKID_MPLL1>, + <&clkc_pll CLKID_MPLL2>, + <&clkc_pll CLKID_MPLL3>, + <&clkc_pll CLKID_HIFI_PLL>, + <&clkc_pll CLKID_FCLK_DIV3>, + <&clkc_pll CLKID_FCLK_DIV4>, + <&clkc_pll CLKID_FCLK_DIV5>; + clock-names =3D "pclk", + "mst_in0", + "mst_in1", + "mst_in2", + "mst_in3", + "mst_in4", + "mst_in5", + "mst_in6", + "mst_in7"; + resets =3D <&reset RESET_AUDIO>; + }; + + toddr_a: audio-controller@330100 { + compatible =3D "amlogic,sm1-toddr", + "amlogic,axg-toddr"; + reg =3D <0x0 0x330100 0x0 0x2c>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "TODDR_A"; + interrupts =3D ; + clocks =3D <&clkc_audio AUD_CLKID_TODDR_A>; + resets =3D <&arb AXG_ARB_TODDR_A>, + <&clkc_audio AUD_RESET_TODDR_A>; + reset-names =3D "arb", "rst"; + amlogic,fifo-depth =3D <8192>; + }; + + toddr_b: audio-controller@330140 { + compatible =3D "amlogic,sm1-toddr", + "amlogic,axg-toddr"; + reg =3D <0x0 0x330140 0x0 0x2c>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "TODDR_B"; + interrupts =3D ; + clocks =3D <&clkc_audio AUD_CLKID_TODDR_B>; + resets =3D <&arb AXG_ARB_TODDR_B>, + <&clkc_audio AUD_RESET_TODDR_B>; + reset-names =3D "arb", "rst"; + amlogic,fifo-depth =3D <256>; + }; + + toddr_c: audio-controller@330180 { + compatible =3D "amlogic,sm1-toddr", + "amlogic,axg-toddr"; + reg =3D <0x0 0x330180 0x0 0x2c>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "TODDR_C"; + interrupts =3D ; + clocks =3D <&clkc_audio AUD_CLKID_TODDR_C>; + resets =3D <&arb AXG_ARB_TODDR_C>, + <&clkc_audio AUD_RESET_TODDR_C>; + reset-names =3D "arb", "rst"; + amlogic,fifo-depth =3D <256>; + }; + + frddr_a: audio-controller@3301c0 { + compatible =3D "amlogic,sm1-frddr", + "amlogic,axg-frddr"; + reg =3D <0x0 0x3301c0 0x0 0x2c>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "FRDDR_A"; + interrupts =3D ; + clocks =3D <&clkc_audio AUD_CLKID_FRDDR_A>; + resets =3D <&arb AXG_ARB_FRDDR_A>, + <&clkc_audio AUD_RESET_FRDDR_A>; + reset-names =3D "arb", "rst"; + amlogic,fifo-depth =3D <512>; + }; + + frddr_b: audio-controller@330200 { + compatible =3D "amlogic,sm1-frddr", + "amlogic,axg-frddr"; + reg =3D <0x0 0x330200 0x0 0x2c>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "FRDDR_B"; + interrupts =3D ; + clocks =3D <&clkc_audio AUD_CLKID_FRDDR_B>; + resets =3D <&arb AXG_ARB_FRDDR_B>, + <&clkc_audio AUD_RESET_FRDDR_B>; + reset-names =3D "arb", "rst"; + amlogic,fifo-depth =3D <256>; + }; + + frddr_c: audio-controller@330240 { + compatible =3D "amlogic,sm1-frddr", + "amlogic,axg-frddr"; + reg =3D <0x0 0x330240 0x0 0x2c>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "FRDDR_C"; + interrupts =3D ; + clocks =3D <&clkc_audio AUD_CLKID_FRDDR_C>; + resets =3D <&arb AXG_ARB_FRDDR_C>, + <&clkc_audio AUD_RESET_FRDDR_C>; + reset-names =3D "arb", "rst"; + amlogic,fifo-depth =3D <256>; + }; + + arb: reset-controller@330280 { + compatible =3D "amlogic,meson-sm1-audio-arb"; + reg =3D <0x0 0x330280 0x0 0x4>; + #reset-cells =3D <1>; + clocks =3D <&clkc_audio AUD_CLKID_DDR_ARB>; + }; + + tdmin_a: audio-controller@330300 { + compatible =3D "amlogic,sm1-tdmin"; + reg =3D <0x0 0x330300 0x0 0x40>; + sound-name-prefix =3D "TDMIN_A"; + resets =3D <&clkc_audio AUD_RESET_TDMIN_A>; + clocks =3D <&clkc_audio AUD_CLKID_TDMIN_A>, + <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>, + <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>, + <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>, + <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>; + clock-names =3D "pclk", "sclk", "sclk_sel", + "lrclk", "lrclk_sel"; + }; + + tdmin_b: audio-controller@330340 { + compatible =3D "amlogic,sm1-tdmin"; + reg =3D <0x0 0x330340 0x0 0x40>; + sound-name-prefix =3D "TDMIN_B"; + resets =3D <&clkc_audio AUD_RESET_TDMIN_B>; + clocks =3D <&clkc_audio AUD_CLKID_TDMIN_B>, + <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>, + <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>, + <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>, + <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>; + clock-names =3D "pclk", "sclk", "sclk_sel", + "lrclk", "lrclk_sel"; + }; + + tdmin_c: audio-controller@330380 { + compatible =3D "amlogic,sm1-tdmin"; + reg =3D <0x0 0x330380 0x0 0x40>; + sound-name-prefix =3D "TDMIN_C"; + resets =3D <&clkc_audio AUD_RESET_TDMIN_C>; + clocks =3D <&clkc_audio AUD_CLKID_TDMIN_C>, + <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>, + <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>, + <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>, + <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>; + clock-names =3D "pclk", "sclk", "sclk_sel", + "lrclk", "lrclk_sel"; + }; + + tdmin_lb: audio-controller@3303c0 { + compatible =3D "amlogic,sm1-tdmin"; + reg =3D <0x0 0x3303c0 0x0 0x40>; + sound-name-prefix =3D "TDMIN_LB"; + resets =3D <&clkc_audio AUD_RESET_TDMIN_LB>; + clocks =3D <&clkc_audio AUD_CLKID_TDMIN_LB>, + <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>, + <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>, + <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>, + <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>; + clock-names =3D "pclk", "sclk", "sclk_sel", + "lrclk", "lrclk_sel"; + }; + + spdifin: audio-controller@330400 { + compatible =3D "amlogic,g12a-spdifin", + "amlogic,axg-spdifin"; + reg =3D <0x0 0x330400 0x0 0x30>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "SPDIFIN"; + interrupts =3D ; + clocks =3D <&clkc_audio AUD_CLKID_SPDIFIN>, + <&clkc_audio AUD_CLKID_SPDIFIN_CLK>; + clock-names =3D "pclk", "refclk"; + resets =3D <&clkc_audio AUD_RESET_SPDIFIN>; + }; + + spdifout_a: audio-controller@330480 { + compatible =3D "amlogic,g12a-spdifout", + "amlogic,axg-spdifout"; + reg =3D <0x0 0x330480 0x0 0x50>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "SPDIFOUT_A"; + clocks =3D <&clkc_audio AUD_CLKID_SPDIFOUT>, + <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>; + clock-names =3D "pclk", "mclk"; + resets =3D <&clkc_audio AUD_RESET_SPDIFOUT>; + }; + + tdmout_a: audio-controller@330500 { + compatible =3D "amlogic,sm1-tdmout"; + reg =3D <0x0 0x330500 0x0 0x40>; + sound-name-prefix =3D "TDMOUT_A"; + resets =3D <&clkc_audio AUD_RESET_TDMOUT_A>; + clocks =3D <&clkc_audio AUD_CLKID_TDMOUT_A>, + <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>, + <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>, + <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>, + <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>; + clock-names =3D "pclk", "sclk", "sclk_sel", + "lrclk", "lrclk_sel"; + }; + + tdmout_b: audio-controller@330540 { + compatible =3D "amlogic,sm1-tdmout"; + reg =3D <0x0 0x330540 0x0 0x40>; + sound-name-prefix =3D "TDMOUT_B"; + resets =3D <&clkc_audio AUD_RESET_TDMOUT_B>; + clocks =3D <&clkc_audio AUD_CLKID_TDMOUT_B>, + <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>, + <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>, + <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>, + <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>; + clock-names =3D "pclk", "sclk", "sclk_sel", + "lrclk", "lrclk_sel"; + }; + + tdmout_c: audio-controller@330580 { + compatible =3D "amlogic,sm1-tdmout"; + reg =3D <0x0 0x330580 0x0 0x40>; + sound-name-prefix =3D "TDMOUT_C"; + resets =3D <&clkc_audio AUD_RESET_TDMOUT_C>; + clocks =3D <&clkc_audio AUD_CLKID_TDMOUT_C>, + <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>, + <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>, + <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>, + <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>; + clock-names =3D "pclk", "sclk", "sclk_sel", + "lrclk", "lrclk_sel"; + }; + + spdifout_b: audio-controller@330680 { + compatible =3D "amlogic,g12a-spdifout", + "amlogic,axg-spdifout"; + reg =3D <0x0 0x330680 0x0 0x50>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "SPDIFOUT_B"; + clocks =3D <&clkc_audio AUD_CLKID_SPDIFOUT_B>, + <&clkc_audio AUD_CLKID_SPDIFOUT_B_CLK>; + clock-names =3D "pclk", "mclk"; + resets =3D <&clkc_audio AUD_RESET_SPDIFOUT_B>; + }; + + toacodec: audio-controller@330740 { + compatible =3D "amlogic,s4-toacodec", + "amlogic,g12a-toacodec"; + reg =3D <0x0 0x330740 0x0 0x4>; + sound-name-prefix =3D "TOACODEC"; + #sound-dai-cells =3D <1>; + resets =3D <&clkc_audio AUD_RESET_TOACODEC>; + }; + + tohdmitx: audio-controller@330744 { + compatible =3D "amlogic,sm1-tohdmitx", + "amlogic,g12a-tohdmitx"; + reg =3D <0x0 0x330744 0x0 0x4>; + #sound-dai-cells =3D <1>; + sound-name-prefix =3D "TOHDMITX"; + resets =3D <&clkc_audio AUD_RESET_TOHDMITX>; + }; + + toddr_d: audio-controller@330840 { + compatible =3D "amlogic,sm1-toddr", + "amlogic,axg-toddr"; + reg =3D <0x0 0x330840 0x0 0x2c>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "TODDR_D"; + interrupts =3D ; + clocks =3D <&clkc_audio AUD_CLKID_TODDR_D>; + resets =3D <&arb AXG_ARB_TODDR_D>, + <&clkc_audio AUD_RESET_TODDR_D>; + reset-names =3D "arb", "rst"; + amlogic,fifo-depth =3D <256>; + }; + + frddr_d: audio-controller@330880 { + compatible =3D "amlogic,sm1-frddr", + "amlogic,axg-frddr"; + reg =3D <0x0 0x330880 0x0 0x2c>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "FRDDR_D"; + interrupts =3D ; + clocks =3D <&clkc_audio AUD_CLKID_FRDDR_D>; + resets =3D <&arb AXG_ARB_FRDDR_D>, + <&clkc_audio AUD_RESET_FRDDR_D>; + reset-names =3D "arb", "rst"; + amlogic,fifo-depth =3D <256>; + }; + + pdm: audio-controller@331000 { + compatible =3D "amlogic,sm1-pdm", + "amlogic,axg-pdm"; + reg =3D <0x0 0x331000 0x0 0x34>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "PDM"; + clocks =3D <&clkc_audio AUD_CLKID_PDM>, + <&clkc_audio AUD_CLKID_PDM_DCLK>, + <&clkc_audio AUD_CLKID_PDM_SYSCLK>; + clock-names =3D "pclk", "dclk", "sysclk"; + resets =3D <&clkc_audio AUD_RESET_PDM>; + }; }; --=20 2.52.0