From nobody Tue Feb 10 00:59:09 2026 Received: from mail-ed1-f50.google.com (mail-ed1-f50.google.com [209.85.208.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C27772F069E for ; Sun, 25 Jan 2026 18:39:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769366371; cv=none; b=TsWuQgm1YVAPtwitTAw5h1R8R824WfEkpUxk/QY9L5IvF1arMQLpTNKCvH/1KGB7TZ/+uMPAabwpJmFe/dNmPUAXBu2Js/N7kaYkro791ehamd+sBdTeq/XYIHOTptDc44bM0DiXaxqeghvkh78kOMK5QU2/0w95DcNorv6aP+o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769366371; c=relaxed/simple; bh=DJmIqqhGLIvWWN/upUq+tddtg/wFJJBVANgro711hBU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=nzYA57ycPXAzpAnQJlqS44AftwNNUmSQfSSypUcAUeWpu52xCxqnKQnnNnYgokg9yolLz4zPfPdqgHSJz5KfwwqiwN9+uh5ins/q4HB1XVCiAE2+ZhqXCrwMstyA6Il4BkRZqViy2OJxk16BIMuKirSFdfEoSy1AlhFBBQxvuXE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=OW1B9Bof; arc=none smtp.client-ip=209.85.208.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="OW1B9Bof" Received: by mail-ed1-f50.google.com with SMTP id 4fb4d7f45d1cf-6505d1420daso572301a12.0 for ; Sun, 25 Jan 2026 10:39:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1769366368; x=1769971168; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0A5eHusdWY5bDg+aivWCgCoxrDZwEpdh2mh6IhrC0mc=; b=OW1B9BofHDHpyn4OmdAsIgn3lcFMbsVS1pAquPwGLx63decDtkNc14eTzIEMDwmuBI 1leH/q6Xyo1hYFIvd7/mUw4bti4utwey84lcomo1asDzd1Z5aLPs/tYit7IUsGTiGyvG Dn7aPLBBJ7LOQtbiMeallEOMZDrU6Er/EhTgeFpKyVzr5A5sV8cQjTU7feXJqeoyC8r/ 4N2PadnM0a0ZnUBDn2ud25BsqPSsDc6JqQgla4jQ0HHrQ0vNR1DVluSHreL2rL6C+/f+ /GvXTECWrlOGK9XaDVomEDp9qyjKDyAg9++Q6OOgEVfCOOcmGKieiOtRTajLyJnRYp0l N4VQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1769366368; x=1769971168; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=0A5eHusdWY5bDg+aivWCgCoxrDZwEpdh2mh6IhrC0mc=; b=ScuAqjDStprNHnUviJmhY4Cnn13sGSCTWqHfiGVBG+JMpWezOrhgvdHOx5rTeTmN3/ ezZgQxJhAue6pQHvOQZxEBMa0PpYRgy9vHvtm84dE0UKTOqML7Hsw/jgSjcoel+wKjPl 6gfaqVFRpGCXuH0KU57a/tg8fZQI/KPjpk+xFmQJR3nM3NjvQ1ExtMoxRam31UzMVgmr N3aJLA25sB7IeqFAOcp8vDq+lFYTQLiH5WsQX/wBaFbWXQ0m24JEJL3B2QtlOT9KKff/ Mv35/xwGMh1PmATTs0XtGs6FEimoxK6k21FPJrmu8xEnH5t98ulfraKX2gm3ydejIgLd q0xg== X-Forwarded-Encrypted: i=1; AJvYcCWc3kysTqrdvIjpIsIxpofNM+oQgqJvC4UUKKQRYkAHlTSEppfYE4CSCdXinQvUm9ygAmsMDIruv+YXGgg=@vger.kernel.org X-Gm-Message-State: AOJu0Yzd+5CR+KKgFJwqrxf97pBhaP4IrqJRWBWJeSnYgBVhfw4RwcRB PHh65MitY5Ntu3lPxRJqr4DvaMdH9OumiLaIMQEn1IGzoFvNaRYXPL04 X-Gm-Gg: AZuq6aIqLqyuFbvHolg8hYZufZdBcQW1S3PVt9fp9l7ybz9qb6Ko91Bd8Ap8aGlYKHY XH0Mwh2e3HeGSY31HyXZ32g94XvW83qbzFEEaapdJ2VilNs9GtuJ+dfxICXxOjykVPXd9lVN6y/ noOIKToAKdQcpbFeajaA7wY+6qCn1U4qJhH+vAk0Y+3fbOJB62Ufb/kfG9myLDFaiSZA50FbJjT YHs0csOvvljCmYuZ/FMYZFWc/8z2/P509VNvmRdgQF5KQAM4iUBRtNDzAKcwC5qonpRdvvHewgp c7jyqcQjgNXPJxIWYW1O1V7nXnT+7uArvJd6aT4YiMfAvlPmWp5HAa6snkybRhcx5JZkbsALL1K 99dKJmLqDfJ9stDNYaDoaCFFCppzt2R1GNJICmnHkcU7c9XGCqQae1iqtsv2UhiWlFou93KVut6 HRXh9eXXN0ILJfiDVR6XMmpD5IvbIWoZg7VG7gD+0ACJ4KdFhEdQwuH/BTkOzyTTy4 X-Received: by 2002:a17:907:787:b0:b8a:f2d7:9942 with SMTP id a640c23a62f3a-b8d3fce31cdmr73328966b.3.1769366367942; Sun, 25 Jan 2026 10:39:27 -0800 (PST) Received: from laptok.lan (87-205-5-123.static.ip.netia.com.pl. [87.205.5.123]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b885b3dad3asm499133766b.12.2026.01.25.10.39.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 25 Jan 2026 10:39:27 -0800 (PST) From: =?UTF-8?q?Tomasz=20Paku=C5=82a?= To: alexander.deucher@amd.com, harry.wentland@amd.com, sunpeng.li@amd.com Cc: maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, siqueira@igalia.com, dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, tomasz.pakula.oficjalny@gmail.com, bernhard.berger@gmail.com, michel.daenzer@mailbox.org, daniel@fooishbar.org Subject: [PATCH v2 08/19] drm/edid: Parse more info from HDMI Forum vsdb Date: Sun, 25 Jan 2026 19:39:03 +0100 Message-ID: <20260125183914.459228-9-tomasz.pakula.oficjalny@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260125183914.459228-1-tomasz.pakula.oficjalny@gmail.com> References: <20260125183914.459228-1-tomasz.pakula.oficjalny@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable [Why] Drivers may need info about gaming features exposed by HDMI sinks. Add a central way of storing this information. [How] Adds flags and a struct to hold HDMI VRR information. `supported` here is an additional property which allows easier parsing in consumers and adds a bit of logic used to detect malformed VRRmin/VRRmax values. Signed-off-by: Tomasz Paku=C5=82a Tested-by: Bernhard Berger --- drivers/gpu/drm/drm_edid.c | 41 +++++++++++++++++++++++++++++++- include/drm/drm_connector.h | 47 +++++++++++++++++++++++++++++++++++++ 2 files changed, 87 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index e2e85345aa9a..5bdacd425908 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -6149,6 +6149,33 @@ static void drm_parse_ycbcr420_deep_color_info(struc= t drm_connector *connector, hdmi->y420_dc_modes =3D dc_mask; } =20 +static void drm_parse_hdmi_gaming_info(struct drm_hdmi_info *hdmi, const u= 8 *db) +{ + struct drm_hdmi_vrr_cap *vrr =3D &hdmi->vrr_cap; + + if (cea_db_payload_len(db) < 8) + return; + + hdmi->fapa_start_location =3D db[8] & DRM_EDID_FAPA_START_LOCATION; + hdmi->allm =3D db[8] & DRM_EDID_ALLM; + vrr->fva =3D db[8] & DRM_EDID_FVA; + vrr->cnmvrr =3D db[8] & DRM_EDID_CNMVRR; + vrr->cinema_vrr =3D db[8] & DRM_EDID_CINEMA_VRR; + vrr->mdelta =3D db[8] & DRM_EDID_MDELTA; + + if (cea_db_payload_len(db) < 9) + return; + + vrr->vrr_min =3D db[9] & DRM_EDID_VRR_MIN_MASK; + vrr->supported =3D (vrr->vrr_min > 0 && vrr->vrr_min <=3D 48); + + if (cea_db_payload_len(db) < 10) + return; + + vrr->vrr_max =3D (db[9] & DRM_EDID_VRR_MAX_UPPER_MASK) << 2 | db[10]; + vrr->supported &=3D (vrr->vrr_max =3D=3D 0 || vrr->vrr_max >=3D 100); +} + static void drm_parse_dsc_info(struct drm_hdmi_dsc_cap *hdmi_dsc, const u8 *hf_scds) { @@ -6274,7 +6301,7 @@ static void drm_parse_hdmi_forum_scds(struct drm_conn= ector *connector, } =20 drm_parse_ycbcr420_deep_color_info(connector, hf_scds); - + drm_parse_hdmi_gaming_info(&connector->display_info.hdmi, hf_scds); if (cea_db_payload_len(hf_scds) >=3D 11 && hf_scds[11]) { drm_parse_dsc_info(hdmi_dsc, hf_scds); dsc_support =3D true; @@ -6284,6 +6311,18 @@ static void drm_parse_hdmi_forum_scds(struct drm_con= nector *connector, "[CONNECTOR:%d:%s] HF-VSDB: max TMDS clock: %d KHz, HDMI 2.1 support= : %s, DSC 1.2 support: %s\n", connector->base.id, connector->name, max_tmds_clock, str_yes_no(max_frl_rate), str_yes_no(dsc_support)); + drm_dbg_kms(connector->dev, + "[CONNECTOR:%d:%s] FAPA in blanking: %s, ALLM support: %s, Fast Vact= ive support: %s\n", + connector->base.id, connector->name, str_yes_no(hdmi->fapa_start_loc= ation), + str_yes_no(hdmi->allm), str_yes_no(hdmi->vrr_cap.fva)); + drm_dbg_kms(connector->dev, + "[CONNECTOR:%d:%s] Negative M VRR support: %s, CinemaVRR support: %s= , Mdelta: %d\n", + connector->base.id, connector->name, str_yes_no(hdmi->vrr_cap.cnmvrr= ), + str_yes_no(hdmi->vrr_cap.cinema_vrr), hdmi->vrr_cap.mdelta); + drm_dbg_kms(connector->dev, + "[CONNECTOR:%d:%s] VRRmin: %u, VRRmax: %u, VRR supported: %s\n", + connector->base.id, connector->name, hdmi->vrr_cap.vrr_min, + hdmi->vrr_cap.vrr_max, str_yes_no(hdmi->vrr_cap.supported)); } =20 static void drm_parse_hdmi_deep_color_info(struct drm_connector *connector, diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h index 8f34f4b8183d..dab9d5521f41 100644 --- a/include/drm/drm_connector.h +++ b/include/drm/drm_connector.h @@ -254,6 +254,44 @@ struct drm_scdc { struct drm_scrambling scrambling; }; =20 +/** + * struct drm_hdmi_vrr_cap - Information about VRR capabilities of a HDMI = sink + * + * Describes the VRR support provided by HDMI 2.1 sink. The information is + * fetched fom additional HFVSDB blocks defined for HDMI 2.1. + */ +struct drm_hdmi_vrr_cap { + /** @fva: flag for Fast VActive (Quick Frame Transport) support */ + bool fva; + + /** @mcnmvrr: flag for Negative M VRR support */ + bool cnmvrr; + + /** @mcinema_vrr: flag for Cinema VRR support */ + bool cinema_vrr; + + /** @mdelta: flag for limited frame-to-frame compensation support */ + bool mdelta; + + /** + * @vrr_min : minimum supported variable refresh rate in Hz. + * Valid values only inide 1 - 48 range + */ + u16 vrr_min; + + /** + * @vrr_max : maximum supported variable refresh rate in Hz (optional). + * Valid values are either 0 (max based on video mode) or >=3D 100 + */ + u16 vrr_max; + + /** + * @supported: flag for vrr support based on checking for VRRmin and + * VRRmax values having correct values. + */ + bool supported; +}; + /** * struct drm_hdmi_dsc_cap - DSC capabilities of HDMI sink * @@ -330,6 +368,15 @@ struct drm_hdmi_info { /** @max_lanes: supported by sink */ u8 max_lanes; =20 + /** @fapa_start_location: flag for the FAPA in blanking support */ + bool fapa_start_location; + + /** @allm: flag for Auto Low Latency Mode support by sink */ + bool allm; + + /** @vrr_cap: VRR capabilities of the sink */ + struct drm_hdmi_vrr_cap vrr_cap; + /** @dsc_cap: DSC capabilities of the sink */ struct drm_hdmi_dsc_cap dsc_cap; }; --=20 2.52.0