From nobody Sun Feb 8 22:06:24 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 59B572066F7 for ; Sun, 25 Jan 2026 02:06:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769306784; cv=none; b=SLjBZ4CmhKw0ADAIs+VP1VgwyRvA/FrtX2NBJQTOXBZKs747N6CUT+3BXzsaptjdUw0i1HeXnXP6vWYEGaHti6LRKouhZ30KSmj7wtYX0drUlT6IRnrldSBwTLKDlafyO0WjsPt3FkFYfONF5BVqOG4Kg2ujupO0DfqP8WmNcQc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769306784; c=relaxed/simple; bh=9EpnMB99fBJ2xiP0DqgEPLPLXNhfK0CkMkb/JRyLFJ4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=cYdGbfSj656VeX++Rny5Mo3v4gyZGeqMLw7avSyGc6EWcHSvdFHuOwvfyt6NKDK0y/y2KaTZQdvhENg3pk7kRn8lUWm1GEPx9F2phfnO7DrAj3ztLGcvFrixXW4Vma28qd92zX66d1ZQLXq1wkx3XeCwGYcHcxaMKJN8qENNbac= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=nHYR/+Tf; arc=none smtp.client-ip=192.198.163.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="nHYR/+Tf" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1769306782; x=1800842782; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=9EpnMB99fBJ2xiP0DqgEPLPLXNhfK0CkMkb/JRyLFJ4=; b=nHYR/+Tfu/UAv/Ubn6v80t1cRBuCY0jA5/HAhiy9DHbQG2jlJizMzSrh Nv//yoc0zCsth3NZlSlYa3YpdZfoNl8xIhuE0TUD8Ug3sfTZiV+upkjY8 MxUSk2vIvH0x8UDLYmnqYql5SkTSzXhB9tUk0FkXIINPEZpxINtpjfkfU U1QBxan/A4WKLudD7/q7hPFpkIeBduhhNEEWwGX21B2XrmTHtJYMvnmG/ mnLTdqPUC3pFg252Gpxyp6lvTvv3z5CWXjcLW0sW/zApp3Qi73phlT3zE GjmXnOxfwhmQJ7rtj5wFbkcoV3YtMhP4QnFhgv8uowljsrYEfR5P7jx5A A==; X-CSE-ConnectionGUID: OkTMcfneQ3qNc/SQlfbo6Q== X-CSE-MsgGUID: +iC2dVb+THWiRbMVEmaTNg== X-IronPort-AV: E=McAfee;i="6800,10657,11681"; a="73101909" X-IronPort-AV: E=Sophos;i="6.21,252,1763452800"; d="scan'208";a="73101909" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jan 2026 18:06:22 -0800 X-CSE-ConnectionGUID: qPIPpo5dS6iEoKKr74IBmQ== X-CSE-MsgGUID: fT9iZ4PERJCaL3leKNkInw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,252,1763452800"; d="scan'208";a="207783114" Received: from chang-linux-3.sc.intel.com (HELO chang-linux-3) ([172.25.66.172]) by fmviesa009.fm.intel.com with ESMTP; 24 Jan 2026 18:06:22 -0800 From: "Chang S. Bae" To: linux-kernel@vger.kernel.org Cc: x86@kernel.org, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, peterz@infradead.org, david.kaplan@amd.com, chang.seok.bae@intel.com Subject: [PATCH 7/7] x86/microcode: Remove microcode_nmi_handler_enable Date: Sun, 25 Jan 2026 01:42:22 +0000 Message-ID: <20260125014224.249901-8-chang.seok.bae@intel.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260125014224.249901-1-chang.seok.bae@intel.com> References: <20260125014224.249901-1-chang.seok.bae@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Remove it, as there is no more user. Signed-off-by: Chang S. Bae --- arch/x86/include/asm/microcode.h | 7 ------- arch/x86/kernel/cpu/microcode/core.c | 8 ++------ 2 files changed, 2 insertions(+), 13 deletions(-) diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microc= ode.h index a4e4ea8acf99..b7e89fc45500 100644 --- a/arch/x86/include/asm/microcode.h +++ b/arch/x86/include/asm/microcode.h @@ -79,15 +79,8 @@ static inline u32 intel_get_microcode_revision(void) =20 #ifdef CONFIG_MICROCODE_LATE_LOADING void microcode_offline_nmi_handler(void); - -DECLARE_STATIC_KEY_FALSE(microcode_nmi_handler_enable); -static __always_inline bool microcode_nmi_handler_enabled(void) -{ - return static_branch_unlikely(µcode_nmi_handler_enable); -} #else static __always_inline void microcode_offline_nmi_handler(void) { } -static __always_inline bool microcode_nmi_handler_enabled(void) { return f= alse; } #endif =20 #endif /* _ASM_X86_MICROCODE_H */ diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/mic= rocode/core.c index 0facadea39d6..35b1b5d88893 100644 --- a/arch/x86/kernel/cpu/microcode/core.c +++ b/arch/x86/kernel/cpu/microcode/core.c @@ -316,7 +316,6 @@ struct microcode_ctrl { bool nmi_enabled; }; =20 -DEFINE_STATIC_KEY_FALSE(microcode_nmi_handler_enable); static DEFINE_PER_CPU(struct microcode_ctrl, ucode_ctrl); static atomic_t late_cpus_in, offline_in_nmi; static unsigned int loops_per_usec; @@ -593,13 +592,10 @@ static int load_late_stop_cpus(bool is_safe) */ store_cpu_caps(&prev_info); =20 - if (microcode_ops->use_nmi) { - static_branch_enable_cpuslocked(µcode_nmi_handler_enable); + if (microcode_ops->use_nmi) stop_machine_cpuslocked_nmi(microcode_nmi_handler, NULL, cpu_online_mask= ); - static_branch_disable_cpuslocked(µcode_nmi_handler_enable); - } else { + else stop_machine_cpuslocked(microcode_update_handler, NULL, cpu_online_mask); - } =20 /* Analyze the results */ for_each_cpu_and(cpu, cpu_present_mask, &cpus_booted_once_mask) { --=20 2.51.0