From nobody Sat Feb 7 05:30:05 2026 Received: from fhigh-b4-smtp.messagingengine.com (fhigh-b4-smtp.messagingengine.com [202.12.124.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 93F96319608; Sun, 25 Jan 2026 11:08:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.155 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769339335; cv=none; b=J4B7lEKidm5xnHJCMsuP8mRNW+UDTNzafjl47Vw3HA27s5fJKXalm8igY9U8Ea/SVTMN9QmhY8pbjC4rKqEmyYwEafghFpkogXWFcCJRXsybDuixS2QnM9gxfVa01Liw3eQBSlRrH6LOalNXKaoqVEBztJZH1QJP2NoyqtxYxF0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769339335; c=relaxed/simple; bh=OGf/6Av6ZnPvenFYhFMArFcQMVsd6I41zueCB57vIS8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=EAxHLQaF+gxDfNMLR3Y8WMz2b9LgUYJyRJcdMLqZ2uCqKOfZnOkyrY2RsNJMkXwlHMDnRzSx70+dGKSw9SYBSCNXUH2ypdvLNsXncITAEJXuP8V+2R44t48T8boQtpgk8pknOec6of5J//YzY2CC3Q05Zzp9wgkoY8+l+vD0iXw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=jannau.net; spf=pass smtp.mailfrom=jannau.net; dkim=pass (2048-bit key) header.d=jannau.net header.i=@jannau.net header.b=kvLkia+e; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=Aus89Iwl; arc=none smtp.client-ip=202.12.124.155 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=jannau.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=jannau.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=jannau.net header.i=@jannau.net header.b="kvLkia+e"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="Aus89Iwl" Received: from phl-compute-05.internal (phl-compute-05.internal [10.202.2.45]) by mailfhigh.stl.internal (Postfix) with ESMTP id 6E2D87A00CD; Sun, 25 Jan 2026 06:08:52 -0500 (EST) Received: from phl-frontend-03 ([10.202.2.162]) by phl-compute-05.internal (MEProxy); Sun, 25 Jan 2026 06:08:52 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jannau.net; h=cc :cc:content-transfer-encoding:content-type:content-type:date :date:from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:subject:subject:to:to; s=fm1; t=1769339332; x=1769425732; bh=5kpH4wQV8PoTtsba9S5RoxQovxZYouvp9+g1QSdN7QM=; b= kvLkia+eXac00RfidtCy0+LfjVNVwLfow7V4j8LmKxAnyNRmkv3rODHdDkKgRFzB kNvZMWnzpNZzomfrTx5VDHKW+JyVxcxHIQEObhNV5VjzQ1ThhuCNoG3fv9aByz6z a6bG/1TCawDGxrDztHmVnUOJsWiV9Jgru0ZQwkYSb+2ZSg4HKVgkvDQIJ0MiUg4l Wbd2qJQSr+OBohFdV9qYgBdr7eBMDbccLD7VKqBvMvbAT890jHv13zO2o5Ila7BY Fex3j+ZJrF2f1orMdRHiol2Io0Gn5FalzTj9Mo2BMJ+wSHl1S7pIwTDcf703Wn9z PuDpj2UWzIUtNb2vu3vIJg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:content-type:date:date:feedback-id:feedback-id :from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:subject:subject:to:to:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1769339332; x= 1769425732; bh=5kpH4wQV8PoTtsba9S5RoxQovxZYouvp9+g1QSdN7QM=; b=A us89Iwl8J6V7/xs3bzVv+Pg7zCzMuX4ItzIYQzfcD+o4M8wBF6uzILN2SC8K0452 7oZcTxp5HBwUDWC7kAkmgZQ7VF5QHrht/huARMeXs2KWm20Q/cLq11AKGD66hmLb QWD6SJqnlnHYx8ca6704SrZ+oog89mBbyDQu4/4EtAy7S68cl/cE3s5+SIfGNJK4 BjCPt7hWtBRBD/4/SsemCwL2p42+9lji8t5lcR2wMDGF7z4HRUYz1DPTJXgJ+mZ/ YsauiJTEwc0C3VVxfhaEe41ZYanRZOvX/VABDiPl6CxRhRJtnytrEAq5gYS9vBHD VMbDMXgjbzpJy9bEm322g== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefgedrtddtgdduheegieefucetufdoteggodetrf dotffvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfurfetoffkrfgpnffqhgenuceu rghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujf gurhephfffufggtgfgkfhfjgfvvefosehtjeertdertdejnecuhfhrohhmpeflrghnnhgv ucfirhhunhgruhcuoehjsehjrghnnhgruhdrnhgvtheqnecuggftrfgrthhtvghrnhepve ekgeduheegtdekvdeifeegkeekledujeelkeevhedvvdejtdeuveekffffheelnecuffho mhgrihhnpeguvghvihgtvghtrhgvvgdrohhrghenucevlhhushhtvghrufhiiigvpedtne curfgrrhgrmhepmhgrihhlfhhrohhmpehjsehjrghnnhgruhdrnhgvthdpnhgspghrtghp thhtohepuddupdhmohguvgepshhmthhpohhuthdprhgtphhtthhopehtghhlgieslhhinh huthhrohhnihigrdguvgdprhgtphhtthhopehnvggrlhesghhomhhprgdruggvvhdprhgt phhtthhopehsvhgvnheskhgvrhhnvghlrdhorhhgpdhrtghpthhtoheptghonhhorhdoug htsehkvghrnhgvlhdrohhrghdprhgtphhtthhopeguvghvihgtvghtrhgvvgesvhhgvghr rdhkvghrnhgvlhdrohhrghdprhgtphhtthhopehrohgshheskhgvrhhnvghlrdhorhhgpd hrtghpthhtoheprghsrghhiheslhhishhtshdrlhhinhhugidruggvvhdprhgtphhtthho pehlihhnuhigqdhkvghrnhgvlhesvhhgvghrrdhkvghrnhgvlhdrohhrghdprhgtphhtth hopehkrhiikhdoughtsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: i47b949f6:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 25 Jan 2026 06:08:51 -0500 (EST) From: Janne Grunau Date: Sun, 25 Jan 2026 12:08:45 +0100 Subject: [PATCH 1/2] dt-bindings: interrupt-controller: apple,aic2: Add AICv3 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260125-irq-apple-aic3-v1-1-a2afe66a6ab9@jannau.net> References: <20260125-irq-apple-aic3-v1-0-a2afe66a6ab9@jannau.net> In-Reply-To: <20260125-irq-apple-aic3-v1-0-a2afe66a6ab9@jannau.net> To: Sven Peter , Neal Gompa , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Janne Grunau X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2809; i=j@jannau.net; s=yk2025; h=from:subject:message-id; bh=OGf/6Av6ZnPvenFYhFMArFcQMVsd6I41zueCB57vIS8=; b=owGbwMvMwCW2UNrmdq9+ahrjabUkhszSn/scbp7J2PU4hLX0/jaNHWm7tl0t+M7wUcxD9cO64 Ku/Dl7O7yhlYRDjYpAVU2RJ0n7ZwbC6RjGm9kEYzBxWJpAhDFycAjARN1GGf2aGf0NNvLM8OuxU JRKE+gwO8TzklS8+1Ba3ZHbBpvZ9XxgZFu54z/nv/9O6tcXtc3nkejzYkz13PdKUenGJd9eyRg8 zVgA= X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 AIC version 3 as found on the Apple M3 (t8122) is very similar to AICv2 in its base functionality. It can use the same device tree bindings as AICv2 so add it to the AICv2 bindings. This interrupt controller is used on all Apple SoCs starting with M3 up to at least M5. The only apparent difference is the increased IRQ config offset. Apple's device tree codes this new offset as property of the "aic" node but the value stayed constant for all SoCs with "aic,3". Since the SoC specific compatible "apple,t8122-aic3" will be used in the driver this offset can remain a driver implementation detail. Signed-off-by: Janne Grunau --- .../bindings/interrupt-controller/apple,aic2.yaml | 29 +++++++++++++++---= ---- 1 file changed, 20 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,a= ic2.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic= 2.yaml index ee5a0dfff437816056bda0de5523bf38be4f49ba..933e134d82bb599a68707ba34e0= 4ea55d61050b9 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml @@ -4,10 +4,10 @@ $id: http://devicetree.org/schemas/interrupt-controller/apple,aic2.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# =20 -title: Apple Interrupt Controller 2 +title: Apple Interrupt Controller 2 and 3 =20 maintainers: - - Hector Martin + - Janne Grunau =20 description: | The Apple Interrupt Controller 2 is a simple interrupt controller presen= t on @@ -28,14 +28,23 @@ description: | which do not go through a discrete interrupt controller. It also handles FIQ-based Fast IPIs. =20 + The Apple Interrupt Controller 3 is in its base functionality very simil= ar to + the Apple Interrupt Controller 2 and uses the same device tree bindings.= It is + found on Apple ARM SoCs platforms starting with t8122 (M3). + properties: compatible: - items: - - enum: - - apple,t8112-aic - - apple,t6000-aic - - apple,t6020-aic - - const: apple,aic2 + oneOf: + - items: + - enum: + - apple,t8112-aic + - apple,t6000-aic + - apple,t6020-aic + - const: apple,aic2 + - items: + - enum: + - apple,t6030-aic3 + - const: apple,t8122-aic3 =20 interrupt-controller: true =20 @@ -117,7 +126,9 @@ allOf: properties: compatible: contains: - const: apple,t8112-aic + enum: + - apple,t8112-aic + - apple,t8122-aic3 then: properties: '#interrupt-cells': --=20 2.52.0 From nobody Sat Feb 7 05:30:05 2026 Received: from fhigh-b4-smtp.messagingengine.com (fhigh-b4-smtp.messagingengine.com [202.12.124.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A8A2931A55B; Sun, 25 Jan 2026 11:08:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.155 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769339337; cv=none; b=A7qfO3J7zz23U3B1tYgwANO+MxZogskuhQGAZHpif9JUQlOa4lGXSmEfO5t3OIF309mlNcp0DAFU1Bq2a0npOEhuIdVzJqHxpVNS1mj8DNzcxwVZT5bqHP2d+A3XvBRRUX9GJy7vlOQOO075CST2SNYkpR3VQeMcB4HQawMkskk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769339337; c=relaxed/simple; bh=JvpkSqkCKQ8P/Z3/vU6T2eD2nWK9FDSzmVzke/AumI8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=C/SoMxBJ/oJcTQMPBUVvl8x1v06W30KkLRBzHrVcNWZFd7PGOZFROC3ntphdb7POZ2PdGlOsPymrgEsaCYSzRkkBDvi7RXmU37Unlx1plV9rIgcXk4O+Hk6VsN03/sI8+b1RHm2pihJLJn5KgXllHCMHLNNIkrMb4mAgNREcNyc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=jannau.net; spf=pass smtp.mailfrom=jannau.net; dkim=pass (2048-bit key) header.d=jannau.net header.i=@jannau.net header.b=iM8Ubei1; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=JM/zB7qE; arc=none smtp.client-ip=202.12.124.155 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=jannau.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=jannau.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=jannau.net header.i=@jannau.net header.b="iM8Ubei1"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="JM/zB7qE" Received: from phl-compute-02.internal (phl-compute-02.internal [10.202.2.42]) by mailfhigh.stl.internal (Postfix) with ESMTP id AA23D7A019A; Sun, 25 Jan 2026 06:08:54 -0500 (EST) Received: from phl-frontend-04 ([10.202.2.163]) by phl-compute-02.internal (MEProxy); Sun, 25 Jan 2026 06:08:55 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jannau.net; h=cc :cc:content-transfer-encoding:content-type:content-type:date :date:from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:subject:subject:to:to; s=fm1; t=1769339334; x=1769425734; bh=Ki8yutJ6J7/iU6VRFPZXytmgyP3XS2kOORqhMGSoRJ8=; b= iM8Ubei179dR31Y0pum/ku4tM7GqOCN4+00XtM0aVI/ag6XaFj7vFnYrneXltid9 dMhnkkuvskuxGmQS5p00zN1u3h3RDBmcBaT3DYBjZhKyWkyRSlHTNC3khJxu541c q5TevajkIDlTFicqLCwPE4n/G0NrL6MweM7gw02y7T6CJdExLq6vexiGeGfs/SIO pAwU4uon4VIvI1p1Bzf7rtCXWwlY++6Y6Nq2yb9GIAEYxwmz2zkEJOT37lhI97Ny uhkWjX1pX8eiO6AQ+af7UbaHYg8HwjbcenUFDc8MJIm3o7kyFJaE+S0r9tk3C9zU Zt+jOC83tQVhrhkbYKHo6g== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:content-type:date:date:feedback-id:feedback-id :from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:subject:subject:to:to:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1769339334; x= 1769425734; bh=Ki8yutJ6J7/iU6VRFPZXytmgyP3XS2kOORqhMGSoRJ8=; b=J M/zB7qEbScMtKB5VTgVq+QI3QBNBlQXovryHqfagffLftZTmW+Z9g/X9axYa+h8L /a3dDS9EvqikbPcQRGP5bYHi1yn8cTrxgr4Uk4/x4F96cJKC4q1knQUBKVpovFsy VdIXZqTqQuu9WmQEJ+Xi21mYbZKM7w985g9rfpnlYB/VoAJmaKue8qAqsg8dZzAp py+eVb7uTFqYpM53froi05jV2u4YiEhuK2lwhVG3M6diQjHqDzj2BqPo/zMgD6kJ lCu6bWlR9B/XQkSdwjy2eNE81hFAc/P0hGUQhfTy1CMFABCjIqP6wJdMdkCB2Maf q6T9Gj/Y8jcxiHrj7d31w== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefgedrtddtgdduheegieefucetufdoteggodetrf dotffvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfurfetoffkrfgpnffqhgenuceu rghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujf gurhephfffufggtgfgkfhfjgfvvefosehtjeertdertdejnecuhfhrohhmpeflrghnnhgv ucfirhhunhgruhcuoehjsehjrghnnhgruhdrnhgvtheqnecuggftrfgrthhtvghrnhepfe ehheeileduffehteeihfdvtdelffdutdeludduiedutedvfeffheekhefgtedtnecuvehl uhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepjhesjhgrnhhnrg hurdhnvghtpdhnsggprhgtphhtthhopeduuddpmhhouggvpehsmhhtphhouhhtpdhrtghp thhtohepthhglhigsehlihhnuhhtrhhonhhigidruggvpdhrtghpthhtohepnhgvrghlse hgohhmphgrrdguvghvpdhrtghpthhtohepshhvvghnsehkvghrnhgvlhdrohhrghdprhgt phhtthhopegtohhnohhrodgutheskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepuggvvh hitggvthhrvggvsehvghgvrhdrkhgvrhhnvghlrdhorhhgpdhrtghpthhtoheprhhosghh sehkvghrnhgvlhdrohhrghdprhgtphhtthhopegrshgrhhhisehlihhsthhsrdhlihhnuh igrdguvghvpdhrtghpthhtoheplhhinhhugidqkhgvrhhnvghlsehvghgvrhdrkhgvrhhn vghlrdhorhhgpdhrtghpthhtohepkhhriihkodgutheskhgvrhhnvghlrdhorhhg X-ME-Proxy: Feedback-ID: i47b949f6:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 25 Jan 2026 06:08:53 -0500 (EST) From: Janne Grunau Date: Sun, 25 Jan 2026 12:08:46 +0100 Subject: [PATCH 2/2] irqchip/apple-aic: Add support for "apple,t8122-aic3" Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260125-irq-apple-aic3-v1-2-a2afe66a6ab9@jannau.net> References: <20260125-irq-apple-aic3-v1-0-a2afe66a6ab9@jannau.net> In-Reply-To: <20260125-irq-apple-aic3-v1-0-a2afe66a6ab9@jannau.net> To: Sven Peter , Neal Gompa , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Janne Grunau X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3286; i=j@jannau.net; s=yk2025; h=from:subject:message-id; bh=JvpkSqkCKQ8P/Z3/vU6T2eD2nWK9FDSzmVzke/AumI8=; b=owGbwMvMwCW2UNrmdq9+ahrjabUkhszSn/tZby9xDl6768LilIW2yVLqV1/7ypnJvvh2Xs1Lv lftZ7pnRykLgxgXg6yYIkuS9ssOhtU1ijG1D8Jg5rAygQxh4OIUgIl03Gb4xZTpcODWwmDDS7FG 29wfJQjs2+DXPG9SsE9cOrtN8iOFfkaGVWbbXiiJpjxYIb10Ql3mW6/IVcevtgvpGBjt/LfQbWo BHwA= X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 Introduce support for the new AICv3 hardware block in t8122 and t603x SoCs. AICv3 is similar to AICv2 but has an increased IRQ config offset. These MMIO offsets are coded as properties of the "aic,3" node in Apple's device tree. The actual offsets are the same for all SoCs starting from M3 through at least M5. So do not bother to follow suit but use AICv3 specific defines in the driver. The compatible string is SoC specific so future SoCs with AICv3 and different offsets would just use their own compatible string as base and add their new offsets. Signed-off-by: Janne Grunau Reviewed-by: Sven Peter --- drivers/irqchip/irq-apple-aic.c | 27 +++++++++++++++++++++++++-- 1 file changed, 25 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/irq-apple-aic.c b/drivers/irqchip/irq-apple-ai= c.c index 3c70364e7cddd6ed6285595f136146ab04b897b2..f4efc325bebad1ae6119aa4eab4= 7819a267da207 100644 --- a/drivers/irqchip/irq-apple-aic.c +++ b/drivers/irqchip/irq-apple-aic.c @@ -54,6 +54,7 @@ #include #include #include +#include #include #include #include @@ -134,8 +135,15 @@ =20 #define AIC2_IRQ_CFG 0x2000 =20 +/* + * AIC v3 registers (MMIO) + */ + +#define AIC3_IRQ_CFG 0x10000 + /* * AIC2 registers are laid out like this, starting at AIC2_IRQ_CFG: + * AIC3 registers use the same layout but start at AIC3_IRQ_CFG: * * Repeat for each die: * IRQ_CFG: u32 * MAX_IRQS @@ -293,6 +301,15 @@ static const struct aic_info aic2_info __initconst =3D= { .local_fast_ipi =3D true, }; =20 +static const struct aic_info aic3_info __initconst =3D { + .version =3D 3, + + .irq_cfg =3D AIC3_IRQ_CFG, + + .fast_ipi =3D true, + .local_fast_ipi =3D true, +}; + static const struct of_device_id aic_info_match[] =3D { { .compatible =3D "apple,t8103-aic", @@ -310,6 +327,10 @@ static const struct of_device_id aic_info_match[] =3D { .compatible =3D "apple,aic2", .data =3D &aic2_info, }, + { + .compatible =3D "apple,t8122-aic3", + .data =3D &aic3_info, + }, {} }; =20 @@ -620,7 +641,7 @@ static int aic_irq_domain_map(struct irq_domain *id, un= signed int irq, u32 type =3D FIELD_GET(AIC_EVENT_TYPE, hw); struct irq_chip *chip =3D &aic_chip; =20 - if (ic->info.version =3D=3D 2) + if (ic->info.version =3D=3D 2 || ic->info.version =3D=3D 3) chip =3D &aic2_chip; =20 if (type =3D=3D AIC_EVENT_TYPE_IRQ) { @@ -991,6 +1012,7 @@ static int __init aic_of_ic_init(struct device_node *n= ode, struct device_node *p =20 break; } + case 3: case 2: { u32 info1, info3; =20 @@ -1065,7 +1087,7 @@ static int __init aic_of_ic_init(struct device_node *= node, struct device_node *p off +=3D irqc->info.die_stride; } =20 - if (irqc->info.version =3D=3D 2) { + if (irqc->info.version =3D=3D 2 || irqc->info.version =3D=3D 3) { u32 config =3D aic_ic_read(irqc, AIC2_CONFIG); =20 config |=3D AIC2_CONFIG_ENABLE; @@ -1116,3 +1138,4 @@ static int __init aic_of_ic_init(struct device_node *= node, struct device_node *p =20 IRQCHIP_DECLARE(apple_aic, "apple,aic", aic_of_ic_init); IRQCHIP_DECLARE(apple_aic2, "apple,aic2", aic_of_ic_init); +IRQCHIP_DECLARE(apple_aic3, "apple,t8122-aic3", aic_of_ic_init); --=20 2.52.0