From nobody Sat Feb 7 06:21:49 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C560326A1AC; Fri, 23 Jan 2026 17:28:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.8 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769189284; cv=none; b=HapdZMIbBMzy5dtfLGp7cKqHm0swNWPhFfddreplwfD/Jmcu8h9FSwNDM8+z19BpfNk6fXUh5eApZVRzp0oIuL3GB+Co5xByrJySsA+9wtevrRHOLddamzGGs1mPgEIJgboenUB5djPL3ffasi9/jPS05nx3uXeyh3+EbgP4QHM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769189284; c=relaxed/simple; bh=Iv5i8DsD51z255Wp5efjY/QB/u7emfdYZlwRjTJIGZI=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=lFkjZZN9GMatKGBBRc8EmYx1NmPw3Ob/RsV4gM58eMITrPaKRKECbYxOL6+yce2diKzrWhqJN0BRb0lAaeM1P3zzpuvO9V123ZF2vsfPzYvywmrCdHRlYhLvYPHZH1touK1+LLgURH2edGzhWwccdrNB5M5Dt2QdVjez+OmdCsw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=kv+Y0bKW; arc=none smtp.client-ip=192.198.163.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="kv+Y0bKW" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1769189283; x=1800725283; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Iv5i8DsD51z255Wp5efjY/QB/u7emfdYZlwRjTJIGZI=; b=kv+Y0bKWtabsEIysGUimk4S3rFJ1PcEBo6ZMS2yI4GdZ9TBdlRMhWpcZ m70EpApucG/r9oBKeTcS2urFGBgUTFRPdhVWCSs/71JjjGORJnnacOz94 4VfcAuDhynf+7Exn5IyTNQAdtMtlc154/G4rNQTIiCUx5QJ0Lk9oVpfsz eM6lh9vnABRB0efFXuJszgPYoKp5LTbHx31JUY28rh/WvDaCg6+iLbZsJ xyNh2jytFjuiymwd9bcB+Vqmuxjp5DhfVXlLdO9FQnuXmdxTLHoSamG3C YIt/ol0SyHspoak8J7yD769hP3V8IuRhj/achN46P8hZ9oF0y9IrzNRDe Q==; X-CSE-ConnectionGUID: tHblm7aFT4moe1YKGyrfmg== X-CSE-MsgGUID: VGCG6VQmQpqdz+kMkhlbvg== X-IronPort-AV: E=McAfee;i="6800,10657,11680"; a="88020906" X-IronPort-AV: E=Sophos;i="6.21,248,1763452800"; d="scan'208";a="88020906" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jan 2026 09:28:02 -0800 X-CSE-ConnectionGUID: VVgv4me9QXWgnn7hPnjTxw== X-CSE-MsgGUID: UIc27FmNRAimXXr3echXIg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,248,1763452800"; d="scan'208";a="211580928" Received: from ijarvine-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.244.164]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jan 2026 09:27:58 -0800 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= To: Greg Kroah-Hartman , Jiri Slaby , linux-serial@vger.kernel.org, Andy Shevchenko , qianfan Zhao , Adriana Nicolae , linux-kernel@vger.kernel.org Cc: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , "Bandal, Shankar" , "Murthy, Shanth" Subject: [PATCH 1/6] serial: 8250: Protect LCR write in shutdown Date: Fri, 23 Jan 2026 19:27:34 +0200 Message-Id: <20260123172739.13410-2-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260123172739.13410-1-ilpo.jarvinen@linux.intel.com> References: <20260123172739.13410-1-ilpo.jarvinen@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The 8250_dw driver needs to potentially perform very complex operations during LCR writes because its BUSY handling prevents updates to LCR while UART is BUSY (which is not fully under our control without those complex operations). Thus, LCR writes should occur under port's lock. Move LCR write under port's lock in serial8250_do_shutdown(). Also split the LCR RMW so that the logic is on a separate line for clarity. Tested-by: "Bandal, Shankar" Tested-by: "Murthy, Shanth" Signed-off-by: Ilpo J=C3=A4rvinen --- drivers/tty/serial/8250/8250_port.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/= 8250_port.c index 719faf92aa8a..f7a3c5555204 100644 --- a/drivers/tty/serial/8250/8250_port.c +++ b/drivers/tty/serial/8250/8250_port.c @@ -2350,6 +2350,7 @@ static int serial8250_startup(struct uart_port *port) void serial8250_do_shutdown(struct uart_port *port) { struct uart_8250_port *up =3D up_to_u8250p(port); + u32 lcr; =20 serial8250_rpm_get(up); /* @@ -2376,13 +2377,13 @@ void serial8250_do_shutdown(struct uart_port *port) port->mctrl &=3D ~TIOCM_OUT2; =20 serial8250_set_mctrl(port, port->mctrl); + + /* Disable break condition */ + lcr =3D serial_port_in(port, UART_LCR); + lcr &=3D ~UART_LCR_SBC; + serial_port_out(port, UART_LCR, lcr); } =20 - /* - * Disable break condition and FIFOs - */ - serial_port_out(port, UART_LCR, - serial_port_in(port, UART_LCR) & ~UART_LCR_SBC); serial8250_clear_fifos(up); =20 rsa_disable(up); --=20 2.39.5 From nobody Sat Feb 7 06:21:49 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E9B922FE578; Fri, 23 Jan 2026 17:28:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.8 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769189293; cv=none; b=bceqLGqV9hIBlNFExohRxudLAw+jOoeEab01vatCXDFwMMPx0AAItsEAY3eJ5L/c2YaGszbKUb9phfNQCLBg1yXMu51zm7p97KRhtT9XFdA7Zi0YIL/dcYm8XrPoyu8zQg5CU0f0FF/A0IGpZFKXyY8rCaP0ZmkWBLoFaqsBIg4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769189293; c=relaxed/simple; bh=jiuK9aLZnkoNECfZhRCc43h+6qeyyruzMVhcy2p1Dsk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=GqAtIqZU7tMLOLwFnWVfI8dLJmzbQ8Mbr43PBGPaeE2X1ocEstlC9puK6hxX8CmiEcBvG3qyI7l5S+4EfdYzTLX3ME8oa3V5FRnvOR0N02Q3i7UqBDOOAgtHACAcJPI2xn5uIeALj88L2zD8dAQHClu+MXN0ZcOsU5s68Ibs81U= ARC-Authentication-Results: i=1; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable When DW UART is configured with BUSY flag, LCR writes may not always succeed which can make any LCR write complex and very expensive. Performing write directly can trigger IRQ and the driver has to perform complex and distruptive sequence while retrying the write. Therefore, it's better to avoid doing LCR write that would not change the value of the LCR register. Add LCR write avoidance code into the 8250_dw driver's serial_out functions. Reported-by: "Bandal, Shankar" Tested-by: "Bandal, Shankar" Tested-by: "Murthy, Shanth" Signed-off-by: Ilpo J=C3=A4rvinen --- drivers/tty/serial/8250/8250_dw.c | 32 +++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/82= 50_dw.c index 27af83f0ff46..57a760b43da9 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -181,6 +181,23 @@ static void dw8250_check_lcr(struct uart_port *p, unsi= gned int offset, u32 value */ } =20 +/* + * With BUSY, LCR writes can be very expensive (IRQ + complex retry logic). + * If the write would not change the value of the LCR register, skip write + * entirely. + */ +static bool dw8250_can_skip_reg_write(struct uart_port *p, unsigned int of= fset, u32 value) +{ + struct dw8250_data *d =3D to_dw8250_data(p->private_data); + u32 lcr; + + if (offset !=3D UART_LCR || d->uart_16550_compatible) + return false; + + lcr =3D serial_port_in(p, offset); + return lcr =3D=3D value; +} + /* Returns once the transmitter is empty or we run out of retries */ static void dw8250_tx_wait_empty(struct uart_port *p) { @@ -207,12 +224,18 @@ static void dw8250_tx_wait_empty(struct uart_port *p) =20 static void dw8250_serial_out(struct uart_port *p, unsigned int offset, u3= 2 value) { + if (dw8250_can_skip_reg_write(p, offset, value)) + return; + writeb(value, p->membase + (offset << p->regshift)); dw8250_check_lcr(p, offset, value); } =20 static void dw8250_serial_out38x(struct uart_port *p, unsigned int offset,= u32 value) { + if (dw8250_can_skip_reg_write(p, offset, value)) + return; + /* Allow the TX to drain before we reconfigure */ if (offset =3D=3D UART_LCR) dw8250_tx_wait_empty(p); @@ -237,6 +260,9 @@ static u32 dw8250_serial_inq(struct uart_port *p, unsig= ned int offset) =20 static void dw8250_serial_outq(struct uart_port *p, unsigned int offset, u= 32 value) { + if (dw8250_can_skip_reg_write(p, offset, value)) + return; + value &=3D 0xff; __raw_writeq(value, p->membase + (offset << p->regshift)); /* Read back to ensure register write ordering. */ @@ -248,6 +274,9 @@ static void dw8250_serial_outq(struct uart_port *p, uns= igned int offset, u32 val =20 static void dw8250_serial_out32(struct uart_port *p, unsigned int offset, = u32 value) { + if (dw8250_can_skip_reg_write(p, offset, value)) + return; + writel(value, p->membase + (offset << p->regshift)); dw8250_check_lcr(p, offset, value); } @@ -261,6 +290,9 @@ static u32 dw8250_serial_in32(struct uart_port *p, unsi= gned int offset) =20 static void dw8250_serial_out32be(struct uart_port *p, unsigned int offset= , u32 value) { + if (dw8250_can_skip_reg_write(p, offset, value)) + return; + iowrite32be(value, p->membase + (offset << p->regshift)); dw8250_check_lcr(p, offset, value); } --=20 2.39.5 From nobody Sat Feb 7 06:21:49 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DDB602F3636; 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X-CSE-ConnectionGUID: GoJmpA6vQtuINzySdgyoVw== X-CSE-MsgGUID: IhhK6V58TYaUr6PFjy7jGA== X-IronPort-AV: E=McAfee;i="6800,10657,11680"; a="88020974" X-IronPort-AV: E=Sophos;i="6.21,248,1763452800"; d="scan'208";a="88020974" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jan 2026 09:28:20 -0800 X-CSE-ConnectionGUID: Zh7IO9GpQiKX5z7KdpR1Mg== X-CSE-MsgGUID: zpnjGPgdR8qXDtCofnPxdQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,248,1763452800"; d="scan'208";a="211581056" Received: from ijarvine-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.244.164]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jan 2026 09:28:16 -0800 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= To: Greg Kroah-Hartman , Jiri Slaby , linux-serial@vger.kernel.org, Andy Shevchenko , qianfan Zhao , Adriana Nicolae , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , linux-kernel@vger.kernel.org Cc: "Bandal, Shankar" , "Murthy, Shanth" Subject: [PATCH 3/6] serial: 8250_dw: Rework dw8250_handle_irq() locking and IIR handling Date: Fri, 23 Jan 2026 19:27:36 +0200 Message-Id: <20260123172739.13410-4-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260123172739.13410-1-ilpo.jarvinen@linux.intel.com> References: <20260123172739.13410-1-ilpo.jarvinen@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable dw8250_handle_irq() takes port's lock multiple times with no good reason to release it in between and calls serial8250_handle_irq() that also takes port's lock. As serial8250_handle_irq() takes port's lock itself, create serial8250_handle_irq_locked() that allows caller to hold port's lock across the call. Take port's lock only once in dw8250_handle_irq() and call serial8250_handle_irq_locked() directly. As IIR_NO_INT check in serial8250_handle_irq() was outside of port's lock, it has to be done already in dw8250_handle_irq(). DW UART can, in addition to IIR_NO_INT, report BUSY_DETECT (0x7) which collided with the IIR_NO_INT (0x1) check in serial8250_handle_irq() (because & is used instead of =3D=3D) meaning that no other work is done by serial8250_handle_irq() during an BUSY_DETECT interrupt. This allows reorganizing code in dw8250_handle_irq() to do both IIR_NO_INT and BUSY_DETECT handling right at the start simplifying the logic. Tested-by: "Bandal, Shankar" Tested-by: "Murthy, Shanth" Signed-off-by: Ilpo J=C3=A4rvinen --- drivers/tty/serial/8250/8250_dw.c | 35 ++++++++++++++++------------- drivers/tty/serial/8250/8250_port.c | 24 +++++++++++++------- include/linux/serial_8250.h | 1 + 3 files changed, 36 insertions(+), 24 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/82= 50_dw.c index 57a760b43da9..7cee89f14179 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -9,6 +9,8 @@ * LCR is written whilst busy. If it is, then a busy detect interrupt is * raised, the LCR needs to be rewritten and the uart status register read. */ +#include +#include #include #include #include @@ -40,6 +42,8 @@ #define RZN1_UART_RDMACR 0x110 /* DMA Control Register Receive Mode */ =20 /* DesignWare specific register fields */ +#define DW_UART_IIR_IID GENMASK(3, 0) + #define DW_UART_MCR_SIRE BIT(6) =20 /* Renesas specific register fields */ @@ -313,7 +317,19 @@ static int dw8250_handle_irq(struct uart_port *p) bool rx_timeout =3D (iir & 0x3f) =3D=3D UART_IIR_RX_TIMEOUT; unsigned int quirks =3D d->pdata->quirks; unsigned int status; - unsigned long flags; + + switch (FIELD_GET(DW_UART_IIR_IID, iir)) { + case UART_IIR_NO_INT: + return 0; + + case UART_IIR_BUSY: + /* Clear the USR */ + serial_port_in(p, d->pdata->usr_reg); + + return 1; + } + + guard(uart_port_lock_irqsave)(p); =20 /* * There are ways to get Designware-based UARTs into a state where @@ -326,20 +342,15 @@ static int dw8250_handle_irq(struct uart_port *p) * so we limit the workaround only to non-DMA mode. */ if (!up->dma && rx_timeout) { - uart_port_lock_irqsave(p, &flags); status =3D serial_lsr_in(up); =20 if (!(status & (UART_LSR_DR | UART_LSR_BI))) serial_port_in(p, UART_RX); - - uart_port_unlock_irqrestore(p, flags); } =20 /* Manually stop the Rx DMA transfer when acting as flow controller */ if (quirks & DW_UART_QUIRK_IS_DMA_FC && up->dma && up->dma->rx_running &&= rx_timeout) { - uart_port_lock_irqsave(p, &flags); status =3D serial_lsr_in(up); - uart_port_unlock_irqrestore(p, flags); =20 if (status & (UART_LSR_DR | UART_LSR_BI)) { dw8250_writel_ext(p, RZN1_UART_RDMACR, 0); @@ -347,17 +358,9 @@ static int dw8250_handle_irq(struct uart_port *p) } } =20 - if (serial8250_handle_irq(p, iir)) - return 1; - - if ((iir & UART_IIR_BUSY) =3D=3D UART_IIR_BUSY) { - /* Clear the USR */ - serial_port_in(p, d->pdata->usr_reg); + serial8250_handle_irq_locked(p, iir); =20 - return 1; - } - - return 0; + return 1; } =20 static void dw8250_clk_work_cb(struct work_struct *work) diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/= 8250_port.c index f7a3c5555204..02576ed30abb 100644 --- a/drivers/tty/serial/8250/8250_port.c +++ b/drivers/tty/serial/8250/8250_port.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -1782,20 +1783,16 @@ static bool handle_rx_dma(struct uart_8250_port *up= , unsigned int iir) } =20 /* - * This handles the interrupt from one port. + * Context: port's lock must be held by the caller. */ -int serial8250_handle_irq(struct uart_port *port, unsigned int iir) +void serial8250_handle_irq_locked(struct uart_port *port, unsigned int iir) { struct uart_8250_port *up =3D up_to_u8250p(port); struct tty_port *tport =3D &port->state->port; bool skip_rx =3D false; - unsigned long flags; u16 status; =20 - if (iir & UART_IIR_NO_INT) - return 0; - - uart_port_lock_irqsave(port, &flags); + lockdep_assert_held_once(&port->lock); =20 status =3D serial_lsr_in(up); =20 @@ -1828,8 +1825,19 @@ int serial8250_handle_irq(struct uart_port *port, un= signed int iir) else if (!up->dma->tx_running) __stop_tx(up); } +} +EXPORT_SYMBOL_GPL(serial8250_handle_irq_locked); =20 - uart_unlock_and_check_sysrq_irqrestore(port, flags); +/* + * This handles the interrupt from one port. + */ +int serial8250_handle_irq(struct uart_port *port, unsigned int iir) +{ + if (iir & UART_IIR_NO_INT) + return 0; + + guard(uart_port_lock_irqsave)(port); + serial8250_handle_irq_locked(port, iir); =20 return 1; } diff --git a/include/linux/serial_8250.h b/include/linux/serial_8250.h index 01efdce0fda0..a95b2d143d24 100644 --- a/include/linux/serial_8250.h +++ b/include/linux/serial_8250.h @@ -195,6 +195,7 @@ void serial8250_do_set_mctrl(struct uart_port *port, un= signed int mctrl); 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d="scan'208";a="206326603" Received: from ijarvine-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.244.164]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jan 2026 09:28:28 -0800 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= To: Greg Kroah-Hartman , Jiri Slaby , linux-serial@vger.kernel.org, Andy Shevchenko , qianfan Zhao , Adriana Nicolae , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , linux-kernel@vger.kernel.org Cc: "Bandal, Shankar" , "Murthy, Shanth" Subject: [PATCH 4/6] serial: 8250_dw: Rework IIR_NO_INT handling to stop interrupt storm Date: Fri, 23 Jan 2026 19:27:37 +0200 Message-Id: <20260123172739.13410-5-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260123172739.13410-1-ilpo.jarvinen@linux.intel.com> References: <20260123172739.13410-1-ilpo.jarvinen@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable INTC10EE UART can end up into an interrupt storm where it reports IIR_NO_INT (0x1). If the storm happens during active UART operation, it is promptly stopped by IIR value change due to Rx or Tx events. However, when there is no activity, either due to idle serial line or due to specific circumstances such as during shutdown that writes IER=3D0, there is nothing to stop the storm. During shutdown the storm is particularly problematic because serial8250_do_shutdown() calls synchronize_irq() that will hang in waiting for the storm to finish which never happens. This problem can also result in triggering a warning: irq 45: nobody cared (try booting with the "irqpoll" option) [...snip...] handlers: serial8250_interrupt Disabling IRQ #45 Normal means to reset interrupt status by reading LSR, MSR, USR, or RX register do not result in the UART deasserting the IRQ. Add a quirk to INTC10EE UARTs to enable Tx interrupts if UART's Tx is currently empty and inactive. Rework IIR_NO_INT to keep track of the number of consecutive IIR_NO_INT, and on third one perform the quirk. Enabling Tx interrupts should change IIR value from IIR_NO_INT to IIR_THRI which has been observed to stop the storm. Reported-by: "Bandal, Shankar" Tested-by: "Bandal, Shankar" Tested-by: "Murthy, Shanth" Signed-off-by: Ilpo J=C3=A4rvinen --- drivers/tty/serial/8250/8250_dw.c | 60 ++++++++++++++++++++++++++++--- 1 file changed, 56 insertions(+), 4 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/82= 50_dw.c index 7cee89f14179..a40c0851f39c 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -60,6 +60,7 @@ #define DW_UART_QUIRK_IS_DMA_FC BIT(3) #define DW_UART_QUIRK_APMC0D08 BIT(4) #define DW_UART_QUIRK_CPR_VALUE BIT(5) +#define DW_UART_QUIRK_IER_KICK BIT(6) =20 struct dw8250_platform_data { u8 usr_reg; @@ -81,6 +82,8 @@ struct dw8250_data { =20 unsigned int skip_autocfg:1; unsigned int uart_16550_compatible:1; + + u64 no_int_count; }; =20 static inline struct dw8250_data *to_dw8250_data(struct dw8250_port_data *= data) @@ -308,6 +311,29 @@ static u32 dw8250_serial_in32be(struct uart_port *p, u= nsigned int offset) return dw8250_modify_msr(p, offset, value); } =20 +/* + * INTC10EE UART can IRQ storm while reporting IIR_NO_INT. Inducing IIR va= lue + * change has been observed to break the storm. + * + * If Tx is empty (THRE asserted), we use here IER_THRI to cause IIR_NO_IN= T -> + * IIR_THRI transition. + */ +static void dw8250_quirk_ier_kick(struct uart_port *p) +{ + struct uart_8250_port *up =3D up_to_u8250p(p); + u32 lsr; + + if (up->ier & UART_IER_THRI) + return; + + lsr =3D serial_lsr_in(up); + if (!(lsr & UART_LSR_THRE)) + return; + + serial_out(up, UART_IER, up->ier | UART_IER_THRI); + serial_in(up, UART_LCR); /* safe, no side-effects */ + serial_out(up, UART_IER, up->ier); +} =20 static int dw8250_handle_irq(struct uart_port *p) { @@ -318,18 +344,29 @@ static int dw8250_handle_irq(struct uart_port *p) unsigned int quirks =3D d->pdata->quirks; unsigned int status; =20 + guard(uart_port_lock_irqsave)(p); + switch (FIELD_GET(DW_UART_IIR_IID, iir)) { case UART_IIR_NO_INT: + if (d->uart_16550_compatible || up->dma) + return 0; + + d->no_int_count++; + if (d->no_int_count > 2 && quirks & DW_UART_QUIRK_IER_KICK) + dw8250_quirk_ier_kick(p); + return 0; =20 case UART_IIR_BUSY: /* Clear the USR */ serial_port_in(p, d->pdata->usr_reg); =20 + d->no_int_count =3D 0; + return 1; } =20 - guard(uart_port_lock_irqsave)(p); + d->no_int_count =3D 0; =20 /* * There are ways to get Designware-based UARTs into a state where @@ -562,6 +599,14 @@ static void dw8250_reset_control_assert(void *data) reset_control_assert(data); } =20 +static void dw8250_shutdown(struct uart_port *port) +{ + struct dw8250_data *d =3D to_dw8250_data(port->private_data); + + serial8250_do_shutdown(port); + d->no_int_count =3D 0; +} + static int dw8250_probe(struct platform_device *pdev) { struct uart_8250_port uart =3D {}, *up =3D &uart; @@ -685,10 +730,12 @@ static int dw8250_probe(struct platform_device *pdev) dw8250_quirks(p, data); =20 /* If the Busy Functionality is not implemented, don't handle it */ - if (data->uart_16550_compatible) + if (data->uart_16550_compatible) { p->handle_irq =3D NULL; - else if (data->pdata) + } else if (data->pdata) { p->handle_irq =3D dw8250_handle_irq; + p->shutdown =3D dw8250_shutdown; + } =20 dw8250_setup_dma_filter(p, data); =20 @@ -815,6 +862,11 @@ static const struct dw8250_platform_data dw8250_skip_s= et_rate_data =3D { .quirks =3D DW_UART_QUIRK_SKIP_SET_RATE, }; =20 +static const struct dw8250_platform_data dw8250_intc10ee =3D { + .usr_reg =3D DW_UART_USR, + .quirks =3D DW_UART_QUIRK_IER_KICK, +}; + static const struct of_device_id dw8250_of_match[] =3D { { .compatible =3D "snps,dw-apb-uart", .data =3D &dw8250_dw_apb }, { .compatible =3D "cavium,octeon-3860-uart", .data =3D &dw8250_octeon_386= 0_data }, @@ -844,7 +896,7 @@ static const struct acpi_device_id dw8250_acpi_match[] = =3D { { "INT33C5", (kernel_ulong_t)&dw8250_dw_apb }, { "INT3434", (kernel_ulong_t)&dw8250_dw_apb }, { "INT3435", (kernel_ulong_t)&dw8250_dw_apb }, - { "INTC10EE", (kernel_ulong_t)&dw8250_dw_apb }, + { "INTC10EE", (kernel_ulong_t)&dw8250_intc10ee }, { }, }; MODULE_DEVICE_TABLE(acpi, dw8250_acpi_match); --=20 2.39.5 From nobody Sat Feb 7 06:21:49 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D6F5630C62C; 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X-CSE-ConnectionGUID: 3z0hbM/fTW2H7R37Vyxblw== X-CSE-MsgGUID: ultqInyLTpiKhpdrle92tA== X-IronPort-AV: E=McAfee;i="6800,10657,11680"; a="73034689" X-IronPort-AV: E=Sophos;i="6.21,248,1763452800"; d="scan'208";a="73034689" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jan 2026 09:28:41 -0800 X-CSE-ConnectionGUID: 4OntvpuESQuTzmcsf2KtGw== X-CSE-MsgGUID: b5mrnIYwRISuOQsPV+fjzQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,248,1763452800"; d="scan'208";a="206326631" Received: from ijarvine-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.244.164]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jan 2026 09:28:37 -0800 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= To: Greg Kroah-Hartman , Jiri Slaby , linux-serial@vger.kernel.org, Andy Shevchenko , qianfan Zhao , Adriana Nicolae , linux-kernel@vger.kernel.org Cc: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , "Bandal, Shankar" , "Murthy, Shanth" Subject: [PATCH 5/6] serial: 8250: Add late synchronize_irq() to shutdown to handle DW UART BUSY Date: Fri, 23 Jan 2026 19:27:38 +0200 Message-Id: <20260123172739.13410-6-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260123172739.13410-1-ilpo.jarvinen@linux.intel.com> References: <20260123172739.13410-1-ilpo.jarvinen@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable When DW UART is !uart_16550_compatible, it can indicate BUSY at any point (when under constant Rx pressure) unless a complex sequence of steps is performed. Any LCR write can run a foul with the condition that prevents writing LCR while the UART is BUSY, which triggers BUSY_DETECT interrupt that seems unmaskable using IER bits. Normal flow is that dw8250_handle_irq() handles BUSY_DETECT condition by reading USR register. This BUSY feature, however, breaks the assumptions made in serial8250_do_shutdown(), which runs synchronize_irq() after clearing IER and assumes no interrupts can occur after that point but then proceeds to update LCR, which on DW UART can trigger an interrupt. If serial8250_do_shutdown() releases the interrupt handler before the handler has run and processed the BUSY_DETECT condition by read the USR register, the IRQ is not deasserted resulting in interrupt storm that triggers "irq x: nobody cared" warning leading to disabling the IRQ. Add late synchronize_irq() into serial8250_do_shutdown() to ensure BUSY_DETECT from DW UART is handled before port's interrupt handler is released. Alternative would be to add DW UART specific shutdown function but it would mostly duplicate the generic code and the extra synchronize_irq() seems pretty harmless in serial8250_do_shutdown(). Reported-by: "Bandal, Shankar" Tested-by: "Bandal, Shankar" Tested-by: "Murthy, Shanth" Signed-off-by: Ilpo J=C3=A4rvinen --- drivers/tty/serial/8250/8250_port.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/= 8250_port.c index 02576ed30abb..fa982e5cbe90 100644 --- a/drivers/tty/serial/8250/8250_port.c +++ b/drivers/tty/serial/8250/8250_port.c @@ -2401,6 +2401,12 @@ void serial8250_do_shutdown(struct uart_port *port) * the IRQ chain. */ serial_port_in(port, UART_RX); + /* + * LCR writes on DW UART can trigger late (unmaskable) IRQs. + * Handle them before releasing the handler. + */ + synchronize_irq(port->irq); + serial8250_rpm_put(up); =20 up->ops->release_irq(up); --=20 2.39.5 From nobody Sat Feb 7 06:21:49 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 02A3B302741; Fri, 23 Jan 2026 17:28:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769189335; cv=none; b=rTuPWP3yZDvMAxLb3bshgSRjkxru280+C2FVS50SkJgK58l+VeODUW/QFg/igdUt7/XnG06lyfCf4wtIyhqs/fv6ibUtq3kUfbMozaQD4IfDqCYC7Rv1vUUxsfQ0n1h4KQjf56EKcMPOmxvgt4zH+x/Wae0odx+xWtzHoQ48SyE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769189335; c=relaxed/simple; bh=DdzYzfgvJ/DWQr4zdbyNdqQqhddEIPM/zjS37cStY9Q=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=jXgRacintaYAClQEypQPmFzvqoKpM3/YxzWBQwJsj6MPkPAnFOTCsxC3dXihpqubMqmIdEa0lsBMgXI4XAf9s8DPfJsRHzpEs81lMUWDqAp1I12YQvSHkHnvwjQBMhKwtcMTftj0wr3aIbSzca7grs2MTDbafRaFw2dRVhZumkU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=XvUtsJva; arc=none smtp.client-ip=192.198.163.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="XvUtsJva" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1769189333; x=1800725333; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=DdzYzfgvJ/DWQr4zdbyNdqQqhddEIPM/zjS37cStY9Q=; b=XvUtsJvalDY4c8GaxVz0xwNpf/NjbqzYZxf3P/0fKpbytZkTWgXUwFl9 aFQWmWZcY/LVviiy+c9c6heyC9fqNi7BLZed/OfTWZJTWJ98cg13aGPXt dvaZwJZ8ypLfrn4vCiTOj/AO0NIHFQRXK5Rb+NVQI7q3DrtVk9c0vWpTr RE3c51JQmqmQfrTDMXAsBWJfwryxcXIIqROei1sYxVhr2cGItyyp8og6G HlH5HSXVjzZduwZXIoki3YmzR4HyAz1S6+dSki6KbB0W6U77C0jqOmf1I cz2TXpKMdlm2pNS3ZRtiG5tiQPiwfasdcdieJz3DMkovgYdb7RNxdHUQK A==; X-CSE-ConnectionGUID: Nz0PAfdtToyFnBbOOAUqiQ== X-CSE-MsgGUID: OIF5F2M3Sduv1yIpcU7AMg== X-IronPort-AV: E=McAfee;i="6800,10657,11680"; a="81816379" X-IronPort-AV: E=Sophos;i="6.21,248,1763452800"; d="scan'208";a="81816379" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jan 2026 09:28:52 -0800 X-CSE-ConnectionGUID: tGD+N8Z2RgqFYlwMDWRSIA== X-CSE-MsgGUID: XIWl0loESjqCLAcO/z0qdg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,248,1763452800"; d="scan'208";a="206326661" Received: from ijarvine-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.244.164]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jan 2026 09:28:47 -0800 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= To: Greg Kroah-Hartman , Jiri Slaby , linux-serial@vger.kernel.org, Andy Shevchenko , qianfan Zhao , Adriana Nicolae , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , Markus Mayer , Tim Kryger , Matt Porter , Heikki Krogerus , Jamie Iles , linux-kernel@vger.kernel.org Cc: stable@vger.kernel.org, "Bandal, Shankar" , "Murthy, Shanth" Subject: [PATCH 6/6] serial: 8250_dw: Ensure BUSY is deasserted Date: Fri, 23 Jan 2026 19:27:39 +0200 Message-Id: <20260123172739.13410-7-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260123172739.13410-1-ilpo.jarvinen@linux.intel.com> References: <20260123172739.13410-1-ilpo.jarvinen@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable DW UART cannot write to LCR, DLL, and DLH while BUSY is asserted. Existance of BUSY depends on uart_16550_compatible, if UART HW is configured with 16550 compatible those registers can always be written. There currently is dw8250_force_idle() which attempts to archive non-BUSY state by disabling FIFO, however, the solution is unreliable when Rx keeps getting more and more characters. Create a sequence of operations to enforce that ensures UART cannot keep BUSY asserted indefinitely. The new sequence relies on enabling loopback mode temporarily to prevent incoming Rx characters keeping UART BUSY. Ensure no Tx in ongoing while the UART is switches into the loopback mode (requires exporting serial8250_fifo_wait_for_lsr_thre() and adding DMA Tx pause/resume functions). According to tests performed by Adriana Nicolae , simply disabling FIFO or clearing FIFOs only once does not always ensure BUSY is deasserted but up to two tries may be needed. This could be related to ongoing Rx of a character (a guess, not known for sure). Therefore, retry FIFO clearing a few times (retry limit 4 is arbitrary number but using, e.g., p->fifosize seems overly large). Tests performed by others did not exhibit similar challenge but it does not seem harmful to leave the FIFO clearing loop in place for all DW UARTs with BUSY functionality. Use the new dw8250_idle_enter/exit() to do divisor writes and LCR writes. In case of plain LCR writes, opportunistically try to update LCR first and only invoke dw8250_idle_enter() if the write did not succeed (it has been observed that in practice most LCR writes do succeed without complications). This issue was first reported by qianfan Zhao who put lots of debugging effort into understanding the solution space. Fixes: c49436b657d0 ("serial: 8250_dw: Improve unwritable LCR workaround") Fixes: 7d4008ebb1c9 ("tty: add a DesignWare 8250 driver") Cc: Reported-by: qianfan Zhao Link: https://lore.kernel.org/linux-serial/289bb78a-7509-1c5c-2923-a04ed3b6= 487d@163.com/ Reported-by: Adriana Nicolae Link: https://lore.kernel.org/linux-serial/20250819182322.3451959-1-adriana= @arista.com/ Reported-by: "Bandal, Shankar" Tested-by: "Bandal, Shankar" Tested-by: "Murthy, Shanth" Signed-off-by: Ilpo J=C3=A4rvinen --- drivers/tty/serial/8250/8250.h | 25 ++++ drivers/tty/serial/8250/8250_dw.c | 172 ++++++++++++++++++++-------- drivers/tty/serial/8250/8250_port.c | 28 ++--- 3 files changed, 166 insertions(+), 59 deletions(-) diff --git a/drivers/tty/serial/8250/8250.h b/drivers/tty/serial/8250/8250.h index 8caecfc85d93..77fe0588fd6b 100644 --- a/drivers/tty/serial/8250/8250.h +++ b/drivers/tty/serial/8250/8250.h @@ -175,7 +175,9 @@ static unsigned int __maybe_unused serial_icr_read(stru= ct uart_8250_port *up, return value; } =20 +void serial8250_clear_fifos(struct uart_8250_port *p); void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p); +void serial8250_fifo_wait_for_lsr_thre(struct uart_8250_port *up, unsigned= int count); =20 void serial8250_rpm_get(struct uart_8250_port *p); void serial8250_rpm_put(struct uart_8250_port *p); @@ -400,6 +402,26 @@ static inline bool serial8250_tx_dma_running(struct ua= rt_8250_port *p) =20 return dma && dma->tx_running; } + +static inline void serial8250_tx_dma_pause(struct uart_8250_port *p) +{ + struct uart_8250_dma *dma =3D p->dma; + + if (!dma->tx_running) + return; + + dmaengine_pause(dma->txchan); +} + +static inline void serial8250_tx_dma_resume(struct uart_8250_port *p) +{ + struct uart_8250_dma *dma =3D p->dma; + + if (!dma->tx_running) + return; + + dmaengine_resume(dma->txchan); +} #else static inline int serial8250_tx_dma(struct uart_8250_port *p) { @@ -421,6 +443,9 @@ static inline bool serial8250_tx_dma_running(struct uar= t_8250_port *p) { return false; } + +static inline void serial8250_tx_dma_pause(struct uart_8250_port *p) { } +static inline void serial8250_tx_dma_resume(struct uart_8250_port *p) { } #endif =20 static inline int ns16550a_goto_highspeed(struct uart_8250_port *up) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/82= 50_dw.c index a40c0851f39c..8166ed15fd08 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -46,6 +47,8 @@ =20 #define DW_UART_MCR_SIRE BIT(6) =20 +#define DW_UART_USR_BUSY BIT(0) + /* Renesas specific register fields */ #define RZN1_UART_xDMACR_DMA_EN BIT(0) #define RZN1_UART_xDMACR_1_WORD_BURST (0 << 1) @@ -82,6 +85,7 @@ struct dw8250_data { =20 unsigned int skip_autocfg:1; unsigned int uart_16550_compatible:1; + unsigned int in_idle:1; =20 u64 no_int_count; }; @@ -115,77 +119,152 @@ static inline u32 dw8250_modify_msr(struct uart_port= *p, unsigned int offset, u3 } =20 /* - * This function is being called as part of the uart_port::serial_out() - * routine. Hence, it must not call serial_port_out() or serial_out() - * against the modified registers here, i.e. LCR. + * Ensure BUSY is not asserted. If DW UART is configured with + * !uart_16550_compatible, the writes to LCR, DLL, and DLH fail while + * BUSY is asserted. + * + * Context: port's lock must be held */ -static void dw8250_force_idle(struct uart_port *p) +static int dw8250_idle_enter(struct uart_port *p) { + struct dw8250_data *d =3D to_dw8250_data(p->private_data); struct uart_8250_port *up =3D up_to_u8250p(p); - unsigned int lsr; + unsigned int usr_reg =3D DW_UART_USR; + int retries; + u32 lsr; =20 - /* - * The following call currently performs serial_out() - * against the FCR register. Because it differs to LCR - * there will be no infinite loop, but if it ever gets - * modified, we might need a new custom version of it - * that avoids infinite recursion. - */ - serial8250_clear_and_reinit_fifos(up); + lockdep_assert_held_once(&p->lock); + + if (d->uart_16550_compatible) + return 0; + + if (d->pdata) + usr_reg =3D d->pdata->usr_reg; + + d->in_idle =3D 1; + + /* Prevent triggering interrupt from RBR filling */ + p->serial_out(p, UART_IER, 0); + + if (up->dma) { + serial8250_rx_dma_flush(up); + if (serial8250_tx_dma_running(up)) + serial8250_tx_dma_pause(up); + } =20 /* - * With PSLVERR_RESP_EN parameter set to 1, the device generates an - * error response when an attempt to read an empty RBR with FIFO - * enabled. + * Wait until Tx becomes empty + one extra frame time to ensure all bits + * have been sent on the wire. */ - if (up->fcr & UART_FCR_ENABLE_FIFO) { - lsr =3D serial_port_in(p, UART_LSR); - if (!(lsr & UART_LSR_DR)) - return; + serial8250_fifo_wait_for_lsr_thre(up, p->fifosize); + ndelay(p->frame_time); + + p->serial_out(p, UART_MCR, up->mcr | UART_MCR_LOOP); + + retries =3D 4; /* Arbitrary limit, 2 was always enough in tests */ + do { + serial8250_clear_fifos(up); + if (!(p->serial_in(p, usr_reg) & DW_UART_USR_BUSY)) + break; + ndelay(p->frame_time); + } while (--retries); + + lsr =3D serial_lsr_in(up); + if (lsr & UART_LSR_DR) { + p->serial_in(p, UART_RX); + up->lsr_saved_flags =3D 0; } =20 - serial_port_in(p, UART_RX); + /* Now guaranteed to have BUSY deasserted? Just sanity check */ + if (p->serial_in(p, usr_reg) & DW_UART_USR_BUSY) + return -EBUSY; + + return 0; +} + +static void dw8250_idle_exit(struct uart_port *p) +{ + struct dw8250_data *d =3D to_dw8250_data(p->private_data); + struct uart_8250_port *up =3D up_to_u8250p(p); + + if (d->uart_16550_compatible) + return; + + if (up->capabilities & UART_CAP_FIFO) + p->serial_out(p, UART_FCR, up->fcr); + p->serial_out(p, UART_MCR, up->mcr); + p->serial_out(p, UART_IER, up->ier); + + /* DMA Rx is restarted by IRQ handler as needed. */ + if (up->dma) + serial8250_tx_dma_resume(up); + + d->in_idle =3D 0; +} + +static void dw8250_set_divisor(struct uart_port *p, unsigned int baud, + unsigned int quot, unsigned int quot_frac) +{ + struct uart_8250_port *up =3D up_to_u8250p(p); + int ret; + + ret =3D dw8250_idle_enter(p); + if (ret < 0) + goto idle_failed; + + p->serial_out(p, UART_LCR, up->lcr | UART_LCR_DLAB); + if (!(p->serial_in(p, UART_LCR) & UART_LCR_DLAB)) + goto idle_failed; + + serial_dl_write(up, quot); + p->serial_out(p, UART_LCR, up->lcr); + +idle_failed: + dw8250_idle_exit(p); } =20 /* * This function is being called as part of the uart_port::serial_out() - * routine. Hence, it must not call serial_port_out() or serial_out() - * against the modified registers here, i.e. LCR. + * routine. Hence, special care must be taken when serial_port_out() or + * serial_out() against the modified registers here, i.e. LCR (d->in_idle = is + * used to break recursion loop). */ static void dw8250_check_lcr(struct uart_port *p, unsigned int offset, u32= value) { struct dw8250_data *d =3D to_dw8250_data(p->private_data); - void __iomem *addr =3D p->membase + (offset << p->regshift); - int tries =3D 1000; + u32 lcr; + int ret; =20 if (offset !=3D UART_LCR || d->uart_16550_compatible) return; =20 - /* Make sure LCR write wasn't ignored */ - while (tries--) { - u32 lcr =3D serial_port_in(p, offset); + lcr =3D p->serial_in(p, UART_LCR); =20 - if ((value & ~UART_LCR_SPAR) =3D=3D (lcr & ~UART_LCR_SPAR)) - return; + /* Make sure LCR write wasn't ignored */ + if ((value & ~UART_LCR_SPAR) =3D=3D (lcr & ~UART_LCR_SPAR)) + return; =20 - dw8250_force_idle(p); + if (d->in_idle) { + /* + * FIXME: this deadlocks if port->lock is already held + * dev_err(p->dev, "Couldn't set LCR to %d\n", value); + */ + return; + } =20 -#ifdef CONFIG_64BIT - if (p->type =3D=3D PORT_OCTEON) - __raw_writeq(value & 0xff, addr); - else -#endif - if (p->iotype =3D=3D UPIO_MEM32) - writel(value, addr); - else if (p->iotype =3D=3D UPIO_MEM32BE) - iowrite32be(value, addr); - else - writeb(value, addr); + ret =3D dw8250_idle_enter(p); + if (ret < 0) { + /* + * FIXME: this deadlocks if port->lock is already held + * dev_err(p->dev, "Couldn't set LCR to %d\n", value); + */ + goto idle_failed; } - /* - * FIXME: this deadlocks if port->lock is already held - * dev_err(p->dev, "Couldn't set LCR to %d\n", value); - */ + + p->serial_out(p, UART_LCR, value); + +idle_failed: + dw8250_idle_exit(p); } =20 /* @@ -627,6 +706,7 @@ static int dw8250_probe(struct platform_device *pdev) p->dev =3D dev; p->set_ldisc =3D dw8250_set_ldisc; p->set_termios =3D dw8250_set_termios; + p->set_divisor =3D dw8250_set_divisor; =20 data =3D devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); if (!data) diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/= 8250_port.c index fa982e5cbe90..d5ea0f08a854 100644 --- a/drivers/tty/serial/8250/8250_port.c +++ b/drivers/tty/serial/8250/8250_port.c @@ -489,7 +489,7 @@ serial_port_out_sync(struct uart_port *p, int offset, i= nt value) /* * FIFO support. */ -static void serial8250_clear_fifos(struct uart_8250_port *p) +void serial8250_clear_fifos(struct uart_8250_port *p) { if (p->capabilities & UART_CAP_FIFO) { serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO); @@ -498,6 +498,7 @@ static void serial8250_clear_fifos(struct uart_8250_por= t *p) serial_out(p, UART_FCR, 0); } } +EXPORT_SYMBOL_GPL(serial8250_clear_fifos); =20 static enum hrtimer_restart serial8250_em485_handle_start_tx(struct hrtime= r *t); static enum hrtimer_restart serial8250_em485_handle_stop_tx(struct hrtimer= *t); @@ -3200,6 +3201,17 @@ void serial8250_set_defaults(struct uart_8250_port *= up) } EXPORT_SYMBOL_GPL(serial8250_set_defaults); =20 +void serial8250_fifo_wait_for_lsr_thre(struct uart_8250_port *up, unsigned= int count) +{ + unsigned int i; + + for (i =3D 0; i < count; i++) { + if (wait_for_lsr(up, UART_LSR_THRE)) + return; + } +} +EXPORT_SYMBOL_GPL(serial8250_fifo_wait_for_lsr_thre); + #ifdef CONFIG_SERIAL_8250_CONSOLE =20 static void serial8250_console_putchar(struct uart_port *port, unsigned ch= ar ch) @@ -3241,16 +3253,6 @@ static void serial8250_console_restore(struct uart_8= 250_port *up) serial8250_out_MCR(up, up->mcr | UART_MCR_DTR | UART_MCR_RTS); } =20 -static void fifo_wait_for_lsr(struct uart_8250_port *up, unsigned int coun= t) -{ - unsigned int i; - - for (i =3D 0; i < count; i++) { - if (wait_for_lsr(up, UART_LSR_THRE)) - return; - } -} - /* * Print a string to the serial port using the device FIFO * @@ -3269,7 +3271,7 @@ static void serial8250_console_fifo_write(struct uart= _8250_port *up, =20 while (s !=3D end) { /* Allow timeout for each byte of a possibly full FIFO */ - fifo_wait_for_lsr(up, fifosize); + serial8250_fifo_wait_for_lsr_thre(up, fifosize); =20 for (i =3D 0; i < fifosize && s !=3D end; ++i) { if (*s =3D=3D '\n' && !cr_sent) { @@ -3287,7 +3289,7 @@ static void serial8250_console_fifo_write(struct uart= _8250_port *up, * Allow timeout for each byte written since the caller will only wait * for UART_LSR_BOTH_EMPTY using the timeout of a single character */ - fifo_wait_for_lsr(up, tx_count); + serial8250_fifo_wait_for_lsr_thre(up, tx_count); } =20 /* --=20 2.39.5