From nobody Sat Feb 7 07:10:22 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6FCA1362129; Fri, 23 Jan 2026 15:00:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769180438; cv=none; b=OYj455xCK6UeBVjjMKUN0agt5b838rMscY84gkSnKXkQnplhBfKWxRTmAlwke7w9AzxaL4PyUYNH6GaUwo67Ttq8Y3HWiLel7fhI2Wji3SNI/jPzCKQMi6NvUDlShiyzajHOjJvKU4gWgkCe6GKUf5hkD/pauSyQJVdFE9+3F6Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769180438; c=relaxed/simple; bh=W/SuQAxt7ClBHx9qecLubHrb5FhNgT3NcUOt5cFlxEc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Lqg5uwXDWDgSo2o26aHysplLoHoxNDSZPo8DAqtjvmEAFKeRAT0Qp04pNdnuuRqZOWAQR3r34CEuW/Krc0WPrRlnr3hTngX/VERcVNI/3QMMi4H308S3I/FuKvSW9bMdQTjIO8toe1vtcIyTAQghFZlaC/FUu2Ye+otUocIGWeQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=E4EcoqV4; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="E4EcoqV4" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1769180436; x=1800716436; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=W/SuQAxt7ClBHx9qecLubHrb5FhNgT3NcUOt5cFlxEc=; b=E4EcoqV4RQTQ3+xRB01hMkGGSkfwo8jJALjYvMAxSa1/1QgFQHT+2KCf +Zs3kVpatA/WbnQ0V/PuSP5YZOCAaeX4y/Eq53H7payXqfkPzacCLVSUL orH5/pMq+iTX9ANHGorgUMIjbY8pxaZofKNKHXt8nG4h62X2keRc5UxHr OQtAeY69yxFHyRn57LNWKxCtgyrZBWu9HOen0An2XyfIR5kIGTp57AKuT ToU7zBGOAdoBzW6qN4T/r0yATb8Mf7ZD32K5O1nMAhSi2llSPcfmI9J79 UrtktWazz6Dn3hmIX43MyOviHQnlNhPlI7JIw3EZJVF9mXwMeD6K1dkDL Q==; X-CSE-ConnectionGUID: zO6HZXIEQNOOIO+6uz+aTw== X-CSE-MsgGUID: o92uHkHzRN2fArADy1Hk5A== X-IronPort-AV: E=McAfee;i="6800,10657,11680"; a="70334496" X-IronPort-AV: E=Sophos;i="6.21,248,1763452800"; d="scan'208";a="70334496" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jan 2026 07:00:18 -0800 X-CSE-ConnectionGUID: 2XrvhoCXT7SVFEQgT9a3sA== X-CSE-MsgGUID: AmhIpe1pTmaa59UY/q4DCg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,248,1763452800"; d="scan'208";a="237697190" Received: from 984fee019967.jf.intel.com ([10.23.153.244]) by orviesa002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jan 2026 07:00:18 -0800 From: Chao Gao To: linux-coco@lists.linux.dev, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, x86@kernel.org Cc: reinette.chatre@intel.com, ira.weiny@intel.com, kai.huang@intel.com, dan.j.williams@intel.com, yilun.xu@linux.intel.com, sagis@google.com, vannapurve@google.com, paulmck@kernel.org, nik.borisov@suse.com, zhenzhong.duan@intel.com, seanjc@google.com, rick.p.edgecombe@intel.com, kas@kernel.org, dave.hansen@linux.intel.com, vishal.l.verma@intel.com, Chao Gao , Farrah Chen , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" Subject: [PATCH v3 20/26] x86/virt/seamldr: Do TDX per-CPU initialization after updates Date: Fri, 23 Jan 2026 06:55:28 -0800 Message-ID: <20260123145645.90444-21-chao.gao@intel.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260123145645.90444-1-chao.gao@intel.com> References: <20260123145645.90444-1-chao.gao@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" After installing the new TDX module, each CPU should be initialized again to make the CPU ready to run any other SEAMCALLs. So, call tdx_cpu_enable() on all CPUs. Signed-off-by: Chao Gao Tested-by: Farrah Chen Reviewed-by: Tony Lindgren Reviewed-by: Xu Yilun --- arch/x86/virt/vmx/tdx/seamldr.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/x86/virt/vmx/tdx/seamldr.c b/arch/x86/virt/vmx/tdx/seamld= r.c index 13c34e6378e0..ee672f381dd5 100644 --- a/arch/x86/virt/vmx/tdx/seamldr.c +++ b/arch/x86/virt/vmx/tdx/seamldr.c @@ -239,6 +239,7 @@ enum tdp_state { TDP_START, TDP_SHUTDOWN, TDP_CPU_INSTALL, + TDP_CPU_INIT, TDP_DONE, }; =20 @@ -303,6 +304,9 @@ static int do_seamldr_install_module(void *seamldr_para= ms) scoped_guard(raw_spinlock, &seamldr_lock) ret =3D seamldr_call(P_SEAMLDR_INSTALL, &args); break; + case TDP_CPU_INIT: + ret =3D tdx_cpu_enable(); + break; default: break; } --=20 2.47.3