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Peter Anvin" Subject: [PATCH v3 13/26] x86/virt/seamldr: Allocate and populate a module update request Date: Fri, 23 Jan 2026 06:55:21 -0800 Message-ID: <20260123145645.90444-14-chao.gao@intel.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260123145645.90444-1-chao.gao@intel.com> References: <20260123145645.90444-1-chao.gao@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" A module update request is a struct used to describe information about the TDX module to install. It is part of the P-SEAMLDR <-> kernel ABI and is accepted by the SEAMLDR_INSTALL SEAMCALL. The request includes pointers to pages that contain the module binary, a pointer to a sigstruct file, and an update scenario. Define the request struct according to the P-SEAMLDR spec [1], and parse the bitstream from userspace to populate that struct for later module updates. Note that the bitstream format is specified in [2]. It consists of a header, a sigstruct, a module binary, and reserved fields for future extensions. The header includes fields like a simple checksum and a signature for error detection. Signed-off-by: Chao Gao Tested-by: Farrah Chen Link: https://cdrdv2.intel.com/v1/dl/getContent/733584 # [1] Link: https://github.com/intel/tdx-module-binaries/blob/main/blob_structure= .txt # [2] Reviewed-by: Tony Lindgren --- v3: - Print tdx_blob version in hex [Binbin] - Drop redundant sigstruct alignment check [Yilun] - Note buffers passed from firmware upload infrastructure are vmalloc()'d above alloc_seamldr_params() --- arch/x86/virt/vmx/tdx/seamldr.c | 158 ++++++++++++++++++++++++++++++++ 1 file changed, 158 insertions(+) diff --git a/arch/x86/virt/vmx/tdx/seamldr.c b/arch/x86/virt/vmx/tdx/seamld= r.c index d1d4f96c4963..d136ef89cd36 100644 --- a/arch/x86/virt/vmx/tdx/seamldr.c +++ b/arch/x86/virt/vmx/tdx/seamldr.c @@ -6,10 +6,12 @@ */ #define pr_fmt(fmt) "seamldr: " fmt =20 +#include #include #include #include #include +#include #include =20 #include @@ -19,6 +21,26 @@ /* P-SEAMLDR SEAMCALL leaf function */ #define P_SEAMLDR_INFO 0x8000000000000000 =20 +/* P-SEAMLDR can accept up to 496 4KB pages for TDX module binary */ +#define SEAMLDR_MAX_NR_MODULE_4KB_PAGES 496 + +/* scenario field in struct seamldr_params */ +#define SEAMLDR_SCENARIO_UPDATE 1 + +/* + * Passed to P-SEAMLDR to describe information about the TDX module to ins= tall. + * Defined in "SEAM Loader (SEAMLDR) Interface Specification", Revision + * 343755-003, Section 3.2. + */ +struct seamldr_params { + u32 version; + u32 scenario; + u64 sigstruct_pa; + u8 reserved[104]; + u64 num_module_pages; + u64 mod_pages_pa_list[SEAMLDR_MAX_NR_MODULE_4KB_PAGES]; +} __packed; + static struct seamldr_info seamldr_info __aligned(256); =20 static inline int seamldr_call(u64 fn, struct tdx_module_args *args) @@ -73,6 +95,137 @@ const struct seamldr_info *seamldr_get_info(void) } EXPORT_SYMBOL_FOR_MODULES(seamldr_get_info, "tdx-host"); =20 +static void free_seamldr_params(struct seamldr_params *params) +{ + free_page((unsigned long)params); +} + +/* + * Allocate and populate a seamldr_params. + * Note that both @module and @sig should be vmalloc'd memory. + */ +static struct seamldr_params *alloc_seamldr_params(const void *module, uns= igned int module_size, + const void *sig, unsigned int sig_size) +{ + struct seamldr_params *params; + const u8 *ptr; + int i; + + BUILD_BUG_ON(sizeof(struct seamldr_params) !=3D SZ_4K); + if (module_size > SEAMLDR_MAX_NR_MODULE_4KB_PAGES * SZ_4K) + return ERR_PTR(-EINVAL); + + if (!IS_ALIGNED(module_size, SZ_4K) || sig_size !=3D SZ_4K || + !IS_ALIGNED((unsigned long)module, SZ_4K) || + !IS_ALIGNED((unsigned long)sig, SZ_4K)) + return ERR_PTR(-EINVAL); + + params =3D (struct seamldr_params *)get_zeroed_page(GFP_KERNEL); + if (!params) + return ERR_PTR(-ENOMEM); + + params->scenario =3D SEAMLDR_SCENARIO_UPDATE; + + /* + * Don't assume @sig is page-aligned although it is 4KB-aligned. + * Always add the in-page offset to get the physical address. + */ + params->sigstruct_pa =3D (vmalloc_to_pfn(sig) << PAGE_SHIFT) + + ((unsigned long)sig & ~PAGE_MASK); + params->num_module_pages =3D module_size / SZ_4K; + + ptr =3D module; + for (i =3D 0; i < params->num_module_pages; i++) { + params->mod_pages_pa_list[i] =3D (vmalloc_to_pfn(ptr) << PAGE_SHIFT) + + ((unsigned long)ptr & ~PAGE_MASK); + ptr +=3D SZ_4K; + } + + return params; +} + +/* + * Intel TDX Module blob. Its format is defined at: + * https://github.com/intel/tdx-module-binaries/blob/main/blob_structure.t= xt + */ +struct tdx_blob { + u16 version; + u16 checksum; + u32 offset_of_module; + u8 signature[8]; + u32 len; + u32 resv1; + u64 resv2[509]; + u8 data[]; +} __packed; + +/* + * Verify that the checksum of the entire blob is zero. The checksum is + * calculated by summing up all 16-bit words, with carry bits dropped. + */ +static bool verify_checksum(const struct tdx_blob *blob) +{ + u32 size =3D blob->len; + u16 checksum =3D 0; + const u16 *p; + int i; + + /* Handle the last byte if the size is odd */ + if (size % 2) { + checksum +=3D *((const u8 *)blob + size - 1); + size--; + } + + p =3D (const u16 *)blob; + for (i =3D 0; i < size; i +=3D 2) { + checksum +=3D *p; + p++; + } + + return !checksum; +} + +static struct seamldr_params *init_seamldr_params(const u8 *data, u32 size) +{ + const struct tdx_blob *blob =3D (const void *)data; + int module_size, sig_size; + const void *sig, *module; + + if (blob->version !=3D 0x100) { + pr_err("unsupported blob version: %x\n", blob->version); + return ERR_PTR(-EINVAL); + } + + if (blob->resv1 || memchr_inv(blob->resv2, 0, sizeof(blob->resv2))) { + pr_err("non-zero reserved fields\n"); + return ERR_PTR(-EINVAL); + } + + /* Split the given blob into a sigstruct and a module */ + sig =3D blob->data; + sig_size =3D blob->offset_of_module - sizeof(struct tdx_blob); + module =3D data + blob->offset_of_module; + module_size =3D size - blob->offset_of_module; + + if (sig_size <=3D 0 || module_size <=3D 0 || blob->len !=3D size) + return ERR_PTR(-EINVAL); + + if (memcmp(blob->signature, "TDX-BLOB", 8)) { + pr_err("invalid signature\n"); + return ERR_PTR(-EINVAL); + } + + if (!verify_checksum(blob)) { + pr_err("invalid checksum\n"); + return ERR_PTR(-EINVAL); + } + + return alloc_seamldr_params(module, module_size, sig, sig_size); +} + +DEFINE_FREE(free_seamldr_params, struct seamldr_params *, + if (!IS_ERR_OR_NULL(_T)) free_seamldr_params(_T)) + /** * seamldr_install_module - Install a new TDX module * @data: Pointer to the TDX module binary data. It should be vmalloc'd @@ -94,6 +247,11 @@ int seamldr_install_module(const u8 *data, u32 size) if (!is_vmalloc_addr(data)) return -EINVAL; =20 + struct seamldr_params *params __free(free_seamldr_params) =3D + init_seamldr_params(data, size); + if (IS_ERR(params)) + return PTR_ERR(params); + guard(cpus_read_lock)(); if (!cpumask_equal(cpu_online_mask, cpu_present_mask)) { pr_err("Cannot update TDX module if any CPU is offline\n"); --=20 2.47.3