From nobody Mon Feb 9 12:02:02 2026 Received: from mail-wm1-f52.google.com (mail-wm1-f52.google.com [209.85.128.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 60B9C328623 for ; Fri, 23 Jan 2026 12:01:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769169696; cv=none; b=q5eiJMppiHIJPHtg2mIVHamNiGZjAo9Djlq3APlDAxSOAb1VvNt1/SD7KVplnwNwn8r6MMCdu6USEuj5W8HOxK0270M0kN1mFAhVTT5auVdUi2/FhSVdPihyJSFahM1m206srgI4np+KFGH3woPP1qjFDChUdjaif6AIbK1QacE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769169696; c=relaxed/simple; bh=argX+ekhVkmNswgZoOntqGB4oLHzgeu85h5GOyhgHik=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=VfM7DpbAxOiTm8TMBlOy+syD1DE8iYEVk7vHyCNLsWqoGco2vrf3Xmbrim999TMdXu9byXEQ2Dd024k5xi4Bfcfp+fpuUWzrW7WNtFYoEg9kL2pbmpPj//T/0meHMgWoy97KGOk/GLLWpbw0BcicZ+4a2zD14WfE4Os5C5oW2kI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=kfhG+Py1; arc=none smtp.client-ip=209.85.128.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="kfhG+Py1" Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-4801c1ad878so21719535e9.1 for ; Fri, 23 Jan 2026 04:01:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1769169692; x=1769774492; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=JSvgyOqp8b8U8Jk0c4U57aOF95Ym7PtbxT8UnBm+Rrs=; b=kfhG+Py1p10h8wyA0M6YHYWuzIiTcGVJNG2pu8nHJnwaNm0ID7pahvEFuBrlyEVpZl W6CPYIu0nxkpR1fqK/oPft0yY/e1LBW8IsSVD5F4JVulWW50wsivESHD+c4t657/qsgM +W5T9F2JBNOYfje4IP5xG3xhIQj2UlD77Vh0R802P096QOwLlvqaQFNoflyYNhxgNU7T C7yW459e1oSJr/6FpOH7tq13Sq0Dihoh6v32g1uhIAGsB6zf8U7ml4OoQlUrpBunvbAq 4iWF8aiy4nojQdmDslM6IuG67JppiljkcdKrxqxyfxR3zHJsWU/MVEpTxgGbVvkdF7Ut vaVA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1769169692; x=1769774492; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=JSvgyOqp8b8U8Jk0c4U57aOF95Ym7PtbxT8UnBm+Rrs=; b=paMu1bB/kQIBJhODCk0E2RvFiGVPiUQwqSTgQGZB4v4pTJ5eTuqSZLfKiVesLceEGu ZQesNtmYvsk9/b4b4qNW1NCu99UyGc+yTzsHUjj7MEqd9qwzgMAtOnXW4ljwtnQvblqo /EDdCEge/3mQHQASHP9xJ0g5EaBrW8RnNwEVSUtn1Y6xOPg+jPc7YS4eylqLBuxm2TDC pl1MWiL41Co9GRWQ3S0YNSyrAGwV9lEwZ6GxIwvarm5IbRUvgHlrkTVfBZUCdY+Dn9Sc 1xlN/QPVMfov4uMdSLRmFy4saxJuIlgbyX9hUmgqdVix84nYvurEjiklI/SoZ17jmh2E Bk5Q== X-Forwarded-Encrypted: i=1; AJvYcCXhBXFDGCtfGK9VNq6/voFoxddgSLmBWvF4WNy9Z7EFYrOJ3JvUNh9C2L/STu6Fhyl0Bq30X050EiIHMzI=@vger.kernel.org X-Gm-Message-State: AOJu0YwQixnwboulAw+SSBUPK/n2JrQ091FPZS2YZZIJwmPKwUK0QLYm 308kN2yX7O2L9wAuBA5c0q+VETNbSFcRJZ5htSvDQUzn0n4e6sMfdQuC X-Gm-Gg: AZuq6aKgXa04nZCChUTsVqsI0WnlGKwmuXSnG50wB4ZROz9yNZgNrbYC4oXWwklE5AV JaoD/Iwq9hoE01505iPdf+NVHDNxXcN2yOIB60e9ssztbOi5vB8QY/fU/tzWmRILBFVx1SkIKxu 1h94B5LyEYHds7Tt8FpxF0tgm4945W52Lha8tQJsgaBE+jpR8bwQJuR/T9EwsjrBo56811PQ2vF +zE8FGGPMQfNuI/f751WkZtlB7h65B9TzfD0rdP44WWhsd8uLOAtTQDmjDHeOtK2pF7nBSIr9vw 60/oQElV+rOe2vUOQ5DGpoA5aPkN6xtDgG8gNzE69kZ+i7OHKs4EbDfgt5Z1scYU8az3Lk2F7AF AxJEvnRcRaQN9oi+TEV7Ua85Jea6sc0HSgj6oMtmheHppbcWaLgyB19Yau/hUoaNrNtGP13hJxK XwCaY9WTG4RygZLv1L1nf4KGJCaQSi6oFLNgcqW+xv X-Received: by 2002:a05:600c:a00d:b0:477:a246:8398 with SMTP id 5b1f17b1804b1-4804c947d28mr48477335e9.2.1769169690230; Fri, 23 Jan 2026 04:01:30 -0800 (PST) Received: from Ansuel-XPS24 (93-34-88-81.ip49.fastwebnet.it. [93.34.88.81]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-4804d603ac9sm21575135e9.4.2026.01.23.04.01.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Jan 2026 04:01:29 -0800 (PST) From: Christian Marangi To: Christian Marangi , Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [net-next PATCH v2 3/3] net: phy: as21xxx: fill in inband caps and better handle inband Date: Fri, 23 Jan 2026 13:00:31 +0100 Message-ID: <20260123120117.10883-4-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260123120117.10883-1-ansuelsmth@gmail.com> References: <20260123120117.10883-1-ansuelsmth@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The as21xxx control In-Band support with the DPC RateAdapation configuration. Tested on a Banana Pi R4 PRO (MT7988a) and on Airoha AN7581/AN7583 where In Band is controlled by disabling Autoneg on the PCS, where the PHY correctly transfer packet with In Band disabled on the PCS and DPC RA disabled on the PHY. It was also confirmed that with In Band enabled on the PCS and DPC RA enabled on the PHY also packets gets transmitted correctly. With this new information, fill in the .inband_caps() OP and set the .config_inband() to enable DPC RA when inband is enabled. Support for this feature is enabled only on PHY firmware >=3D 1.9 as on previous version the DPC RA could only be enabled and a PHY reset (and Firmware reloaded) was needed to change this at runtime. To keep compatibility with some HW configuration, we enable DPC RA by default for older firmware. This is needed as on Banana Pi R4 PRO, one of the 2 as21xxx PHY is attached to a Switch that requires the PHY in In Band mode with Rate Adaption. Signed-off-by: Christian Marangi --- drivers/net/phy/as21xxx.c | 111 +++++++++++++++++++++++++++++++++++++- 1 file changed, 110 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/as21xxx.c b/drivers/net/phy/as21xxx.c index 2098fa6a2f63..60ec7af6e386 100644 --- a/drivers/net/phy/as21xxx.c +++ b/drivers/net/phy/as21xxx.c @@ -125,6 +125,10 @@ #define IPC_DATA_DBG_SEC GENMASK(15, 8) #define IPC_DATA_DBG_CMD GENMASK(7, 0) =20 +/* DBG_DPC sub command */ +#define IPC_DPC_RA_SET_CFG 0x2 +#define IPC_DPC_RA_GET_CFG 0x7 + #define AS21XXX_MDIO_AN_C22 0xffe0 =20 #define PHY_ID_AS21XXX 0x75009410 @@ -724,6 +728,52 @@ static int aeon_ipc_dbg_write_buf(struct phy_device *p= hydev, u8 *data, return ret; } =20 +static int aeon_ipc_dpc_ra_set(struct phy_device *phydev, bool enable) +{ + u8 data[1]; + int ret; + + ret =3D aeon_ipc_dbg_cmd(phydev, IPC_DBG_DPC, + IPC_DPC_RA_SET_CFG, + sizeof(data)); + if (ret) + return ret; + + data[0] =3D enable; + + ret =3D aeon_ipc_dbg_write_buf(phydev, data, sizeof(data)); + if (ret) + return ret; + + ret =3D aeon_ipc_poll(phydev); + if (ret) + return ret; + + return 0; +} + +static int aeon_ipc_dpc_ra_get(struct phy_device *phydev, bool *enabled) +{ + u16 ret_data[AEON_IPC_DATA_NUM_REGISTERS]; + int ret; + + ret =3D aeon_ipc_dbg_cmd(phydev, IPC_DBG_DPC, + IPC_DPC_RA_GET_CFG, 0); + if (ret) + return ret; + + ret =3D aeon_ipc_poll(phydev); + if (ret) + return ret; + + ret =3D aeon_ipc_dbg_read_buf(phydev, ret_data); + if (ret < 0) + return ret; + + *enabled =3D !!ret_data[0]; + return 0; +} + static int aeon_dpc_ra_enable(struct phy_device *phydev) { u16 data[2]; @@ -765,7 +815,11 @@ static int as21xxx_probe(struct phy_device *phydev) if (ret) return ret; =20 - return aeon_dpc_ra_enable(phydev); + /* Enable DPC Rate Adaption by default on older firmware */ + if (priv->fw_major_ver =3D=3D 1 && priv->fw_minor_ver < 9) + return aeon_dpc_ra_enable(phydev); + + return 0; } =20 static int as21xxx_read_link(struct phy_device *phydev, int *bmcr) @@ -1078,6 +1132,41 @@ static int as21xxx_match_phy_device(struct phy_devic= e *phydev, return ret; } =20 +static unsigned int as21xxx_inband_caps(struct phy_device *phydev, + phy_interface_t interface) +{ + struct as21xxx_priv *priv =3D phydev->priv; + + /* Configuring DPC Rate Adaption (to permit In Band support) + * is supported only from firmware version 1.9+ + */ + if (priv->fw_major_ver > 1 || priv->fw_minor_ver >=3D 9) + return LINK_INBAND_ENABLE | LINK_INBAND_DISABLE; + + /* On older firmware we enforce In Band by default + * for compatibility reason. + */ + return LINK_INBAND_ENABLE; +} + +static int as21xxx_config_inband(struct phy_device *phydev, + unsigned int modes) +{ + bool enabled; + int ret; + + ret =3D aeon_ipc_dpc_ra_get(phydev, &enabled); + if (ret) + return ret; + + /* Ignore if already in the desired mode */ + if ((modes =3D=3D LINK_INBAND_ENABLE && enabled) || + (modes =3D=3D LINK_INBAND_DISABLE && !enabled)) + return 0; + + return aeon_ipc_dpc_ra_set(phydev, modes =3D=3D LINK_INBAND_ENABLE); +} + static struct phy_driver as21xxx_drivers[] =3D { { /* PHY expose in C45 as 0x7500 0x9410 @@ -1093,6 +1182,8 @@ static struct phy_driver as21xxx_drivers[] =3D { PHY_ID_MATCH_EXACT(PHY_ID_AS21011JB1), .name =3D "Aeonsemi AS21011JB1", .probe =3D as21xxx_probe, + .inband_caps =3D as21xxx_inband_caps, + .config_inband =3D as21xxx_config_inband, .match_phy_device =3D as21xxx_match_phy_device, .read_status =3D as21xxx_read_status, .led_brightness_set =3D as21xxx_led_brightness_set, @@ -1105,6 +1196,8 @@ static struct phy_driver as21xxx_drivers[] =3D { PHY_ID_MATCH_EXACT(PHY_ID_AS21011PB1), .name =3D "Aeonsemi AS21011PB1", .probe =3D as21xxx_probe, + .inband_caps =3D as21xxx_inband_caps, + .config_inband =3D as21xxx_config_inband, .match_phy_device =3D as21xxx_match_phy_device, .read_status =3D as21xxx_read_status, .led_brightness_set =3D as21xxx_led_brightness_set, @@ -1117,6 +1210,8 @@ static struct phy_driver as21xxx_drivers[] =3D { PHY_ID_MATCH_EXACT(PHY_ID_AS21010PB1), .name =3D "Aeonsemi AS21010PB1", .probe =3D as21xxx_probe, + .inband_caps =3D as21xxx_inband_caps, + .config_inband =3D as21xxx_config_inband, .match_phy_device =3D as21xxx_match_phy_device, .read_status =3D as21xxx_read_status, .led_brightness_set =3D as21xxx_led_brightness_set, @@ -1129,6 +1224,8 @@ static struct phy_driver as21xxx_drivers[] =3D { PHY_ID_MATCH_EXACT(PHY_ID_AS21010JB1), .name =3D "Aeonsemi AS21010JB1", .probe =3D as21xxx_probe, + .inband_caps =3D as21xxx_inband_caps, + .config_inband =3D as21xxx_config_inband, .match_phy_device =3D as21xxx_match_phy_device, .read_status =3D as21xxx_read_status, .led_brightness_set =3D as21xxx_led_brightness_set, @@ -1141,6 +1238,8 @@ static struct phy_driver as21xxx_drivers[] =3D { PHY_ID_MATCH_EXACT(PHY_ID_AS21210PB1), .name =3D "Aeonsemi AS21210PB1", .probe =3D as21xxx_probe, + .inband_caps =3D as21xxx_inband_caps, + .config_inband =3D as21xxx_config_inband, .match_phy_device =3D as21xxx_match_phy_device, .read_status =3D as21xxx_read_status, .led_brightness_set =3D as21xxx_led_brightness_set, @@ -1153,6 +1252,8 @@ static struct phy_driver as21xxx_drivers[] =3D { PHY_ID_MATCH_EXACT(PHY_ID_AS21510JB1), .name =3D "Aeonsemi AS21510JB1", .probe =3D as21xxx_probe, + .inband_caps =3D as21xxx_inband_caps, + .config_inband =3D as21xxx_config_inband, .match_phy_device =3D as21xxx_match_phy_device, .read_status =3D as21xxx_read_status, .led_brightness_set =3D as21xxx_led_brightness_set, @@ -1165,6 +1266,8 @@ static struct phy_driver as21xxx_drivers[] =3D { PHY_ID_MATCH_EXACT(PHY_ID_AS21510PB1), .name =3D "Aeonsemi AS21510PB1", .probe =3D as21xxx_probe, + .inband_caps =3D as21xxx_inband_caps, + .config_inband =3D as21xxx_config_inband, .match_phy_device =3D as21xxx_match_phy_device, .read_status =3D as21xxx_read_status, .led_brightness_set =3D as21xxx_led_brightness_set, @@ -1177,6 +1280,8 @@ static struct phy_driver as21xxx_drivers[] =3D { PHY_ID_MATCH_EXACT(PHY_ID_AS21511JB1), .name =3D "Aeonsemi AS21511JB1", .probe =3D as21xxx_probe, + .inband_caps =3D as21xxx_inband_caps, + .config_inband =3D as21xxx_config_inband, .match_phy_device =3D as21xxx_match_phy_device, .read_status =3D as21xxx_read_status, .led_brightness_set =3D as21xxx_led_brightness_set, @@ -1189,6 +1294,8 @@ static struct phy_driver as21xxx_drivers[] =3D { PHY_ID_MATCH_EXACT(PHY_ID_AS21210JB1), .name =3D "Aeonsemi AS21210JB1", .probe =3D as21xxx_probe, + .inband_caps =3D as21xxx_inband_caps, + .config_inband =3D as21xxx_config_inband, .match_phy_device =3D as21xxx_match_phy_device, .read_status =3D as21xxx_read_status, .led_brightness_set =3D as21xxx_led_brightness_set, @@ -1201,6 +1308,8 @@ static struct phy_driver as21xxx_drivers[] =3D { PHY_ID_MATCH_EXACT(PHY_ID_AS21511PB1), .name =3D "Aeonsemi AS21511PB1", .probe =3D as21xxx_probe, + .inband_caps =3D as21xxx_inband_caps, + .config_inband =3D as21xxx_config_inband, .match_phy_device =3D as21xxx_match_phy_device, .read_status =3D as21xxx_read_status, .led_brightness_set =3D as21xxx_led_brightness_set, --=20 2.51.0