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charset="utf-8" Both CGX/RPM mac blocks support DMAC filters. This patch adds mbox support to read the counter. Signed-off-by: Hariprasad Kelam --- V4 * no changes =20 V3 * Return early on non CGX mapped interfaces by adding=20 "is_pf_cgxmapped" check V2 * no changes .../net/ethernet/marvell/octeontx2/af/cgx.c | 11 +++++++++ .../net/ethernet/marvell/octeontx2/af/cgx.h | 2 ++ .../marvell/octeontx2/af/lmac_common.h | 1 + .../net/ethernet/marvell/octeontx2/af/mbox.h | 7 ++++++ .../net/ethernet/marvell/octeontx2/af/rpm.c | 18 ++++++++++++++- .../net/ethernet/marvell/octeontx2/af/rpm.h | 2 ++ .../ethernet/marvell/octeontx2/af/rvu_cgx.c | 23 +++++++++++++++++++ 7 files changed, 63 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c b/drivers/net/= ethernet/marvell/octeontx2/af/cgx.c index 42044cd810b1..f29e6069acc1 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c @@ -740,6 +740,16 @@ u64 cgx_features_get(void *cgxd) return ((struct cgx *)cgxd)->hw_features; } =20 +u64 cgx_get_dmacflt_dropped_pktcnt(void *cgxd, int lmac_id) +{ + struct cgx *cgx =3D cgxd; + + if (!is_lmac_valid(cgx, lmac_id)) + return 0; + + return cgx_read(cgx, lmac_id, CGXX_CMRX_RX_STAT4); +} + int cgx_stats_reset(void *cgxd, int lmac_id) { struct cgx *cgx =3D cgxd; @@ -1924,6 +1934,7 @@ static struct mac_ops cgx_mac_ops =3D { .pfc_config =3D cgx_lmac_pfc_config, .mac_get_pfc_frm_cfg =3D cgx_lmac_get_pfc_frm_cfg, .mac_reset =3D cgx_lmac_reset, + .get_dmacflt_dropped_pktcnt =3D cgx_get_dmacflt_dropped_pktcnt, .mac_stats_reset =3D cgx_stats_reset, .mac_x2p_reset =3D cgx_x2p_reset, .mac_enadis_rx =3D cgx_enadis_rx, diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h b/drivers/net/= ethernet/marvell/octeontx2/af/cgx.h index 92ccf343dfe0..4c5ffd0aebdc 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h @@ -39,6 +39,7 @@ #define CGXX_CMRX_INT_ENA_W1S 0x058 #define CGXX_CMRX_RX_ID_MAP 0x060 #define CGXX_CMRX_RX_STAT0 0x070 +#define CGXX_CMRX_RX_STAT4 0x090 #define CGXX_CMRX_RX_LOGL_XON 0x100 #define CGXX_CMRX_RX_LMACS 0x128 #define CGXX_CMRX_RX_DMAC_CTL0 (0x1F8 + mac_ops->csr_offset) @@ -186,5 +187,6 @@ int cgx_lmac_get_pfc_frm_cfg(void *cgxd, int lmac_id, u= 8 *tx_pause, int verify_lmac_fc_cfg(void *cgxd, int lmac_id, u8 tx_pause, u8 rx_pause, int pfvf_idx); int cgx_lmac_reset(void *cgxd, int lmac_id, u8 pf_req_flr); +u64 cgx_get_dmacflt_dropped_pktcnt(void *cgx, int lmac_id); u32 cgx_get_fifo_len(void *cgxd); #endif /* CGX_H */ diff --git a/drivers/net/ethernet/marvell/octeontx2/af/lmac_common.h b/driv= ers/net/ethernet/marvell/octeontx2/af/lmac_common.h index 6180e68e1765..82446f6c27a3 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/lmac_common.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/lmac_common.h @@ -134,6 +134,7 @@ struct mac_ops { int (*mac_stats_reset)(void *cgxd, int lmac_id); void (*mac_x2p_reset)(void *cgxd, bool enable); int (*mac_enadis_rx)(void *cgxd, int lmac_id, bool enable); + u64 (*get_dmacflt_dropped_pktcnt)(void *cgxd, int lmac_id); }; =20 struct cgx { diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net= /ethernet/marvell/octeontx2/af/mbox.h index a3e273126e4e..2b653a572eba 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h @@ -197,6 +197,8 @@ M(CGX_MAC_ADDR_UPDATE, 0x21E, cgx_mac_addr_update, cgx_= mac_addr_update_req, \ cgx_mac_addr_update_rsp) \ M(CGX_PRIO_FLOW_CTRL_CFG, 0x21F, cgx_prio_flow_ctrl_cfg, cgx_pfc_cfg, \ cgx_pfc_rsp) \ +M(CGX_DMAC_FILTER_DROP_CNT, 0x220, cgx_get_dmacflt_dropped_pktcnt, msg_req= , \ + cgx_dmac_filter_drop_cnt) \ /* NPA mbox IDs (range 0x400 - 0x5FF) */ \ M(NPA_LF_ALLOC, 0x400, npa_lf_alloc, \ npa_lf_alloc_req, npa_lf_alloc_rsp) \ @@ -718,6 +720,11 @@ struct cgx_mac_addr_update_rsp { u32 index; }; =20 +struct cgx_dmac_filter_drop_cnt { + struct mbox_msghdr hdr; + u64 count; +}; + #define RVU_LMAC_FEAT_FC BIT_ULL(0) /* pause frames */ #define RVU_LMAC_FEAT_HIGIG2 BIT_ULL(1) /* flow control from physical link higig2 messages */ diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rpm.c b/drivers/net/= ethernet/marvell/octeontx2/af/rpm.c index 2e9945446199..7e0e0c5c11a3 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rpm.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rpm.c @@ -37,7 +37,8 @@ static struct mac_ops rpm_mac_ops =3D { .mac_tx_enable =3D rpm_lmac_tx_enable, .pfc_config =3D rpm_lmac_pfc_config, .mac_get_pfc_frm_cfg =3D rpm_lmac_get_pfc_frm_cfg, - .mac_reset =3D rpm_lmac_reset, + .mac_reset =3D rpm_lmac_reset, + .get_dmacflt_dropped_pktcnt =3D rpm_get_dmacflt_dropped_pktcn= t, .mac_stats_reset =3D rpm_stats_reset, .mac_x2p_reset =3D rpm_x2p_reset, .mac_enadis_rx =3D rpm_enadis_rx, @@ -73,6 +74,7 @@ static struct mac_ops rpm2_mac_ops =3D { .pfc_config =3D rpm_lmac_pfc_config, .mac_get_pfc_frm_cfg =3D rpm_lmac_get_pfc_frm_cfg, .mac_reset =3D rpm_lmac_reset, + .get_dmacflt_dropped_pktcnt =3D rpm_get_dmacflt_dropped_pktcnt, .mac_stats_reset =3D rpm_stats_reset, .mac_x2p_reset =3D rpm_x2p_reset, .mac_enadis_rx =3D rpm_enadis_rx, @@ -449,6 +451,20 @@ int rpm_get_tx_stats(void *rpmd, int lmac_id, int idx,= u64 *tx_stat) return 0; } =20 +u64 rpm_get_dmacflt_dropped_pktcnt(void *rpmd, int lmac_id) +{ + rpm_t *rpm =3D rpmd; + u64 dmac_flt_stat; + + if (!is_lmac_valid(rpm, lmac_id)) + return 0; + + dmac_flt_stat =3D is_dev_rpm2(rpm) ? RPM2_CMRX_RX_STAT2 : + RPMX_CMRX_RX_STAT2; + + return rpm_read(rpm, lmac_id, dmac_flt_stat); +} + int rpm_stats_reset(void *rpmd, int lmac_id) { rpm_t *rpm =3D rpmd; diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rpm.h b/drivers/net/= ethernet/marvell/octeontx2/af/rpm.h index b8d3972e096a..443481010aba 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rpm.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/rpm.h @@ -60,6 +60,7 @@ #define RPMX_MTI_STAT_RX_STAT_PAGES_COUNTERX 0x12000 #define RPMX_MTI_STAT_TX_STAT_PAGES_COUNTERX 0x13000 #define RPMX_MTI_STAT_DATA_HI_CDC 0x10038 +#define RPMX_CMRX_RX_STAT2 0x4010 =20 #define RPM_LMAC_FWI 0xa #define RPM_TX_EN BIT_ULL(0) @@ -129,6 +130,7 @@ int rpm_lmac_enadis_pause_frm(void *rpmd, int lmac_id, = u8 tx_pause, u8 rx_pause); int rpm_get_tx_stats(void *rpmd, int lmac_id, int idx, u64 *tx_stat); int rpm_get_rx_stats(void *rpmd, int lmac_id, int idx, u64 *rx_stat); +u64 rpm_get_dmacflt_dropped_pktcnt(void *rpmd, int lmac_id); void rpm_lmac_ptp_config(void *rpmd, int lmac_id, bool enable); int rpm_lmac_rx_tx_enable(void *rpmd, int lmac_id, bool enable); int rpm_lmac_tx_enable(void *rpmd, int lmac_id, bool enable); diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c b/drivers/= net/ethernet/marvell/octeontx2/af/rvu_cgx.c index 3abd750a4bd7..ee7de8bbeadc 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c @@ -1352,3 +1352,26 @@ void rvu_mac_reset(struct rvu *rvu, u16 pcifunc) if (mac_ops->mac_reset(cgxd, lmac, !is_vf(pcifunc))) dev_err(rvu->dev, "Failed to reset MAC\n"); } + +int rvu_mbox_handler_cgx_get_dmacflt_dropped_pktcnt(struct rvu *rvu, + struct msg_req *req, + struct cgx_dmac_filter_drop_cnt *rsp) +{ + int pf =3D rvu_get_pf(rvu->pdev, req->hdr.pcifunc); + struct mac_ops *mac_ops; + u8 cgx_id, lmac_id; + void *cgxd; + + if (!is_pf_cgxmapped(rvu, pf)) + return 0; + + rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id); + cgxd =3D rvu_cgx_pdata(cgx_id, rvu); + mac_ops =3D get_mac_ops(cgxd); + + if (!mac_ops->get_dmacflt_dropped_pktcnt) + return 0; + + rsp->count =3D mac_ops->get_dmacflt_dropped_pktcnt(cgxd, lmac_id); + return 0; +} --=20 2.34.1