From nobody Mon Feb 9 14:32:48 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 55E61354AE7 for ; Fri, 23 Jan 2026 09:33:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769160843; cv=none; b=ASNI99yqbetliem4tnRm9hi00zsJAFW/LElxUIqv2OKWsXIe2Q4bWqBOL1Cj7N3XKEgAUgsDX+y7J0UTYUYIv995ffBSyPpB5sto7h7vFL4siSi7mK8t4TZQeBYfi+SrzjFmwvVrqq0LdTnjFHtQUipT3yBfZtxO2SqnBX1W1i0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769160843; c=relaxed/simple; bh=QCZv44dpt1wXV5t639ETH/9OXxUw6V20Cbu8oX8vMHM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=eNK+5tU9pZ9tH+im+TqD4DLF/b9wNxpurAleCaNTLPXtxiMvIuLem2qtnOin0AU1ltaKyVTOXuHJE1NqEhOA2F427x/fV/cto2iaHCiHeScCW4RQYcLe/QNKNAOK4EuKujYDXPh64K0++2bpj4SXsnuBJyz6KH18XkKjZkofWTY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=NVNPbezp; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="NVNPbezp" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 2AAD54E42217; Fri, 23 Jan 2026 09:33:51 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 0036A6070A; Fri, 23 Jan 2026 09:33:51 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 85B37119A879D; Fri, 23 Jan 2026 10:33:48 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1769160829; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=aRHUhUQElWm45tRxPNhFePFW/HsuYpmnmVm/z34Giec=; b=NVNPbezpnmAIsby6thuM0qbC03Y0Zf96x+ESj82VFrPLinMcbeAI1342sZATNE9BPxtwjl 5bPXo4z+FRo+7IXjz94KPBAVKA0JAoQ1sqvb0MfxLVm6nQbVOa1BAEiI3ixbYeCjU9Tp6T TKuLiBeYcp67MT33RCFitDZEFj6NSogB65cGX8QjkvAiSuIzfTz7pVzo4qVBYEaf66lhnQ MjBPhOr7ap5MQRqGTgdMWEwNBijF3DNGr0lYdR5djFB/m0iQ3OJKf9drY975KiSPozBs3h eqEfKRK2e+4cs6/vnHGBqKANILyPXZImL6I5IUIBKpFXBrn5wQjF3unBholQ1Q== From: Richard Genoud To: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Philipp Zabel Cc: Paul Kocialkowski , Thomas Petazzoni , linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Richard Genoud Subject: [PATCH v3 3/4] arm64: dts: allwinner: h616: add PWM controller Date: Fri, 23 Jan 2026 10:33:21 +0100 Message-ID: <20260123093322.1327389-4-richard.genoud@bootlin.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260123093322.1327389-1-richard.genoud@bootlin.com> References: <20260123093322.1327389-1-richard.genoud@bootlin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Content-Type: text/plain; charset="utf-8" The H616 has a PWM controller that can provide PWM signals, but also plain clocks. Add the PWM controller node and pins in the device tree. Signed-off-by: Richard Genoud --- .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 47 +++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/bo= ot/dts/allwinner/sun50i-h616.dtsi index 8d1110c14bad..1c7628a6e4bb 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi @@ -236,6 +236,17 @@ watchdog: watchdog@30090a0 { clocks =3D <&osc24M>; }; =20 + pwm: pwm@300a000 { + compatible =3D "allwinner,sun50i-h616-pwm"; + reg =3D <0x0300a000 0x400>; + clocks =3D <&osc24M>, <&ccu CLK_BUS_PWM>; + clock-names =3D "mod", "bus"; + resets =3D <&ccu RST_BUS_PWM>; + #pwm-cells =3D <3>; + #clock-cells =3D <1>; + status =3D "disabled"; + }; + pio: pinctrl@300b000 { compatible =3D "allwinner,sun50i-h616-pinctrl"; reg =3D <0x0300b000 0x400>; @@ -340,6 +351,42 @@ nand_rb1_pin: nand-rb1-pin { bias-pull-up; }; =20 + /omit-if-no-ref/ + pwm0_pin: pwm0-pin { + pins =3D "PD28"; + function =3D "pwm0"; + }; + + /omit-if-no-ref/ + pwm1_pin: pwm1-pin { + pins =3D "PG19"; + function =3D "pwm1"; + }; + + /omit-if-no-ref/ + pwm2_pin: pwm2-pin { + pins =3D "PH2"; + function =3D "pwm2"; + }; + + /omit-if-no-ref/ + pwm3_pin: pwm3-pin { + pins =3D "PH0"; + function =3D "pwm3"; + }; + + /omit-if-no-ref/ + pwm4_pin: pwm4-pin { + pins =3D "PI14"; + function =3D "pwm4"; + }; + + /omit-if-no-ref/ + pwm5_pin: pwm5-pin { + pins =3D "PA12"; + function =3D "pwm5"; + }; + /omit-if-no-ref/ spi0_pins: spi0-pins { pins =3D "PC0", "PC2", "PC4"; --=20 2.47.3